GliGli
|
0ef5d01b2c
|
update for GCC 9.2 toolchain
|
2022-02-11 13:27:24 +01:00 |
|
GliGli
|
5a71129af8
|
gui working with dynarec / cleanups
|
2012-09-09 18:16:36 +02:00 |
|
GliGli
|
82e620d7d4
|
proper wchar removal / emu init-start-stop-term rework / better gui integration, still buggy with dynarec
|
2012-09-09 13:30:12 +02:00 |
|
GliGli
|
62d03c2a9c
|
emitter opti epic fail, corrupted memory, wasted a PPC reg and wasn't any usefull / using that reg for SH4 PR, actually much faster, and safer :)
|
2012-09-08 18:36:50 +02:00 |
|
GliGli
|
b4a21718be
|
misc fixes
|
2012-09-08 13:36:51 +02:00 |
|
GliGli
|
6760bc21c7
|
major opti: direct SH4 PC to PPC code pointer lookup table / lto is broken right now
|
2012-09-07 22:22:55 +02:00 |
|
GliGli
|
d34106896e
|
dynarec blocks opti / removing failed ret opti / cleanups
|
2012-09-06 20:33:32 +02:00 |
|
GliGli
|
31137c4180
|
cleanup / forgot to reactivate an opti
|
2012-09-05 19:46:31 +02:00 |
|
GliGli
|
0deaa0899c
|
using altivec for SH4 matrix ops / various cleanups / threaded pvr refinements
|
2012-09-04 20:12:55 +02:00 |
|
GliGli
|
8318956fc1
|
bugfixes
|
2012-09-01 23:19:09 +02:00 |
|
GliGli
|
501c222883
|
new dynarec SQ writes handling method / various cleanups
|
2012-09-01 22:56:59 +02:00 |
|
GliGli
|
36dfb5e481
|
misc changes...
|
2012-08-29 22:56:07 +02:00 |
|
GliGli
|
e13a7332b9
|
various threading improvements, wip
|
2012-08-27 00:36:01 +02:00 |
|
GliGli
|
e92ff330aa
|
recompiled divs
|
2012-08-25 11:07:45 +02:00 |
|
GliGli
|
5664083e6a
|
warnings / annoying debug log
|
2012-08-22 23:09:51 +02:00 |
|
GliGli
|
0bf812c586
|
various fixes, DOA2 mostly working
|
2012-08-18 23:14:16 +02:00 |
|
GliGli
|
ab83a08f91
|
floating point reg allocator opti
|
2012-02-25 23:21:09 +01:00 |
|
GliGli
|
51a5ddb345
|
tiny emitter opti
|
2012-02-25 01:05:30 +01:00 |
|
GliGli
|
f978fa4856
|
various optis, maybe unsafe
|
2012-02-22 20:10:06 +01:00 |
|
GliGli
|
d4296bd3bd
|
opti: removing LoadTs + direct pvr call in UpdateSystem
|
2012-02-21 19:11:57 +01:00 |
|
GliGli
|
4d3717f844
|
enabling link time optimisations, needs an up to date toolchain
|
2011-12-18 14:20:42 +01:00 |
|
GliGli
|
ebb84d9396
|
removing risky and useless opti / cleanup
|
2011-12-08 21:04:02 +01:00 |
|
GliGli
|
751a03257f
|
fully working shil ce optimiser
|
2011-12-05 22:56:08 +01:00 |
|
GliGli
|
df4c919502
|
wip (one new recompiled op + shil ifb opti)
|
2011-12-04 18:16:00 +01:00 |
|
GliGli
|
9c7f60c509
|
dynarec reads/writes/float movs optis
|
2011-11-25 01:23:26 +01:00 |
|
GliGli
|
ddf67f1e93
|
dynarec blocks invalidation opti
|
2011-11-24 22:12:19 +01:00 |
|
GliGli
|
1e65abbb64
|
major opti: using a dedicated ppc register for sh4 pc
|
2011-11-24 01:22:11 +01:00 |
|
GliGli
|
be9116a163
|
little branch opti
|
2011-11-23 20:35:53 +01:00 |
|
GliGli
|
1068b5b4e3
|
jumps/branches opti + fsrra opti
|
2011-11-23 19:58:16 +01:00 |
|
GliGli
|
3743e8897e
|
temp (unsafe?) optis
|
2011-11-22 20:09:07 +01:00 |
|
GliGli
|
29cc438256
|
added some profiling infos + moved 3d rendering to UpdateSystem
|
2011-11-21 22:27:41 +01:00 |
|
GliGli
|
7ddfd6c582
|
int reg allocator optimisations
|
2011-11-21 20:24:32 +01:00 |
|
GliGli
|
567c2abe10
|
all shil ops except div are recompiled
|
2011-11-20 17:45:33 +01:00 |
|
GliGli
|
439aee1451
|
2 more recompiled ops
|
2011-11-19 21:48:02 +01:00 |
|
GliGli
|
10b7941e9f
|
recompiled integer mulls & swaps
|
2011-11-19 19:24:17 +01:00 |
|
GliGli
|
98d834d687
|
dynarec bugfixes
|
2011-11-19 00:28:07 +01:00 |
|
GliGli
|
bb7eb6d2c6
|
bugfixes & more recompiled ops
|
2011-11-18 22:35:56 +01:00 |
|
GliGli
|
ecb3017bd6
|
bugfixes & optis
|
2011-11-18 20:45:25 +01:00 |
|
GliGli
|
51109bb3cb
|
misc changes
|
2011-11-17 20:12:13 +01:00 |
|
GliGli
|
01c0ddef4c
|
working dr blocks invalidation
|
2011-11-13 00:33:25 +01:00 |
|
GliGli
|
8eae90dd62
|
wip
|
2011-11-11 19:17:58 +01:00 |
|
GliGli
|
d7a740913b
|
misc dynarec shift stuff
|
2011-11-10 00:28:53 +01:00 |
|
GliGli
|
e9045122f2
|
misc optis
|
2011-11-09 17:22:14 +01:00 |
|
GliGli
|
227d2d5d1b
|
misc dynarec optis
|
2011-11-09 14:52:18 +01:00 |
|
GliGli
|
7b31920aa0
|
little branchs opti
|
2011-11-09 12:30:59 +01:00 |
|
GliGli
|
8a627e5efd
|
round of optimisations
|
2011-11-09 10:21:52 +01:00 |
|
GliGli
|
f8166927a4
|
more remcompiled FPU ops
|
2011-11-08 19:55:17 +01:00 |
|
GliGli
|
f3c0b7eb7a
|
opti: use CR bit to emulate T flag
|
2011-11-08 16:47:29 +01:00 |
|
GliGli
|
6bf875db91
|
implemented simple FPU ops
|
2011-11-08 12:51:31 +01:00 |
|
GliGli
|
3688b01bc0
|
implemented dynarec saves and a bunch of missed ops / shil_ifp profiler
|
2011-11-08 11:26:14 +01:00 |
|