Commit graph

  • 676dcdf45a Added mfocrf/mfcr/mtocrf/mtcrf/mtcr test and fixes Alexandro Sánchez Bach 2015-10-25 00:16:31 +01:00
  • 0d0d81b7d9 Reorganized unit tests Alexandro Sánchez Bach 2015-10-24 21:39:03 +01:00
  • a5773e08c6 Removed PS3 integration tests submodule Alexandro Sánchez Bach 2015-10-24 21:23:27 +01:00
  • 8a243a1663 Updated PPUState::CR def. and fixed some ALU issues Alexandro Sánchez Bach 2015-10-24 21:17:09 +01:00
  • 9336985010 Implemented XFX-Form instructions in PPCAssembler Alexandro Sánchez Bach 2015-10-24 21:15:01 +01:00
  • a8efb600cf Implemented n*/subf* PPU unit tests Alexandro Sánchez Bach 2015-10-24 19:55:12 +01:00
  • 69006eea6b Implemented some add*/exts* PPU unit tests Alexandro Sánchez Bach 2015-10-22 20:50:48 +01:00
  • 23e88bc04e Implemented or*/xor* PPU unit tests Alexandro Sánchez Bach 2015-10-21 00:16:47 +01:00
  • cf33c46393 Reenabled some PPC integer unit tests Alexandro Sánchez Bach 2015-10-20 23:09:33 +01:00
  • b56f92402e Added a few new PPC unit tests and a lot of stubs Alexandro Sánchez Bach 2015-10-19 20:06:45 +01:00
  • c12f4eac09 Decoupled tests from VS and new syntactic sugar Alexandro Sánchez Bach 2015-10-19 20:05:25 +01:00
  • 87d061e99f Implemented and* PPU unit tests Alexandro Sánchez Bach 2015-10-18 14:42:24 +01:00
  • 888cd62de5 Implemented some add* PPC unit tests Alexandro Sánchez Bach 2015-10-18 13:47:26 +01:00
  • ea99459fd0 Fixed addex/subfex and CR access on PPU frontend Alexandro Sánchez Bach 2015-10-18 12:55:30 +01:00
  • 205cf5e4bf Created PPU frontend unit tests group Alexandro Sánchez Bach 2015-10-18 00:41:19 +01:00
  • d6f13868c3 Update condition register definition in PPU state Alexandro Sánchez Bach 2015-10-18 00:34:11 +01:00
  • a664e7eb46 Split meta-macros to use them in unit tests Alexandro Sánchez Bach 2015-10-17 23:03:17 +01:00
  • d8e913eefc Simplified LV2 initialization and PPU/SPU states Alexandro Sánchez Bach 2015-10-17 20:41:32 +01:00
  • 27a561c297 Created core/memory projects Alexandro Sánchez Bach 2015-10-17 20:36:14 +01:00
  • 9103d7eb52 Fixed asserts and created a base CPU state Alexandro Sánchez Bach 2015-10-17 14:59:41 +01:00
  • c96ebe77c1 Isolating LV2 syscalls from Emulator global state Alexandro Sánchez Bach 2015-10-17 12:29:36 +01:00
  • 4bd380a570 Isolating PPUThread from HLE-related code Alexandro Sánchez Bach 2015-10-17 12:26:15 +01:00
  • ff5dca36ec Added SPUThread stub and corresponding CPU methods Alexandro Sánchez Bach 2015-10-17 12:19:46 +01:00
  • b45536c8c5 Moved RSX-specific files into nucleus/gpu/rsx Alexandro Sánchez Bach 2015-10-16 00:20:35 +01:00
  • e075a179a7 Added base CPU/GPU classes Alexandro Sánchez Bach 2015-10-15 22:47:35 +01:00
  • 16d557b455 Implemented D/DS/X-Form instr. on the PPCAssembler Alexandro Sánchez Bach 2015-10-15 01:13:22 +01:00
  • 82b706b12c Implemented XO-Form instr. on the PPCAssembler Alexandro Sánchez Bach 2015-10-14 00:29:24 +01:00
  • 6935413c39 Added PPCAssembler method declarations Alexandro Sánchez Bach 2015-10-13 23:13:46 +01:00
  • 4023673cd4 Fixed XER CA updates in add*/sub* PPU instructions Alexandro Sánchez Bach 2015-10-12 21:55:19 +01:00
  • 0fcae8b1dc Added new PPU instr. and ARM/PPC assembler stubs Alexandro Sánchez Bach 2015-10-11 20:18:49 +01:00
  • c8461dba85 Enabled FPSCR register and split XER fields Alexandro Sánchez Bach 2015-10-11 17:52:49 +01:00
  • 59ba33a5a6 Small fixes in the filesystem and PPU frontend Alexandro Sánchez Bach 2015-10-11 03:17:43 +01:00
  • 955256cdec Impl. more floating-point related instructions Alexandro Sánchez Bach 2015-10-11 01:17:26 +01:00
  • 1ca3413dc3 Impl. floating-point arithmetic HIR instructions Alexandro Sánchez Bach 2015-10-11 00:08:01 +01:00
  • 1f2e5b25b6 Improved constant loading on x86 registers Alexandro Sánchez Bach 2015-10-10 22:07:35 +01:00
  • a72a44a14f Added logical/memory vector HIR instructions Alexandro Sánchez Bach 2015-10-10 19:51:06 +01:00
  • 1771b97697 Added floating-point mem/cast/convert to backend Alexandro Sánchez Bach 2015-10-10 15:49:41 +01:00
  • c1acb4f3d6 Added cast/convert HIR instructions Alexandro Sánchez Bach 2015-10-10 15:11:45 +01:00
  • 6f78618bd7 Enabled LR access on PPU frontend Alexandro Sánchez Bach 2015-10-10 03:35:05 +01:00
  • 2add8af5fd Implemented ctlz HIR instruction in x86 backend Alexandro Sánchez Bach 2015-10-10 02:16:31 +01:00
  • 0b6b4e2e15 Impl. cond. returns and strengthened some warnings Alexandro Sánchez Bach 2015-10-10 00:49:35 +01:00
  • 38729181e0 Implemented frontend epilog block Alexandro Sánchez Bach 2015-10-09 22:28:37 +01:00
  • 4c0c051b29 Added entry point flag for blocks Alexandro Sánchez Bach 2015-10-09 00:47:35 +01:00
  • 507ce5bf76 Multiple CPU frontend/backend fixes Alexandro Sánchez Bach 2015-10-09 00:06:57 +01:00
  • ce010752f8 Improvements in calls/shifts/branches/mem/time Alexandro Sánchez Bach 2015-10-08 15:37:21 +01:00
  • 86ebd98531 Impl. HIR memfence and PPU ldarx/lwarx/stdcx instr. Alexandro Sánchez Bach 2015-10-08 14:09:57 +01:00
  • a672558311 New CR field location and implemented mfocrf/mtocrf Alexandro Sánchez Bach 2015-10-08 13:29:52 +01:00
  • 498feabff4 Enabled XER access and PPU subfx instruction Alexandro Sánchez Bach 2015-10-08 11:41:05 +01:00
  • 08da1952a3 Modified dynamic function calls Alexandro Sánchez Bach 2015-10-08 11:39:16 +01:00
  • 973efbf3b6 Added x86 backend prolog/epilog labels and rsp fix Alexandro Sánchez Bach 2015-10-08 01:20:45 +01:00
  • 00aa00e23e Implemented mulh HIR instruction in x86 backend Alexandro Sánchez Bach 2015-10-07 18:11:30 +01:00
  • 66e8e65d72 Some nucleus/cpu/* fixes and SPU state draft added Alexandro Sánchez Bach 2015-10-07 17:37:29 +01:00
  • 06fb4caac2 Impl. branching instructions in HIR builder/backend Alexandro Sánchez Bach 2015-10-07 00:52:05 +01:00
  • 2fc2f4e24f Added syscall handler to the builtin functions list Alexandro Sánchez Bach 2015-10-07 00:05:45 +01:00
  • 18928017ad Checking available x86 extensions on compiler init. Alexandro Sánchez Bach 2015-10-06 19:47:59 +01:00
  • cd7eb6062c Fixed shifting amounts and constant value cloning Alexandro Sánchez Bach 2015-10-06 08:08:49 +01:00
  • f02d539f29 Implemented shifting HIR instr. in x86 backend Alexandro Sánchez Bach 2015-10-06 00:31:12 +01:00
  • 1771a718f1 Updated Xbyak to v4.87 Alexandro Sánchez Bach 2015-10-05 20:11:53 +01:00
  • 4c7b4f03bb Implemented select HIR instruction in x86 backend Alexandro Sánchez Bach 2015-10-05 00:07:56 +01:00
  • e0faac5641 Implemented compare HIR instruction in x86 backend Alexandro Sánchez Bach 2015-10-04 16:26:09 +01:00
  • c75c1be0b7 Simpler block compilation and prettier HIR dumps Alexandro Sánchez Bach 2015-10-04 14:40:52 +01:00
  • c9ffed1924 Added shifting HIR instructions to builder Alexandro Sánchez Bach 2015-10-04 02:44:59 +01:00
  • 1a73a86daa Added comparison HIR instruction to builder/values Alexandro Sánchez Bach 2015-10-04 02:37:20 +01:00
  • 369e0065fe Fixed PPU frontend bcx instr. and cr load/stores Alexandro Sánchez Bach 2015-10-04 01:54:50 +01:00
  • cf8ce04f4b Implemented human-readable HIR dump methods Alexandro Sánchez Bach 2015-10-03 18:45:21 +01:00
  • b7b84b6abf Constant width checks and x86 const-reg binary ops Alexandro Sánchez Bach 2015-10-03 12:09:31 +01:00
  • 7b72e87285 Proper register remapping in RA pass Alexandro Sánchez Bach 2015-10-02 08:37:25 +01:00
  • 6169b11e36 Added integer load/store backend sequences Alexandro Sánchez Bach 2015-10-02 00:02:37 +01:00
  • 2fd5309e9b Temporary stepping through guest instructions Alexandro Sánchez Bach 2015-10-02 00:02:12 +01:00
  • 1bbc6afe55 Updating value usage while setting instr. sources Alexandro Sánchez Bach 2015-10-01 22:22:18 +01:00
  • 8c56711fe7 Implemented simple linear scan RA pass Alexandro Sánchez Bach 2015-10-01 01:38:34 +01:00
  • dc9cc3a594 Updated Readme and icon Alexandro Sánchez Bach 2015-09-30 23:00:55 +01:00
  • 66b5a85b25 Replaced Ts... HIR func. args. with vector<Value*> Alexandro Sánchez Bach 2015-09-29 21:58:02 +01:00
  • cae099d3bd Improved HIR builder createCall* methods Alexandro Sánchez Bach 2015-09-28 23:17:54 +01:00
  • ad968e83b7 Implemented branching to reg addr in PPU frontend Alexandro Sánchez Bach 2015-09-27 22:59:49 +01:00
  • 36ecfc3a94 Removed 'callext' opcode Alexandro Sánchez Bach 2015-09-27 22:56:46 +01:00
  • 3659fe9714 Implemented integer extend/truncate HIR opcodes Alexandro Sánchez Bach 2015-09-27 20:58:36 +01:00
  • 0dd31ee6c0 Cleaned cpu::frontend::ppu::Recompiler Alexandro Sánchez Bach 2015-09-27 20:09:17 +01:00
  • 5843028086 Implemented RWX memory alloc/free compiler methods Alexandro Sánchez Bach 2015-09-27 20:05:16 +01:00
  • b6e47f4092 Enabled argument passing to HIR function calls Alexandro Sánchez Bach 2015-09-27 13:40:29 +01:00
  • f47c144943 Added external functions calls from HIR frontends Alexandro Sánchez Bach 2015-09-27 03:19:48 +01:00
  • 081a076bc0 Added logical HIR instructions to builder/backend Alexandro Sánchez Bach 2015-09-26 22:06:25 +01:00
  • 672d5ac5ab Added context access HIR instructions Alexandro Sánchez Bach 2015-09-26 21:09:32 +01:00
  • 21e49207ec Modified CPU translation interfaces Alexandro Sánchez Bach 2015-09-26 19:31:01 +01:00
  • 500b63e799 Added 'call' opcode to backend sequences Alexandro Sánchez Bach 2015-09-24 22:04:06 +01:00
  • 7e1d0b9f08 Added global compiler settings Alexandro Sánchez Bach 2015-09-23 23:13:16 +01:00
  • bb6a59523a Fixed loaders using the new filesystem library Alexandro Sánchez Bach 2015-09-19 21:15:33 +01:00
  • b7247a3c87 Fixed sequence registering on dyn. initialization Alexandro Sánchez Bach 2015-09-13 22:49:53 +01:00
  • 49507652a0 Target information about calling conventions Alexandro Sánchez Bach 2015-09-12 23:36:29 +01:00
  • 0e6a90a2ae Added target information about register sets Alexandro Sánchez Bach 2015-09-09 19:07:56 +02:00
  • f8d976bbe0 Running CPU HIR passes Alexandro Sánchez Bach 2015-09-04 23:32:22 +02:00
  • 946b939530 Added CPU HIR optimization passes Alexandro Sánchez Bach 2015-09-03 16:12:36 +02:00
  • 10b0be1b79 Fixed Sequence destination operand loading Alexandro Sánchez Bach 2015-09-03 16:11:05 +02:00
  • a1c8fa25b8 Opcode RET x86 sequences Alexandro Sánchez Bach 2015-09-02 12:14:41 +02:00
  • d9eb10d70b Fixed sequence init and instruction key generation Alexandro Sánchez Bach 2015-09-02 04:52:06 +02:00
  • f853f7a597 Unit testing for the CPU IR backend Alexandro Sánchez Bach 2015-09-02 01:07:37 +02:00
  • 255172a8c0 CPU IR Builder stubs added and improved backend Alexandro Sánchez Bach 2015-09-02 00:53:45 +02:00
  • 554847b896 Updated CPU IR Function class Alexandro Sánchez Bach 2015-09-02 00:51:30 +02:00
  • 2d15d6f9ef Fixed build issues Alexandro Sánchez Bach 2015-09-02 00:49:56 +02:00
  • 84c7cd8e22 Constant-related methods for CPU IR Value/Builder Alexandro Sánchez Bach 2015-09-01 15:42:04 +02:00