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Fixed emulation bug of BLR

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This commit is contained in:
rkx1209 2018-03-10 04:33:10 +09:00
parent cb6c19f046
commit 7454916a8d
5 changed files with 25 additions and 21 deletions
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12
ARMv8/ARMv8.cpp
View file

@ -21,15 +21,15 @@ void Dump() {
if (!X(r))
continue;
if (r == GPR_LR)
debug_print ("LR\t");
ns_print ("LR\t");
else if (r == GPR_SP)
debug_print ("SP\t");
ns_print ("SP\t");
else
debug_print ("X%d\t", r);
debug_print ("0x%016lx\n", X(r));
ns_print ("X%d\t", r);
ns_print ("0x%016lx\n", X(r));
}
debug_print ("PC\t0x%016lx\n", PC);
debug_print ("NZCV\t0x%016lx\n", NZCV);
ns_print ("PC\t0x%016lx\n", PC);
ns_print ("NZCV\t0x%016lx\n", NZCV);
}
}

11
ARMv8/Disassembler.cpp
View file

@ -322,14 +322,11 @@ static void DisasUncondBrReg(uint32_t insn, DisasCallback *cb) {
}
switch (opc) {
case 0: /* BR */
case 1: /* BLR */
cb->MovReg(GPR_LR, PC_IDX, true);
case 0: /* BR */
case 2: /* RET */
cb->SetPCReg (rn);
/* BLR also needs to load return address */
if (opc == 1) {
cb->MovReg(GPR_LR, rn, true);
}
break;
case 4: /* ERET */
//TODO:
@ -810,7 +807,7 @@ static void DisasLdstRegImm9(uint32_t insn, DisasCallback *cb,
bool post_index;
bool writeback;
debug_print ("ldst uimm9\n");
//debug_print ("ldst uimm9\n");
if (is_vector) {
UnsupportedOp ("LDR/STR [base, #imm9] (SIMD&FP)");
@ -871,7 +868,7 @@ static void DisasLdstRegUnsignedImm(uint32_t insn, DisasCallback *cb,
bool is_store;
bool is_signed = false;
bool is_extended = false;
debug_print ("ldst unsigned imm\n");
//debug_print ("ldst unsigned imm\n");
if (is_vector) {
/* LDR/STR [base, #uimm12] (SIMD&FP) */
size |= (opc & 2) << 1;

11
ARMv8/Interpreter.cpp
View file

@ -7,7 +7,8 @@ IntprCallback *Interpreter::disas_cb = nullptr;
int Interpreter::SingleStep() {
uint32_t inst = byte_swap32_uint (ARMv8::ReadInst (PC));
X(GPR_ZERO) = 0; //Reset Zero register
debug_print ("Run Code: 0x%lx: 0x%08lx\n", PC, inst);
//debug_print ("Run Code: 0x%lx: 0x%08lx\n", PC, inst);
ns_print ("Run Code: 0x%lx: 0x%08lx\n", PC, inst);
Disassembler::DisasA64 (inst, disas_cb);
PC += sizeof(uint32_t);
return 0;
@ -19,7 +20,13 @@ void Interpreter::Run() {
char c;
//scanf("%c", &c);
SingleStep ();
Cpu::DumpMachine ();
//Cpu::DumpMachine ();
if (PC == 0x34) {
SingleStep ();
Cpu::DumpMachine ();
debug_print("Reach\n");
break;
}
}
}

8
ARMv8/MMU.cpp
View file

@ -15,8 +15,8 @@ static T ReadFromRAM(const uint64_t gpa) {
std::memcpy (&byte, &Memory::pRAM[addr], sizeof(uint8_t));
value = (value << 8) | byte;
}
uint8_t *ptr = &Memory::pRAM[gpa];
bindump (ptr, 2 * sizeof(T));
// uint8_t *ptr = &Memory::pRAM[gpa];
// bindump (ptr, 2 * sizeof(T));
return value;
}
@ -27,8 +27,8 @@ static void WriteToRAM(const uint64_t gpa, T value) {
std::memcpy (&Memory::pRAM[addr], &byte, sizeof(uint8_t));
value >>= 8;
}
uint8_t *ptr = &Memory::pRAM[gpa];
bindump (ptr, 2 * sizeof(T));
// uint8_t *ptr = &Memory::pRAM[gpa];
// bindump (ptr, 2 * sizeof(T));
}
uint8_t ReadU8(const uint64_t gva) {

4
Memory.cpp
View file

@ -21,12 +21,12 @@ static RAMBlock mem_map[] =
RAMBlock (".text", 0x0, 0x10000, PROT_READ | PROT_WRITE | PROT_EXEC),
RAMBlock (".rdata", 0x10000, 0x10000, PROT_READ | PROT_WRITE),
RAMBlock (".data", 0x20000, 0x10000, PROT_READ | PROT_WRITE),
RAMBlock ("[stack]", 0x30000, 0x10000, PROT_READ | PROT_WRITE),
RAMBlock ("[stack]", 0x30000, 0x4000000, PROT_READ | PROT_WRITE),
};
void InitMemmap(Nsemu *nsemu) {
void *data;
if ((data = mmap (nullptr, 0x100000, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0)) == MAP_FAILED) {
if ((data = mmap (nullptr, 0x5000000, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0)) == MAP_FAILED) {
ns_abort ("Failed to allocate host memory\n");
}
pRAM = (uint8_t *) data;