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103 lines
2.6 KiB
ArmAsm
103 lines
2.6 KiB
ArmAsm
#include <ogc/machine/asm.h>
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.section .text.dsi_exceptionhandler,"ax",@progbits
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.globl dsi_exceptionhandler
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dsi_exceptionhandler:
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stw r11,GPR1_OFFSET(sp)
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stmw r13,GPR13_OFFSET(sp)
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psq_st fr0,PSR0_OFFSET(sp),0,0
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stfd fr0,FPR0_OFFSET(sp)
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psq_st fr1,PSR1_OFFSET(sp),0,0
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stfd fr1,FPR1_OFFSET(sp)
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psq_st fr2,PSR2_OFFSET(sp),0,0
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stfd fr2,FPR2_OFFSET(sp)
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psq_st fr3,PSR3_OFFSET(sp),0,0
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stfd fr3,FPR3_OFFSET(sp)
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psq_st fr4,PSR4_OFFSET(sp),0,0
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stfd fr4,FPR4_OFFSET(sp)
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psq_st fr5,PSR5_OFFSET(sp),0,0
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stfd fr5,FPR5_OFFSET(sp)
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psq_st fr6,PSR6_OFFSET(sp),0,0
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stfd fr6,FPR6_OFFSET(sp)
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psq_st fr7,PSR7_OFFSET(sp),0,0
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stfd fr7,FPR7_OFFSET(sp)
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psq_st fr8,PSR8_OFFSET(sp),0,0
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stfd fr8,FPR8_OFFSET(sp)
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psq_st fr9,PSR9_OFFSET(sp),0,0
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stfd fr9,FPR9_OFFSET(sp)
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psq_st fr10,PSR10_OFFSET(sp),0,0
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stfd fr10,FPR10_OFFSET(sp)
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psq_st fr11,PSR11_OFFSET(sp),0,0
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stfd fr11,FPR11_OFFSET(sp)
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psq_st fr12,PSR12_OFFSET(sp),0,0
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stfd fr12,FPR12_OFFSET(sp)
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psq_st fr13,PSR13_OFFSET(sp),0,0
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stfd fr13,FPR13_OFFSET(sp)
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mffs fr0
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stfd fr0,FPSCR_OFFSET(sp)
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mfdsisr r3
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mfdar r4
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bl vm_dsi_handler
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cmpwi r3,0
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bne 1f
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mr r3,sp
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b c_default_exceptionhandler
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1: lfd fr0,FPSCR_OFFSET(sp)
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mtfsf 0xFF,fr0
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psq_l fr13,PSR13_OFFSET(sp),0,0
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lfd fr13,FPR13_OFFSET(sp)
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psq_l fr12,PSR12_OFFSET(sp),0,0
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lfd fr12,FPR12_OFFSET(sp)
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psq_l fr11,PSR11_OFFSET(sp),0,0
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lfd fr11,FPR11_OFFSET(sp)
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psq_l fr10,PSR10_OFFSET(sp),0,0
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lfd fr10,FPR10_OFFSET(sp)
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psq_l fr9,PSR9_OFFSET(sp),0,0
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lfd fr9,FPR9_OFFSET(sp)
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psq_l fr8,PSR8_OFFSET(sp),0,0
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lfd fr8,FPR8_OFFSET(sp)
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psq_l fr7,PSR7_OFFSET(sp),0,0
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lfd fr7,FPR7_OFFSET(sp)
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psq_l fr6,PSR6_OFFSET(sp),0,0
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lfd fr6,FPR6_OFFSET(sp)
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psq_l fr5,PSR5_OFFSET(sp),0,0
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lfd fr5,FPR5_OFFSET(sp)
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psq_l fr4,PSR4_OFFSET(sp),0,0
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lfd fr4,FPR4_OFFSET(sp)
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psq_l fr3,PSR3_OFFSET(sp),0,0
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lfd fr3,FPR3_OFFSET(sp)
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psq_l fr2,PSR2_OFFSET(sp),0,0
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lfd fr2,FPR2_OFFSET(sp)
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psq_l fr1,PSR1_OFFSET(sp),0,0
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lfd fr1,FPR1_OFFSET(sp)
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psq_l fr0,PSR0_OFFSET(sp),0,0
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lfd fr0,FPR0_OFFSET(sp)
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lwz r0,CR_OFFSET(sp)
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mtcr r0
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lwz r0,LR_OFFSET(sp)
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mtlr r0
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lwz r0,CTR_OFFSET(sp)
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mtctr r0
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lwz r0,XER_OFFSET(sp)
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mtxer r0
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lwz r0,SRR0_OFFSET(sp)
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mtsrr0 r0
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lwz r0,SRR1_OFFSET(sp)
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mtsrr1 r0
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lwz r12,GPR12_OFFSET(sp)
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lwz r11,GPR11_OFFSET(sp)
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lwz r10,GPR10_OFFSET(sp)
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lwz r9,GPR9_OFFSET(sp)
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lwz r8,GPR8_OFFSET(sp)
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lwz r7,GPR7_OFFSET(sp)
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lwz r6,GPR6_OFFSET(sp)
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lwz r5,GPR5_OFFSET(sp)
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lwz r4,GPR4_OFFSET(sp)
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lwz r3,GPR3_OFFSET(sp)
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lwz r2,GPR2_OFFSET(sp)
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lwz r0,GPR0_OFFSET(sp)
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addi sp,sp,EXCEPTION_FRAME_END
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rfi
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