Commit graph

1116 commits

Author SHA1 Message Date
tehpola
958ad3fc37 A semi-broken bit of code that allows multiple-loads in the dynarec. 2009-10-12 21:52:44 +00:00
tehpola
8b0611e74b You can now return to the dynarec after going back to the menu. 2009-10-12 21:48:09 +00:00
tehpola
437b1499a2 Avoid any overlapping blocks (I think this is _the_ fix). 2009-10-12 21:47:37 +00:00
tehpola
21c8eba2d1 Reenabled INTERPRET_FP_SQRT because the implementation caused visible
artifacts.  Check for FP unavailable and take the exception if 
necessary.
2009-10-12 21:40:23 +00:00
tehpola
12d554c0e8 Doing a proper heap-sort in update_lru by creating a new heap. 2009-10-12 21:32:56 +00:00
tehpola
c78650fb13 Updating my Interpreter.h to recompile CFC1 and CTC1. 2009-10-12 21:31:07 +00:00
tehpola
f5d5b214e6 CFC1 and CTC1 implemented. 2009-10-12 21:29:52 +00:00
tehpola
99cc0eb461 Implemented FP comparisons. 2009-10-12 21:25:51 +00:00
emukidid
210a3c4856 Fixed Dev Menu to not cover TLB Cache item. 2009-10-12 21:24:33 +00:00
sepp256
c5ed34b4df Added new timer functions & Menu item.
Added %idle to profiling.
Updated glN64 Makefiles.
2009-10-12 21:21:07 +00:00
emukidid
0d144e2d6c fixed ROM-Cache.c for GC again. 2009-10-12 21:15:59 +00:00
tehpola
1baeff4a95 Fixed up Makefile.GLN64_dev, added missing files. 2009-10-10 21:25:15 +00:00
tehpola
95b3df7045 Moving my 'private' codebase private svn tehpola branch. No idea if
this will compile and work.
2009-10-10 21:24:29 +00:00
sepp256
e03323a43a - Fixed filtering for TexRects.
- Improved texture filtering for triangles, too.
- Rampage looks awesome now and many other games look better.
2009-10-10 18:02:30 +00:00
tehpola
4201597f87 Unrolled my inner loop in MultMatrix and used constants for values of j. 2009-10-10 16:49:51 +00:00
sepp256
7895eb184d 3DMath.h - Cleaned up MatrixMult to only have 1 copy of PS asm.
CRC.cpp - Fixed palette CRC calculation.  Should fix Rampage menu text.  Untested.
2009-10-10 06:30:47 +00:00
tehpola
00fb826fc8 Reimplemented MultMatrix using paired singles and hopefully in a more
cache-aware order.
2009-10-09 23:03:31 +00:00
sepp256
477bb3ab4c Fixing textures for PS3 - Take 1. 2009-10-09 22:06:31 +00:00
sepp256
aaa8a8c669 Changed some 3DMath.h functions with gu functions. Untested. 2009-10-09 22:06:04 +00:00
sepp256
1ddb7a3213 Added tehpola's MultMatrix using PS. Untested, so revert if this breaks things. 2009-10-09 22:05:33 +00:00
tehpola
dc01b24ee6 GEN_FRSQRTE and SQRT_FP commit. 2009-10-09 21:44:47 +00:00
tehpola
37ebd55d65 Implementation of FLOOR.W.FP, CEIL.W.FP, ROUND.W.FP. 2009-10-09 21:42:42 +00:00
tehpola
0eedce99c7 Implementation of TRUNC.W.FP. 2009-10-09 21:42:07 +00:00
tehpola
3251f77cca Adding Recomp-Cache-Heap which uses a heap to maintain a workable LRU
ordering rather than the linked list used in Recomp-Cache.
2009-10-09 21:37:23 +00:00
tehpola
5d45803916 Replacing branches out to the jump_pad with blr. Enabling calling
RecompCache_Update.  Even though it slows down performance when there's 
no recompilation, it improves RecompCache thrashing (actually determines 
LRU).
2009-10-09 21:36:33 +00:00
tehpola
2a5ba145d1 Reworked dynarec prologue/epilogue so gcc does most of the work and
there's no longer a need for restoring registers in recompiled code.
2009-10-09 21:35:10 +00:00
tehpola
ea585c8ae7 Updating Interpreter.h to reflect what seems to be working now. 2009-10-09 21:32:41 +00:00
tehpola
3f8c946be3 Few small changes, notably added recompilation to profiling.
DEBUG_STATS must be defined for stats to show up (conflicts with 
PROFILE).
2009-10-09 21:31:50 +00:00
tehpola
9aae498b84 Implementation (untested) of MFC1. 2009-10-09 21:27:41 +00:00
sepp256
0e47a238f1 Latest glN64 from main trunk merged. 2009-10-09 21:20:12 +00:00
tehpola
d610875ec5 Implementation of CVT.fmt.W. 2009-10-09 02:17:32 +00:00
tehpola
93059be7e7 Defining PPC_FUNC_STFIWX. 2009-10-09 02:17:15 +00:00
tehpola
ec11031ec5 Implemented CVT.W.FMT (untested). Fixed a typo. 2009-10-09 02:16:50 +00:00
tehpola
0abe6a3c79 Fixed a couple minor issues wrt unmapping registers properly. 2009-10-09 02:16:20 +00:00
tehpola
70324c0ca1 Apparently, the words in FP registers are flipped around: fixing DMTC1
and adding an untested fix for DMFC1 (which is likely not correct).
2009-10-09 02:15:55 +00:00
tehpola
bd42eaeebe Added invalidateRegister and invalidateFPR and (untested) implementation
of MTC1 and DMTC1.
2009-10-09 02:15:14 +00:00
tehpola
801c0ef756 Recompile CVT.D.S and CVT.S.D. 2009-10-09 02:14:33 +00:00
tehpola
359abcdac0 Correcting GEN_FMUL to use RC for the second operand rather than RB. 2009-10-09 02:14:13 +00:00
tehpola
3c454def0a FPR mapping seems to work by indirectly using reg_cop1_simple and
reg_cop1_double rather than the array directly now.  Not all recompiled 
FP instructions work correctly though.
2009-10-09 02:13:38 +00:00
tehpola
5c5c0f01e3 Fixed a couple minor FPR mapping bugs. 2009-10-09 02:13:11 +00:00
tehpola
20256d7c09 Added FP recompilation code, but none of the instructions work yet. 2009-10-09 02:12:40 +00:00
tehpola
f32e6e125d Finishing up FPR mapping code. 2009-10-09 02:12:13 +00:00
tehpola
7e41531a61 Removed old TODO regarding 64-bit mappings. 2009-10-09 02:11:37 +00:00
tehpola
8d36bfea83 Recompilation of SW/SH/SB, removed gen_interrupt prints from screen (it would slow things down). 2009-10-09 02:11:18 +00:00
tehpola
dd836b8ee3 LW now detects whether the address is in SP_DMEM or rdram and loads from
the correct location.
2009-10-09 02:10:53 +00:00
tehpola
c6e2894ab5 LB,SB,LH,SH,LW,SW added to MIPS-to-PPC.c but still interpreted via Interpreter.h 2009-10-09 02:10:27 +00:00
tehpola
5c67851bd0 GEN_STFS and GEN_STFD. 2009-10-09 02:10:09 +00:00
tehpola
a5295696ef Put rdram and reg_cop1_fgr_64 in registers, begin support for FPR
mapping.
2009-10-09 02:09:51 +00:00
tehpola
94857e836f Updated Makefiles and removed warning from Register-Cache.c 2009-10-09 02:09:14 +00:00
tehpola
78e7a76d7e Moved register mapping code into its own file. 2009-10-09 02:08:00 +00:00