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  • 262297d6d3 Fix padding for vertices table. Paul Holden 2023-08-22 23:13:34 +01:00
  • 79512b37cb Colorise rgba values in the vertex table. Paul Holden 2023-08-22 22:02:45 +01:00
  • ec5489d675 Add disassembly for executeGBI1_CullDL. Paul Holden 2023-08-22 13:33:10 +01:00
  • 86d26bd8c1 Ignore G_TEXTURE_ENABLE in executeGBI2_GeometryMode. Paul Holden 2023-08-22 13:31:55 +01:00
  • 78e71f211d Make the cycle type check explicit in setProgramState. Paul Holden 2023-08-22 13:31:21 +01:00
  • 0c590b1b54 Fix Geometry Mode padding. Paul Holden 2023-08-22 08:22:35 +01:00
  • 62a88467db CullDL is implemented the same for GBI1 and 2 (still missing impl though...) Paul Holden 2023-08-21 23:17:29 +01:00
  • 555f2c9086 Implement executeGBI2_Quad. Paul Holden 2023-08-21 23:14:47 +01:00
  • a5bf0b3f10 Update flushTris to take triangle count, not vert count. Paul Holden 2023-08-21 23:14:16 +01:00
  • af7ace8c97 Fix displaylist indentation - depths of 0 and 1 had the same indent. Paul Holden 2023-08-21 22:07:55 +01:00
  • cabba09921 Update comments. Paul Holden 2023-08-21 16:15:56 +01:00
  • cfe3fab3f1 Fix LWC1, LDC1, SWC1, SDC1 dynarec (ExceptPC was wrong). Paul Holden 2023-08-21 16:15:30 +01:00
  • 75c677ba24 Add an assert to check we're not trying to update an already-compiled fragment. Paul Holden 2023-08-21 16:12:20 +01:00
  • f040c8c1dd Tidy. Paul Holden 2023-08-21 16:10:22 +01:00
  • 9209395c2e Fix return. Paul Holden 2023-08-21 16:08:42 +01:00
  • 8f88fa0ee6 Fix dynarec when jumping to chained fragment that was partially compiled. Paul Holden 2023-08-21 15:38:24 +01:00
  • 81dc7cb3c8 Remove some logging. Paul Holden 2023-08-21 15:12:30 +01:00
  • 3be605c723 Reset fragment on AdEL exception. Paul Holden 2023-08-21 14:29:38 +01:00
  • de774b08e9 Remove some debugging that's no longer useful. Paul Holden 2023-08-21 14:14:25 +01:00
  • 3a6766c99c Rename local var. Paul Holden 2023-08-21 14:11:30 +01:00
  • 930be04536 Rename body_code -> bodyCode. Paul Holden 2023-08-21 12:17:35 +01:00
  • d25b25c793 Tidy updateFragment. Paul Holden 2023-08-21 12:15:29 +01:00
  • 91d03379e2 Reorder dynarec code. Paul Holden 2023-08-21 12:10:49 +01:00
  • d68cc73798 Invalidate partially compiled fragments rather than returning a null fragment. Paul Holden 2023-08-21 12:08:29 +01:00
  • aacbee5f9a Add some debug logging to dynarec output. Paul Holden 2023-08-21 12:06:19 +01:00
  • 1e1f47cdeb Extract compileFragment. Paul Holden 2023-08-21 12:04:37 +01:00
  • 8d344f927a Fix kValidateDynarecPCs. Paul Holden 2023-08-21 12:02:47 +01:00
  • 3fc9db60ae Log PCs in hex. Paul Holden 2023-08-21 12:01:44 +01:00
  • 998d246f1d Extract some constants for tuning and debugging dynarec. Paul Holden 2023-08-21 10:36:18 +01:00
  • 13b6204366 Fix cache invalidation - the entire cache line should be invalidated. Paul Holden 2023-08-21 10:34:30 +01:00
  • 18d736022f Fix event used to trigger redraw when a tab is selected. Paul Holden 2023-08-21 08:22:34 +01:00
  • a35ab10eeb Fix ERET with SR_ERL - was clearing all but this bit. Paul Holden 2023-08-21 08:05:07 +01:00
  • 6240afc5b3 Don't generate HTML output in dynarec comments. Paul Holden 2023-08-21 07:56:07 +01:00
  • 5693da17bd Fix generated trap instructions. Paul Holden 2023-08-20 23:11:03 +01:00
  • f7a8e38c3d Fix generateADDIU - this can't generate overflow. Paul Holden 2023-08-20 23:07:51 +01:00
  • a36d82faa9 Fix generateDADDI - this can raise an overflow exception. Paul Holden 2023-08-20 23:06:51 +01:00
  • f192a0bfac Fix generated DADDIU. Paul Holden 2023-08-20 22:55:59 +01:00
  • aa5e429e03 Remove generateOpHelper. Paul Holden 2023-08-20 20:40:58 +01:00
  • eb593ba8db generateCop1 doesn't need fallback code. Paul Holden 2023-08-20 20:31:56 +01:00
  • 95a49befcd Add generateBreakpoint. Paul Holden 2023-08-20 18:25:24 +01:00
  • 3d9aac7274 Add generateUnknown. Paul Holden 2023-08-20 18:21:40 +01:00
  • f4415b7b74 Generate the remaining regimm instructions. Paul Holden 2023-08-20 15:20:34 +01:00
  • 46c2bdc956 Just use this. Paul Holden 2023-08-20 15:19:55 +01:00
  • 2dfbcf87cd Generate TGEI etc. Paul Holden 2023-08-20 15:10:47 +01:00
  • 7a0be6ff79 Stub out missing load/store to coprocessor instructions. Paul Holden 2023-08-20 15:01:25 +01:00
  • 69a4f05c2d Step RSP from dynarec. Paul Holden 2023-08-20 14:32:14 +01:00
  • 98fe9be3df Generate LL, SC etc. Paul Holden 2023-08-20 14:11:16 +01:00
  • 19735e61d7 Inline simpleTable instructions. Paul Holden 2023-08-19 16:35:38 +01:00
  • c5c3ce382a Add generators for the cop1 move instructions. Paul Holden 2023-08-19 16:14:43 +01:00
  • 70e6b418f6 Add generators for the cop2 instructions. Paul Holden 2023-08-19 15:49:57 +01:00
  • 8c671ed327 Move Cop0 code. Paul Holden 2023-08-19 15:49:22 +01:00
  • 553f394696 Stub out cop2 and cop2 generation. Paul Holden 2023-08-19 15:36:44 +01:00
  • 8bf659d9b0 Remove some unused exports. Paul Holden 2023-08-19 14:02:44 +01:00
  • c0d0cb4df1 Add generators for BLEZL and BGTZL. Paul Holden 2023-08-19 13:58:59 +01:00
  • a02cc43d78 Use template string. Paul Holden 2023-08-19 13:52:42 +01:00
  • 33ce8005ca Add generators for LWL etc. Paul Holden 2023-08-19 13:49:16 +01:00
  • 30559ac442 Add generators for the remaining cop0 instructions. Paul Holden 2023-08-19 13:41:46 +01:00
  • 91a1ea1452 Inline special functions. Paul Holden 2023-08-19 13:31:43 +01:00
  • a27503e23c genCalcAddressS32 and genCalcAddressU32 are unused. Paul Holden 2023-08-19 13:30:52 +01:00
  • 562344a212 Decode+execute for LL/SC instructions. Paul Holden 2023-08-19 13:18:50 +01:00
  • 05854dddf3 Dedupe code generation for CACHE. Paul Holden 2023-08-19 13:08:54 +01:00
  • 8cea3deba9 Decode+execute for store instructions. Paul Holden 2023-08-19 13:01:57 +01:00
  • 88c7b48e8b Decode+execute for load instructions. Paul Holden 2023-08-19 12:40:56 +01:00
  • 4d25a4d9db Decode+execute for SLTI/SLTIU/ANDI/ORI/XORI/LUI. Paul Holden 2023-08-19 12:17:40 +01:00
  • 085642de94 Decode+execute for ADDI + variants. Paul Holden 2023-08-19 09:08:27 +01:00
  • ddf32cc068 Add generators for the remaining special instructions. Paul Holden 2023-08-19 08:46:50 +01:00
  • 02964fee6a Format. Paul Holden 2023-08-19 08:23:19 +01:00
  • 5c6d1d4b87 Split branch instructions into decode+execute. Paul Holden 2023-08-18 17:25:05 +01:00
  • cdc5c08aca Convert MF/MTC0 and trap instructions into decode+execute parts. Paul Holden 2023-08-18 16:49:00 +01:00
  • 0f086bc182 Convert some arithmetic instructions into decode+execute parts. Paul Holden 2023-08-18 06:38:48 +01:00
  • fc788b312a Convert some arithmetic instructions into decode+execute parts. Paul Holden 2023-08-18 06:17:02 +01:00
  • ff04212ed9 Start to split instructions into separate functions to decode and execute. Paul Holden 2023-08-17 13:44:38 +01:00
  • a6361f0396 Run JPG and VID tasks on the RSP. Paul Holden 2023-08-17 13:17:42 +01:00
  • 1e90beeaa0 Improve interaction of stuffToDo when running the RSP. Paul Holden 2023-08-17 13:17:18 +01:00
  • 31292413c2 Fix setCompare. Paul Holden 2023-08-17 10:44:58 +01:00
  • 4a1782a0b6 Format Paul Holden 2023-08-17 10:43:19 +01:00
  • 6f91717d96 Don't redraw debugger content when it's hidden. Paul Holden 2023-08-17 10:05:23 +01:00
  • aa92024727 Run the RSP in parallel to the CPU. Paul Holden 2023-08-17 08:38:29 +01:00
  • c82ff8cc1d Remove logging about cache invalidation. Paul Holden 2023-08-17 08:25:29 +01:00
  • f69a0619d1 Take a deep reference to the SPIBIST registers to access the program counter. Paul Holden 2023-08-16 23:05:40 +01:00
  • eceed3bfc7 Use setControlU64 rather than moveToControl as the latter ignores writes to readonly registers. Paul Holden 2023-08-16 22:57:24 +01:00
  • ec2ca02fdb Boundscheck reads and writes. Paul Holden 2023-08-16 22:47:33 +01:00
  • 9cd02f5a3a Raise AdEL or AdES exceptions for unaligned accesses. Paul Holden 2023-08-16 20:50:24 +01:00
  • c3a7a6c2cf Use the tvType from rominfo rather than switching on the country code. Paul Holden 2023-08-16 09:14:13 +01:00
  • 492ea11e30 Format Paul Holden 2023-08-16 09:05:18 +01:00
  • fe6540d9a9 Pick up changes from https://github.com/hulkholden/daedalus/blob/master/Source/Core/ROM.cpp. Paul Holden 2023-08-16 09:04:56 +01:00
  • 4f39f8be6c Tidy Paul Holden 2023-08-16 08:47:52 +01:00
  • 37c8f33e9e Fix boot for CIC x105. Paul Holden 2023-08-15 23:15:04 +01:00
  • 6c4d141c6c Print whether it's the CPU or RSP executing an unknown op. Paul Holden 2023-08-15 09:12:44 +01:00
  • 7128987d37 Call reset() on all devices. Paul Holden 2023-08-14 22:02:34 +01:00
  • 50b3211292 BadVAddr should be sign extended. Paul Holden 2023-08-14 20:43:04 +01:00
  • 81a36a7b78 Halting through SP_SET_HALT shouldn't set BROKE. Paul Holden 2023-08-14 20:31:47 +01:00
  • 44d3bd5a12 Implement SP_SEMAPHORE_REG. Paul Holden 2023-08-14 20:22:09 +01:00
  • 5c69a3119c Both read and write length registers are set at the end of DMA transfer. Paul Holden 2023-08-14 20:08:04 +01:00
  • f31e6c53bb Fix setOrClear - should return original bits if neither set nor clear specified. Paul Holden 2023-08-14 20:06:17 +01:00
  • 552d550fad Fix SP status flags. Paul Holden 2023-08-14 09:06:26 +01:00
  • e2f4d1beb3 Don't run RSP if both SP_SET_HALT and SP_CLR_HALT are set. Paul Holden 2023-08-14 08:45:45 +01:00
  • a9398ec417 Fully implement moveFromControl and moveToControl. Paul Holden 2023-08-14 08:35:43 +01:00
  • e29a99fff5 Merge vectorRecip and vectorRecipSqrt. Paul Holden 2023-08-14 00:03:47 +01:00
  • 6c2f82ba44 Tidy reciprocal functions. Paul Holden 2023-08-14 00:00:34 +01:00