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  • 73c3e3b621 Rearrange DSxx32 functions Paul Holden 2012-08-13 23:34:30 +01:00
  • 18eda93e95 DSRAV/DSRLV/DSLLV/ Paul Holden 2012-08-13 23:31:48 +01:00
  • 0bab6e0693 Fix disassembly for DSLLV/DSRV/DSRAV Paul Holden 2012-08-09 23:30:14 +01:00
  • bcc362f4dd Blend mode 0x0000 Paul Holden 2012-08-09 23:19:49 +01:00
  • 523c2bdcd0 Fix trailing whitespace Paul Holden 2012-08-09 23:09:19 +01:00
  • 544b461aac Better tex coord generation Paul Holden 2012-08-09 23:05:25 +01:00
  • b475e73675 Add comment Paul Holden 2012-08-09 23:04:42 +01:00
  • 6e9abc09b2 Fix normals Paul Holden 2012-08-09 23:04:28 +01:00
  • a5e56ca99a Find the palette correctly in more circumstances Paul Holden 2012-08-08 19:22:02 +01:00
  • f7a1c839b7 Handle blend mode which seems to just fade mem values to black Paul Holden 2012-08-08 16:02:48 +01:00
  • 5fa610c1a1 RGBA/8 textures should be interpreted as CI/8 Paul Holden 2012-08-08 16:00:08 +01:00
  • d28a054ef0 Silence DPC spam Paul Holden 2012-07-27 13:24:54 +01:00
  • 12c1df43a5 DSLL/DSRL/DSRA Paul Holden 2012-07-27 13:22:32 +01:00
  • 92b4bbe2a5 Fix DSLL32 - was clobbering lo reg before it was used Paul Holden 2012-07-27 13:15:01 +01:00
  • de6195879e Handle writes to vram, and throw tlb refill/tlb miss correctly Paul Holden 2012-07-26 22:27:38 +01:00
  • 5089f06a8f Execute nextPC update before reading the instruction - if the read executes from vram, this was clobbering jump to exception vector. Think that we still need some special handling to avoid modifying registers if read throws tlb miss/refill Paul Holden 2012-07-26 22:25:43 +01:00
  • 2c7465009b Fix LD bug - memaddr() was called twice, but the register it was using can be modified Paul Holden 2012-07-26 22:22:15 +01:00
  • d340c70615 Poke memory size after initial load Paul Holden 2012-07-26 00:19:06 +01:00
  • bc87f9f888 RomDB support - not using save yet. Calculate CIC correctly Paul Holden 2012-07-25 23:11:10 +01:00
  • d6c927eba3 Handle F3DLX as GBI1 Paul Holden 2012-07-25 21:10:52 +01:00
  • 7cef3a5888 Silence reads from d1a2 Paul Holden 2012-07-25 20:42:03 +01:00
  • 75d861bed9 Fix a couple of bugs with tile uls/ult offsets Paul Holden 2012-07-25 20:34:16 +01:00
  • 4cf6b17b13 Support 2 cycle color combiner Paul Holden 2012-07-25 09:22:37 +01:00
  • 7fe0371701 basic disasssembly for some F3DEX ops Paul Holden 2012-07-25 09:20:21 +01:00
  • df18f897f2 Remove DMTC1 halt. Implement CVT.D.L Paul Holden 2012-07-25 09:09:59 +01:00
  • 4b9f023c83 Slightly more robust implementation of GBI1 detection Paul Holden 2012-07-25 00:28:40 +01:00
  • 3108b7d0b2 Fix disassembly of cop1 L instructions Paul Holden 2012-07-25 00:28:15 +01:00
  • f9fd187f23 Silence some spammy mempack tty Paul Holden 2012-07-24 23:36:37 +01:00
  • c79bfe8bb5 Support CI4 textures Paul Holden 2012-07-24 23:36:16 +01:00
  • 40e9d55691 Fix clampTexture - was obliterating texture if width was ok, but height needed clamping Paul Holden 2012-07-24 23:35:42 +01:00
  • b8746b8b5f Support DPC regs, and block out DPS regs Paul Holden 2012-07-24 23:02:12 +01:00
  • a13e68cf6e Overhaul blending - Checking force_bl is totallt incorrect. Check alpha_cvg_select and cvg_x_alpha to figure out if we have alpha available, and then see what the blender ops are doing Paul Holden 2012-07-24 09:06:11 +01:00
  • 4bcfcbceca Refactor texture scale handling - treat 11.5 fixed point distinctly from the texture scale params Paul Holden 2012-07-24 09:03:01 +01:00
  • ab4de42f4c Silence some spam from G_MW_CLIP/G_MW_PERSPNORM Paul Holden 2012-07-24 09:00:34 +01:00
  • 0307f27c25 Support for CI textures Paul Holden 2012-07-22 10:12:35 +01:00
  • f75e5d952c Implement Tri2 Paul Holden 2012-07-18 00:06:27 +01:00
  • 0dd3be5d81 Fix displaylist vertex output (cmd was being passed, not cmd1). Also, add the other fields Paul Holden 2012-07-18 00:04:03 +01:00
  • 5294f79155 Texture scale fixed point fraction is likely 65536, not 65535 Paul Holden 2012-07-18 00:02:59 +01:00
  • ff7a573cef Share some duplicated code between flushTris and texRect Paul Holden 2012-07-16 23:47:35 +01:00
  • a2acad4f47 Support F3DEX 1.21 Paul Holden 2012-07-16 23:17:27 +01:00
  • 68828cc993 Reorder functions, move webgl stuff together Paul Holden 2012-07-16 23:16:50 +01:00
  • a4f43dd17a texrect() should use mux stuff for 1/2 cycle modes Paul Holden 2012-07-16 23:12:18 +01:00
  • 0a28ce0d13 fix indentation Paul Holden 2012-07-14 10:34:15 +01:00
  • a6ac75289b Much better code generation for sinstr/dinstr instructions Paul Holden 2012-07-14 10:32:37 +01:00
  • 3b6b5e6f85 Generate SLTI, SLTIU instrs Paul Holden 2012-07-13 22:21:12 +01:00
  • be57e52705 Add generation for more simple branch ops. Paul Holden 2012-07-13 22:01:16 +01:00
  • d5a678bfb3 Disable an expensive assert, and hoist 'next fragment' check outside of getNextFragment Paul Holden 2012-07-13 21:36:19 +01:00
  • 6e134ef94e Don't dump out the ucode info each frame Paul Holden 2012-07-13 21:35:31 +01:00
  • 38253154a4 Pass cpu0/ram into fragment functions rather than fetching each time Paul Holden 2012-07-13 18:38:10 +01:00
  • 8b10491d60 Reimplement matrix/vector stuff that we need - sylvester was insanely heavyweight Paul Holden 2012-07-13 18:36:39 +01:00
  • 3311c211d4 Controls for stick Paul Holden 2012-07-12 08:02:52 +01:00
  • 5efc6e98cd Texture filter Paul Holden 2012-07-12 00:06:59 +01:00
  • 0063506ee3 Inline branches, and avoid some work for non-likely branches Paul Holden 2012-07-11 23:48:27 +01:00
  • 552eab9f1b Change all memory accesses to use Uint8Array shuffles. It's far faster than DataView - see http://jsperf.com/endian-conversion Paul Holden 2012-07-11 23:47:21 +01:00
  • d786f0d44a Use a temporary when sign-extending - try to avoid an extra array dereference Paul Holden 2012-07-11 08:11:06 +01:00
  • b9131920d7 Generate less garbage from uvs Paul Holden 2012-07-10 23:56:03 +01:00
  • 7ee21163ca LDC1, SWC1, SDC1 Paul Holden 2012-07-10 23:47:09 +01:00
  • 1d780f076b Using signed read for instruction seems to work ok Paul Holden 2012-07-10 23:30:45 +01:00
  • ff618fd24a Add a signed version of control regs Paul Holden 2012-07-10 23:30:08 +01:00
  • 0602cabea6 Use signed regs for setGPR_64 Paul Holden 2012-07-10 23:29:18 +01:00
  • e2826f5313 Correctly handle clamp/mirror/wrap - custom mirror code probably isn't needed any more Paul Holden 2012-07-10 23:22:44 +01:00
  • da0c48eade IA4 and IA16 support Paul Holden 2012-07-10 22:50:46 +01:00
  • c71d276fd0 Very simple controller support (AZSX) Paul Holden 2012-07-10 22:26:41 +01:00
  • a572677988 Fix disassemble texrect tile_idx Paul Holden 2012-07-10 22:20:09 +01:00
  • 4628a50057 Mempack support Paul Holden 2012-07-10 22:19:24 +01:00
  • ac423c7a3f TexRectFlip Paul Holden 2012-07-10 20:10:24 +01:00
  • a3ba4a176b Handle depth buffer correctly for texrect Paul Holden 2012-07-10 08:53:42 +01:00
  • 3110b790ec TexRect support Paul Holden 2012-07-10 08:17:00 +01:00
  • a0cee2cd1a Fix texture pitch calculation via loadtile Paul Holden 2012-07-10 08:15:27 +01:00
  • a2d745d16d Support for RGBA32 textures Paul Holden 2012-07-10 07:54:12 +01:00
  • 5ea419efa8 Implement mirror mode emulation for textures Paul Holden 2012-07-09 21:25:55 +01:00
  • 2a26b8014f fix indentation Paul Holden 2012-07-09 08:21:45 +01:00
  • ebccc03249 Simplify sinstr/dinstr Paul Holden 2012-07-09 00:24:34 +01:00
  • f265fbb077 tidy whitespace Paul Holden 2012-07-08 23:54:48 +01:00
  • 17e3c1e073 Implement generateSRAV/SLLV/SRLV Paul Holden 2012-07-08 23:52:58 +01:00
  • 21b260eaf5 Reimplement SLL/SRL/SRA Paul Holden 2012-07-08 23:36:26 +01:00
  • 71c83c249d Generate J/JAL/JALR/JR Paul Holden 2012-07-08 23:15:37 +01:00
  • ce1a9554c1 Improve cop1 performance Paul Holden 2012-07-08 22:44:15 +01:00
  • 9ac7034664 generateSD Paul Holden 2012-07-08 21:25:13 +01:00
  • cce230a779 Generate code for LH/LHU/LB/LBU/LWU Paul Holden 2012-07-08 21:08:20 +01:00
  • dc8a54366d Use local 'c' rather than cpu0 Paul Holden 2012-07-07 15:17:26 +01:00
  • 28cda83e4f Better implementation for generateBEW/generateBNE Paul Holden 2012-07-07 15:09:55 +01:00
  • 8382793648 Inline trivial ops Paul Holden 2012-07-07 14:35:53 +01:00
  • 9033c0c63a Implement generateADDI Paul Holden 2012-07-07 14:35:31 +01:00
  • 5e91f06bb2 Reimplement ADDU/SUBU etc directly, rather than via impl functions. Less work for the jitter and forces inlining Paul Holden 2012-07-07 10:48:41 +01:00
  • 5dcd16a271 Improve self-assignment for ADDIU, ORI, XORI. Improve generated code formatting a little Paul Holden 2012-07-07 09:51:45 +01:00
  • 8f071630f2 Generate code for ANDI/ORI/XORI/LUI Paul Holden 2012-07-07 09:30:57 +01:00
  • ca08aaf51e CLEAR/MOV are trivial ops Paul Holden 2012-07-07 09:13:35 +01:00
  • bea8758bec Comment Paul Holden 2012-07-07 09:08:53 +01:00
  • 5d49ab7b56 Identify sequences of trivial ops, so that we can eliminate branch delay checks Paul Holden 2012-07-07 09:07:29 +01:00
  • 66125fce92 Cache next fragments in an array - one per op - so that we can branch predict more accurately Paul Holden 2012-07-07 08:41:18 +01:00
  • 51e4a6fcc0 Add a todo Paul Holden 2012-07-07 08:23:07 +01:00
  • f1f144e2f0 Bump up the hot count threshold Paul Holden 2012-07-07 08:17:11 +01:00
  • 7a389ce186 Defer COUNT update until the end of the fragment Paul Holden 2012-07-07 08:12:42 +01:00
  • 6c7180cba6 prototypes Paul Holden 2012-07-07 08:09:34 +01:00
  • bd6c4fe1dc Change dynarec from 'stuff everything into one function' to 'generate function per op'. Lots of extra dynarec work Paul Holden 2012-07-05 23:59:15 +01:00
  • 170287e209 Argh, faster branchAddress calc was generating signed values Paul Holden 2012-07-04 23:24:08 +01:00
  • be360b8dfd Remove opsExecuted - one less thing to update Paul Holden 2012-07-03 08:02:32 +01:00
  • 45acab39d9 Tidy Paul Holden 2012-07-03 07:57:32 +01:00
  • 8b4a4d6e6a Silence viewport spam. Rename fragmentsRemoved Paul Holden 2012-07-03 07:55:55 +01:00