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  • f6299a916d Rename setGPR_s32_unsigned to setRegU32Extend. Paul Holden 2023-07-20 14:28:22 +01:00
  • 8e87f1c55b Tidy Paul Holden 2023-07-20 14:25:53 +01:00
  • 22a1560eab Rename genSrcRegHi to genSrcRegS32Hi. Paul Holden 2023-07-20 14:23:55 +01:00
  • aa0f8961e5 Rename genSrcRegLo to genSrcRegS32Lo. Paul Holden 2023-07-20 14:22:34 +01:00
  • 296148c6db Rename getGPR_s32_signed to getRegS32Lo. Paul Holden 2023-07-20 14:21:10 +01:00
  • f4b63829d3 Rename getGPR_s32_unsigned to getRegU32Lo. Paul Holden 2023-07-20 14:18:37 +01:00
  • f4dbb62c61 Log bad pagemasks rather than halting. Paul Holden 2023-07-20 14:13:31 +01:00
  • 06dbcff845 Rename getGPR_s32_hi_signed to getRegS32Hi. Paul Holden 2023-07-20 14:12:01 +01:00
  • c84f1dc77b Rename getGPR_s32_hi_unsigned to getRegU32Hi. Paul Holden 2023-07-20 14:09:34 +01:00
  • 606d9c9a40 Rename setGPR_s64_bigint to setRegU64. Paul Holden 2023-07-20 14:06:57 +01:00
  • d3a3f8e7df Tidy Paul Holden 2023-07-20 14:04:06 +01:00
  • 42f9a73e89 Rename getGPR_u64_bigint to getRegU64. Paul Holden 2023-07-20 14:03:50 +01:00
  • cd0d0c98aa Rename getGPR_s64_bigint to getRegS64. Paul Holden 2023-07-20 13:57:08 +01:00
  • 8150b48a30 Add BigUint64Array so 64 bit values can be read directly. Paul Holden 2023-07-20 08:14:44 +01:00
  • ba98d2ada6 Interleave gprLo/Hi into a single array. Paul Holden 2023-07-20 08:11:10 +01:00
  • dd98844ad9 Use register accessors. Paul Holden 2023-07-20 08:10:30 +01:00
  • 26c2355cec Clean up the last few uses of gprLo_signed. Paul Holden 2023-07-20 07:59:04 +01:00
  • 5110e7eaf8 Clean up last few direct uses of gprLo. Paul Holden 2023-07-20 07:54:38 +01:00
  • a2662c65a6 Use register accessors for LWL, LWR, SWL, SWR. Paul Holden 2023-07-20 07:50:57 +01:00
  • 8c81e2f1be Use register accessors for SLTI, SLTIU. Paul Holden 2023-07-20 07:49:41 +01:00
  • f5f6317cc1 Use register accessors for JALR, JR. Paul Holden 2023-07-20 07:48:22 +01:00
  • ee018dc408 Remove memaddr Paul Holden 2023-07-20 07:16:36 +01:00
  • a62df7cd46 Force r0 to be zero. Paul Holden 2023-07-20 07:13:03 +01:00
  • 36020f8de6 Use register accessors for CFC1. Paul Holden 2023-07-20 07:09:23 +01:00
  • a812d2c044 Replace setSignExtend with cpu0.setGPR_s32_signed. Paul Holden 2023-07-20 07:08:06 +01:00
  • 980c08bdac Use register accessors for SB, SH, SW, SD. Paul Holden 2023-07-20 07:02:14 +01:00
  • fe7f88e3f2 Use register accessors for LL, LLD, SC, SCD. Paul Holden 2023-07-20 06:56:39 +01:00
  • 2b519f6a04 Use register accessors for LD. Paul Holden 2023-07-20 06:48:54 +01:00
  • 85edffaaac Use register accessors for ANDI, ORI, XORI. Paul Holden 2023-07-19 14:12:15 +01:00
  • 12c42d1f7b Use register accessors for SLTI and SLTIU. Paul Holden 2023-07-19 14:07:19 +01:00
  • 87d027c532 Use register accessors for MFHI and MFLO. Paul Holden 2023-07-19 14:04:30 +01:00
  • af90045117 Use register accessors for branches. Paul Holden 2023-07-19 14:02:58 +01:00
  • 3daa584c40 Implement SLT and SLTU using BigInt. Paul Holden 2023-07-19 13:56:59 +01:00
  • ee34426352 Use register accessors for AND, OR, XOR, NOR. Paul Holden 2023-07-19 13:50:55 +01:00
  • 21df2824dc Use register accessors for ADD, ADDU, SUB, SUBU. Paul Holden 2023-07-19 13:47:19 +01:00
  • 12da78d5d1 Use register accessors for DIV and DIVU. Paul Holden 2023-07-19 13:46:09 +01:00
  • 9474c41f4c Use register accessors for MTHI, MTLO, MULT, MULTU. Paul Holden 2023-07-19 13:44:39 +01:00
  • 9cb67cdb8f Simplify DLLV, DSRLV, DSRAV using BigInt. Paul Holden 2023-07-19 13:43:41 +01:00
  • 6457e604b2 Simplify DSLL, DSRL, DSRA, DSLL32, DSRL32, DSRA32 using BigInt. Paul Holden 2023-07-19 13:39:05 +01:00
  • 1fc79c3bba Add a TODO. Paul Holden 2023-07-19 13:31:40 +01:00
  • cf5eba5749 Tidy SLLV, SRLV, SRAV. Paul Holden 2023-07-19 11:56:41 +01:00
  • dcd0b41c2a Tidy SLL, SRL, SRA. Paul Holden 2023-07-19 11:50:23 +01:00
  • 102592bc47 Add raiseAdELException. Paul Holden 2023-07-19 11:43:22 +01:00
  • f2a5286fa3 Change dynarec to access registers via CPU0 helpers. Paul Holden 2023-07-19 10:50:47 +01:00
  • 67118bba1a Implement SRA using BigInts. Paul Holden 2023-07-19 10:07:12 +01:00
  • 138aa0b0f6 Add some helpers to encapsulate gprLo access. Paul Holden 2023-07-19 09:53:56 +01:00
  • 11a7f5f097 Tidy DSLLV, DSRLV, DSRAV. Paul Holden 2023-07-19 09:50:31 +01:00
  • 03efb5a12f Tidy CPU0 constructor. Paul Holden 2023-07-19 09:36:27 +01:00
  • bc66378072 Tidy MFC1, DMFC1, CMTC1 Paul Holden 2023-07-19 09:32:56 +01:00
  • 177bbd08e2 Tidy SB, SH, SW, SD, SWC1, SDC1. Paul Holden 2023-07-19 09:23:24 +01:00
  • 814c55fcc7 Tidy LUI, LB, LBU, LH, LHU, LW, LWU. Paul Holden 2023-07-19 09:08:17 +01:00
  • 1652f5d5b3 Tidy SLLV, SRLV, SRAV. Paul Holden 2023-07-19 08:58:45 +01:00
  • 2dd13a1832 Tidy SLL, SRL, SRA. Paul Holden 2023-07-19 08:56:19 +01:00
  • 9301201f5d Implement integer overflow exceptions. Paul Holden 2023-07-18 23:47:17 +01:00
  • a2a9c8ddcb Add cop2 and cop3 disassembly. Paul Holden 2023-07-18 23:43:44 +01:00
  • e085712a41 Fix toString64_bigint - this was truncating the bigints and we really want to see all of it. Paul Holden 2023-07-18 22:50:48 +01:00
  • 1db13b3aac Fix branch and link instructions - these should check the condition before updating the register. Paul Holden 2023-07-18 22:28:26 +01:00
  • 10fcfcd5bd setZeroExtend is unused. Paul Holden 2023-07-18 21:52:49 +01:00
  • e42bcdedd5 Implement cop2 and cop3. Paul Holden 2023-07-18 21:52:17 +01:00
  • d9c39536fa MFC0 should sign extend. Paul Holden 2023-07-18 20:59:14 +01:00
  • cb8f3a48bd Tidy opcode initialisation. Paul Holden 2023-07-18 09:26:06 +01:00
  • 319bee1fa3 Move regImmTableGen next to regImmTable. Paul Holden 2023-07-18 09:11:43 +01:00
  • 5a0dbce690 Move specialTableGen next to specialTable. Paul Holden 2023-07-18 09:09:34 +01:00
  • bdd8abc039 Removing noisy 'cop1 unusable' logging. Paul Holden 2023-07-18 08:57:28 +01:00
  • 4b7e4744af DCFC1 and DCTC1 generate unimplemented FP exception. Paul Holden 2023-07-18 08:56:50 +01:00
  • 5377c9e1ac Throw cop1 unusable for LWC1/LDC1/SWC1/SDC1. Paul Holden 2023-07-18 08:45:15 +01:00
  • 1ea84b3dc5 Tidy CTC1 - cop1 usable check is done via executeCop1_disabled. Paul Holden 2023-07-18 08:36:02 +01:00
  • dbfd859e38 Log values in hex. Paul Holden 2023-07-17 23:47:29 +01:00
  • 305c3767ff Log values in hex. Paul Holden 2023-07-17 23:46:43 +01:00
  • 304b6b7b9c Avoid out of bounds array access in executeGBI1_Line3D. Paul Holden 2023-07-17 23:39:30 +01:00
  • d5abc5c044 Implement f64UnaryOp using a lookup table. Paul Holden 2023-07-17 23:31:08 +01:00
  • f4e18ada7f Remove overflow checks. Paul Holden 2023-07-17 23:30:08 +01:00
  • 4ceddaad56 Add support for logging ISViewer debug output. Paul Holden 2023-07-17 23:24:22 +01:00
  • 2ce95c9ea3 Improve rom.js logging - take read/write size into account. Paul Holden 2023-07-17 22:54:00 +01:00
  • 7b2ec6487c Implement f32UnaryOp using lookup tables. Paul Holden 2023-07-17 20:22:56 +01:00
  • 63e58953bc Refactor fXXUnaryOp like fXXBinaryOp. Paul Holden 2023-07-17 19:17:05 +01:00
  • 65eb0d0218 Move underflow rounding to a lookup table. Paul Holden 2023-07-17 19:03:54 +01:00
  • eee8df9b06 Rename classify functions. Paul Holden 2023-07-17 09:28:43 +01:00
  • d36cf94043 Dedupe the weird exception handling around underflows. Paul Holden 2023-07-17 09:26:23 +01:00
  • f56bc2a2e9 Improve exception handling for ADD/SUB/MUL/DIV .D. Paul Holden 2023-07-17 09:19:43 +01:00
  • f8ae23d9a8 Tidy f32BinaryOp. Paul Holden 2023-07-17 09:19:00 +01:00
  • 3192c9399b Implement overflow check by just checking if finite values produced infinity. Paul Holden 2023-07-17 09:18:21 +01:00
  • b22d4669b3 More ADD/SUB/MUL/DIV improvements for single precision. Paul Holden 2023-07-16 23:28:00 +01:00
  • e01bd88aae Handle DIV.S cases using a lookup table. Paul Holden 2023-07-16 15:12:40 +01:00
  • d30b474405 Improve DIV handling. Paul Holden 2023-07-15 22:32:27 +01:00
  • c7319b5f5a Improve ADD/SUB/MUL/DIV handling. Paul Holden 2023-07-15 22:05:19 +01:00
  • c89785fdc2 Create stubs for binary ops in cpu1.js. Paul Holden 2023-07-15 21:36:46 +01:00
  • 43d7150f1c Improve handling of unary ops (SQRT, NEG, ABS). Paul Holden 2023-07-15 21:30:14 +01:00
  • 09dc15c3ee Don't import convertModeDefault. Paul Holden 2023-07-15 21:27:35 +01:00
  • 073724f083 Get rid of convertModeDefault. Paul Holden 2023-07-15 20:58:58 +01:00
  • 354969dcb6 Improve rounding. Paul Holden 2023-07-15 20:50:34 +01:00
  • 55b98fc63f Improve CVT.D.L and CVT.S.L to raise unimplemented for values that are too large. Paul Holden 2023-07-15 20:32:49 +01:00
  • fce422f502 Fix some constant names. Paul Holden 2023-07-15 20:11:43 +01:00
  • b7a9949c11 Improve cop1 accuracy. Paul Holden 2023-07-15 20:11:08 +01:00
  • d03d9cb2d7 Don't log html elements to the console. Paul Holden 2023-07-15 09:50:40 +01:00
  • 717a7915e6 Add some constants for cop1 ops. Paul Holden 2023-07-15 09:48:33 +01:00
  • 5f82f7aec0 Implement correct NaN handling for cop1 CMP. Paul Holden 2023-07-15 09:13:39 +01:00
  • dd34746a7d Express constants as value << shift. Paul Holden 2023-07-15 08:59:52 +01:00
  • 30e8db70d8 Remove logging for switching betwee 32<->64 modes. Paul Holden 2023-07-14 21:56:44 +01:00
  • 1e3d8c7540 Implement MOV.{S,D} using ints. Paul Holden 2023-07-14 21:54:43 +01:00