diff --git a/src/emulated_exception.js b/src/emulated_exception.js
index 98e784e..f6e821a 100644
--- a/src/emulated_exception.js
+++ b/src/emulated_exception.js
@@ -2,4 +2,11 @@
 // EmulatedException interrupts processing of an instruction
 // and prevents state (such as memory or registers) being updated.
 export class EmulatedException {
+  constructor(msg) {
+    this.msg = msg;
+  }
+
+  toString() {
+    return this.msg;
+  }
 }
\ No newline at end of file
diff --git a/src/r4300.js b/src/r4300.js
index 7260314..3510f61 100644
--- a/src/r4300.js
+++ b/src/r4300.js
@@ -1183,14 +1183,14 @@ export class CPU0 {
     const tlb = this.tlbFindEntry(address);
     if (!tlb) {
       this.raiseTLBException(UT_VEC, cpu0reg.causeExcCodeTLBL, address);
-      throw new EmulatedException();
+      throw new EmulatedException('TLBL UT_VEC');
     }
 
     const odd = address & tlb.checkbit;
     const entryLo = odd ? tlb.pfno : tlb.pfne;
     if ((entryLo & TLBLO_V) === 0) {
       this.raiseTLBException(E_VEC, cpu0reg.causeExcCodeTLBL, address);
-      throw new EmulatedException();
+      throw new EmulatedException('TLBL E_VEC');
     }
 
     const phys = odd ? tlb.physOdd : tlb.physEven;
@@ -1202,18 +1202,18 @@ export class CPU0 {
     const tlb = this.tlbFindEntry(address);
     if (!tlb) {
       this.raiseTLBException(UT_VEC, cpu0reg.causeExcCodeTLBS, address);
-      throw new EmulatedException();
+      throw new EmulatedException('TLBS UT_VEC');
     }
 
     const odd = address & tlb.checkbit;
     const entryLo = odd ? tlb.pfno : tlb.pfne;
     if ((entryLo & TLBLO_V) === 0) {
       this.raiseTLBException(E_VEC, cpu0reg.causeExcCodeTLBS, address);
-      throw new EmulatedException();
+      throw new EmulatedException('TLBS E_VEC');
     }
     if ((entryLo & TLBLO_D) === 0) {
       this.raiseTLBException(E_VEC, cpu0reg.causeExcCodeMod, address);
-      throw new EmulatedException();
+      throw new EmulatedException('Mod E_VEC');
     }
 
     const phys = odd ? tlb.physOdd : tlb.physEven;
@@ -1223,12 +1223,12 @@ export class CPU0 {
 
   unalignedLoad(address) {
     this.raiseAdELException(address);
-    throw new EmulatedException();
+    throw new EmulatedException('AdEL load');
   }
 
   unalignedStore(address) {
     this.raiseAdESException(address);
-    throw new EmulatedException();
+    throw new EmulatedException('AdES store');
   }
 
   execBreakpoint() {