mirror of
https://github.com/Dillonb/n64.git
synced 2025-04-02 10:42:08 -04:00
299 lines
5.8 KiB
TOML
299 lines
5.8 KiB
TOML
input_desc = [
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"v128:v0",
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"v128:v1",
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"u32:vco",
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"u32:vcc",
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"u32:vce",
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"u32:padding",
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]
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output_desc = [
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"v128:res",
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"v128:accum_lo",
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"v128:accum_md",
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"v128:accum_hi",
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"u32:vco",
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"u32:vcc",
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"u32:vce",
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"u32:padding",
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]
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rsp_code = """
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li a0,$0
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li a1,$800
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vxor v2,v2
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lqv v0[e0],$00(a0)
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lqv v1[e0],$10(a0)
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lw t0,$20(a0)
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ctc2 t0,vco
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lw t0,$24(a0)
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ctc2 t0,vcc
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lw t0,$28(a0)
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ctc2 t0,vce
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vch v2,v0,v1
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sqv v2[e0],$00(a1)
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vsar v0,v0[e10] // VSAR E10 -> ACCUM_LO
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sqv v0[e0],$10(a1)
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vsar v0,v0[e9] // VSAR E9 -> ACCUM_MD
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sqv v0[e0],$20(a1)
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vsar v0,v0[e8] // VSAR E8 -> ACCUM_HI
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sqv v0[e0],$30(a1)
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li t0,0
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cfc2 t0,vco // T0 = RSP CP2 Control Register: VCO (Vector Carry Out)
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sw t0,$40(a1)
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li t0,0
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cfc2 t0,vcc // T0 = RSP CP2 Control Register: VCC (Vector Compare Code)
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sw t0,$44(a1)
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li t0,0
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cfc2 t0,vce // T0 = RSP CP2 Control Register: VCE (Vector Compare Extension)
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sw t0,$48(a1)
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break
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"""
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[[test]]
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name = "basic"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0x0000, # VCO
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0x0000, # VCC
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0x0000, # VCE
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0, # dummy
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]
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[[test]]
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name = "basic_rev"
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input = [
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v0
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v1
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0x0000, # VCO
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0x0000, # VCC
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0x0000, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_vco"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0xFFFF, # VCO
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0x0000, # VCC
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0x0000, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_vcc"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0x0000, # VCO
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0xFFFF, # VCC
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0x0000, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_vce"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0x0000, # VCO
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0x0000, # VCC
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0xFFFF, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_vco_vce"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0xFFFF, # VCO
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0x0000, # VCC
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0xFFFF, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_vcc_vce"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0x0000, # VCO
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0xFFFF, # VCC
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0xFFFF, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_vco_vcc"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0xFFFF, # VCO
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0xFFFF, # VCC
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0x0000, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_vco_vcc_vce"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0xFFFF, # VCO
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0xFFFF, # VCC
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0xFFFF, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_rand1"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0xAAAA, # VCO
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0xAAAA, # VCC
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0xAAAA, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_rand2"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0x5555, # VCO
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0x5555, # VCC
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0x5555, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_rand3"
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input = [
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v0
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v1
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0xAAAA, # VCO
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0x5555, # VCC
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0xAAAA, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_rand1_rev"
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input = [
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v0
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v1
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0xAAAA, # VCO
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0xAAAA, # VCC
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0xAAAA, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_rand2_rev"
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input = [
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v0
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v1
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0x5555, # VCO
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0x5555, # VCC
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0x5555, # VCE
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0, # dummy
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]
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[[test]]
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name = "with_rand3_rev"
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input = [
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0x1000_2001, 0x2FFF_4000, 0x9000_A001, 0xAFFF_C000, # v0
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0x1000_2000, 0x3000_4000, 0x9000_A000, 0xB000_C000, # v1
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0xAAAA, # VCO
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0x5555, # VCC
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0xAAAA, # VCE
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0, # dummy
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]
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[[test]]
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name = "neq1"
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input = [
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0x2233_2233, 0x2233_2233, 0x2233_2233, 0x2233_2233, # v0
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0xDDC9_DDCA, 0xDDCB_DDCC, 0xDDCD_DDCE, 0xDDCF_DDD0, # v1
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0x0000, # VCO
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0x0000, # VCC
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0x0000, # VCE
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0, # dummy
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]
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[[test]]
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name = "neq2"
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input = [
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0x2233_2233, 0x2233_2233, 0x2233_2233, 0x2233_2233, # v0
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0xDDC9_DDCA, 0xDDCB_DDCC, 0xDDCD_DDCE, 0xDDCF_DDD0, # v1
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0xFFFF, # VCO
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0xFFFF, # VCC
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0xFFFF, # VCE
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0, # dummy
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]
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[[test]]
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name = "neq3"
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input = [
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0x2233_2233, 0x2233_2233, 0x2233_2233, 0x2233_2233, # v0
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0x2230_2231, 0x2232_2233, 0x2234_2235, 0x2236_2237, # v1
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0x0000, # VCO
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0x0000, # VCC
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0x0000, # VCE
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0, # dummy
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]
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[[test]]
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name = "neq4"
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input = [
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0x2233_2233, 0x2233_2233, 0x2233_2233, 0x2233_2233, # v0
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0x2230_2231, 0x2232_2233, 0x2234_2235, 0x2236_2237, # v1
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0xFFFF, # VCO
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0xFFFF, # VCC
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0xFFFF, # VCE
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0, # dummy
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]
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[[test]]
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name = "neq5"
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input = [
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0xC233_2233, 0xC233_2233, 0xC233_2233, 0xC233_2233, # v0
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0xC230_2231, 0xC232_2233, 0xC234_2235, 0xC236_2237, # v1
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0x0000, # VCO
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0x0000, # VCC
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0x0000, # VCE
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0, # dummy
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]
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[[test]]
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name = "neq6"
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input = [
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0xC233_2233, 0xC233_2233, 0xC233_2233, 0xC233_2233, # v0
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0xC230_2231, 0xC232_2233, 0xC234_2235, 0xC236_2237, # v1
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0xFFFF, # VCO
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0xFFFF, # VCC
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0xFFFF, # VCE
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0, # dummy
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]
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