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90 lines
9.4 KiB
ReStructuredText
90 lines
9.4 KiB
ReStructuredText
Memory Map
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==========
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Virtual Memory Map
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-------------------
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**ALL** memory accesses made by the main CPU, both instruction fetches and through load/store instructions, use virtual addresses. These addresses are translated to physical addresses by the Memory Management Unit (MMU) before they are actually used to access hardware.
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+--------------+------------+-------+--------------------------------------------+
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| Address Range | Name | Description |
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+==============+============+=======+============================================+
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| 0x00000000 | 0x7FFFFFFF | KUSEG | User segment. TLB mapped |
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+--------------+------------+-------+--------------------------------------------+
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| 0x80000000 | 0x9FFFFFFF | KSEG0 | Kernel segment 0. Direct mapped, cached. |
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+--------------+------------+-------+--------------------------------------------+
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| 0xA0000000 | 0xBFFFFFFF | KSEG1 | Kernel segment 1. Direct mapped, no cache. |
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+--------------+------------+-------+--------------------------------------------+
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| 0xC0000000 | 0xDFFFFFFF | KSSEG | Kernel supervisor segment. TLB mapped. |
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+--------------+------------+-------+--------------------------------------------+
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| 0xE0000000 | 0xFFFFFFFF | KSEG3 | Kernel segment 3. TLB mapped. |
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+--------------+------------+-------+--------------------------------------------+
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Note that the cacheing mentioned above is not critical for emulation.
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Virtual-to-Physical Address Translation
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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For the direct mapped segments (KSEG0 and KSEG1), the translation is easy. Simply subtract the start of the segment the address is in from the address itself.
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For example, both virtual address 0x80001000 (in KSEG0) and virtual address 0xA0001000 (in KSEG1) would translate to the physical address 0x00001000.
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For TLB-mapped segments, things are a bit more complicated. See the :ref:`TLB section<TLB>` for more details.
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Physical Memory Map
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-------------------
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| Address Range | Name | Description |
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+===============+============+==============================+===========================================================================+
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| 0x00000000 | 0x003FFFFF | RDRAM | RDRAM - built in |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x00400000 | 0x007FFFFF | RDRAM | RDRAM - expansion pak (available if inserted) |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x00800000 | 0x03EFFFFF | Unused | Unused |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x03F00000 | 0x03FFFFFF | RDRAM Registers | RDRAM MMIO, configures timings, etc. Irrelevant for emulation |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04000000 | 0x04000FFF | SP DMEM | RSP Data Memory |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04001000 | 0x04001FFF | SP IMEM | RSP Instruction Memory |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04002000 | 0x0403FFFF | Unused | Unused |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04040000 | 0x040FFFFF | SP Registers | Control RSP DMA engine, status, program counter |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04100000 | 0x041FFFFF | DP Command Registers | Send commands to the RDP |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04200000 | 0x042FFFFF | DP Span Registers | Unknown |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04300000 | 0x043FFFFF | MIPS Interface (MI) | System information, interrupts. |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04400000 | 0x044FFFFF | Video Interface (VI) | Screen resolution, framebuffer settings |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04500000 | 0x045FFFFF | Audio Interface (AI) | Control the audio subsystem |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04600000 | 0x046FFFFF | Peripheral Interface (PI) | Control the cartridge interface. Set up DMAs cart <==> RDRAM |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04700000 | 0x047FFFFF | RDRAM Interface (RI) | Control RDRAM settings (timings?) Irrelevant for emulation. |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04800000 | 0x048FFFFF | Serial Interface (SI) | Control PIF RAM <==> RDRAM DMA engine |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x04900000 | 0x04FFFFFF | Unused | Unused |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x05000000 | 0x05FFFFFF | Cartridge Domain 2 Address 1 | N64DD control registers - returns open bus (or all 0xFF) when not present |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x06000000 | 0x07FFFFFF | Cartridge Domain 1 Address 1 | N64DD IPL ROM - returns open bus (or all 0xFF) when not present |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x08000000 | 0x0FFFFFFF | Cartridge Domain 2 Address 2 | SRAM is mapped here |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x10000000 | 0x1FBFFFFF | Cartridge Domain 1 Address 2 | ROM is mapped here |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x1FC00000 | 0x1FC007BF | PIF Boot Rom | First code run on boot. Baked into hardware. |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x1FC007C0 | 0x1FC007FF | PIF RAM | Used to communicate with PIF chip (controllers, memory cards) |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x1FC00800 | 0x1FCFFFFF | Reserved | |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x1FD00000 | 0x7FFFFFFF | Cartridge Domain 1 Address 3 | |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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| 0x80000000 | 0xFFFFFFFF | Unknown | Unknown |
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+---------------+------------+------------------------------+---------------------------------------------------------------------------+
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