Dillon Beliveau
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ec26947761
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toggle framerate unlocking with u
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2021-04-18 15:26:40 -04:00 |
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Dillon Beliveau
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5c14b361d4
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div fix INT_MIN/-1, ddiv fix divide by zero
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2021-04-18 14:34:11 -04:00 |
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Dillon Beliveau
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f0ace0c79a
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fix div/divu
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2021-04-18 14:06:58 -04:00 |
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Dillon Beliveau
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69102d37f0
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divu/ddivu fixes
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2021-04-18 13:47:15 -04:00 |
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Dillon Beliveau
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e54955317a
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only persist mempack data if any data changed
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2021-04-17 09:46:40 -04:00 |
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Dillon Beliveau
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d6a54a9323
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j/jal actually work in 64 bit mode
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2021-04-17 09:21:55 -04:00 |
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Dillon Beliveau
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8a007f104e
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j/jal work in 64 bit mode
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2021-04-17 09:08:54 -04:00 |
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Dillon Beliveau
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02431a272d
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WWF: No Mercy to game db
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2021-04-17 09:04:15 -04:00 |
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Dillon Beliveau
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c7ae82acaf
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use COPx naming convention in docs
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2021-04-17 09:04:06 -04:00 |
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Dillon Beliveau
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72f77a2a04
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Update boot_process.rst
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2021-04-12 10:12:11 -04:00 |
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Dillon Beliveau
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8e9c4a88e1
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DSRAV uses the low 6 bits
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2021-04-11 21:04:53 -04:00 |
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Dillon Beliveau
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a907738f36
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rdram dump code to n64mem.c
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2021-04-11 16:09:23 -04:00 |
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Dillon Beliveau
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bf300e2e1f
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Exception documentation
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2021-04-11 14:33:42 -04:00 |
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Dillon Beliveau
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abbfb046a2
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fix wording a little
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2021-04-11 13:20:34 -04:00 |
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Dillon Beliveau
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fd47bed4c4
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more clearly mark when we switch to talking about the CPU internals
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2021-04-11 13:17:12 -04:00 |
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Dillon Beliveau
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6051b8fecb
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interrupts
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2021-04-11 13:13:52 -04:00 |
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Dillon Beliveau
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8a83990069
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Document more CPU stuff
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2021-04-11 12:10:30 -04:00 |
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Dillon Beliveau
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7057005539
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update memory map with locations of N64DD stuff
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2021-04-11 11:49:02 -04:00 |
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Dillon Beliveau
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42e3a998c2
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TODOs for rest of VI registers
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2021-04-11 11:32:53 -04:00 |
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Dillon Beliveau
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0b0444845b
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document VI_STATUS_REG
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2021-04-11 11:06:59 -04:00 |
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Dillon Beliveau
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54a65197dd
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set entry hi correctly
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2021-04-10 16:59:41 -04:00 |
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Dillon Beliveau
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8d93188339
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bump upper bound
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2021-04-10 16:24:02 -04:00 |
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Dillon Beliveau
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d0618585f0
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tlbwr + tlb exceptions on lwc1
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2021-04-10 15:45:54 -04:00 |
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Dillon Beliveau
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cb47db1c34
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TLB exceptions kinda working
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2021-04-10 15:05:28 -04:00 |
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Dillon Beliveau
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382f9ededc
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Ogre battle 64 to game db
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2021-04-10 12:01:16 -04:00 |
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Dillon Beliveau
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21664896ec
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dump TLB state on errors
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2021-04-10 12:01:00 -04:00 |
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Dillon Beliveau
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a58359160d
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F-Zero X to issues log
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2021-04-10 10:10:12 -04:00 |
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Dillon Beliveau
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389904a311
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0x05xxxxxx is the 64DD
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2021-04-10 10:03:11 -04:00 |
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Dillon Beliveau
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734586bdea
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need to go through DMA to access SRAM
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2021-04-10 01:41:28 -04:00 |
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Dillon Beliveau
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a46a734d14
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DSRAV
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2021-04-10 01:17:52 -04:00 |
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Dillon Beliveau
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c0e1607df9
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initialize SRAM to all 0xFFs
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2021-04-10 00:51:37 -04:00 |
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Dillon Beliveau
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c7d8dceab8
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support dumping RDRAM
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2021-04-09 21:32:45 -04:00 |
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Dillon Beliveau
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318430a3e4
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latest version of parallel-rdp
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2021-04-06 19:32:13 -04:00 |
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Dillon Beliveau
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68d3dc7b27
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bump parallel-rdp a few commits
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2021-04-04 15:58:23 -04:00 |
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Dillon Beliveau
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42410be8cd
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Resident Evil 2 to game DB
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2021-04-04 14:51:44 -04:00 |
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Dillon Beliveau
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4e4c1347cd
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Basic idle loop detection
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2021-04-04 08:50:09 -04:00 |
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Dillon Beliveau
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b282d1fa1c
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interpreter matches jit timing (supports pal, etc)
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2021-04-04 07:27:02 -04:00 |
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Dillon Beliveau
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06b9bf0a37
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Fix CP1 round instructions
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2021-04-03 13:21:06 -04:00 |
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Dillon Beliveau
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083d8f7287
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Log how many bytes we missed
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2021-04-03 12:18:11 -04:00 |
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Dillon Beliveau
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84506e44d6
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audio adjustments
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2021-04-03 12:16:12 -04:00 |
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Dillon Beliveau
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1203508cea
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correct stack alignment in jit
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2021-04-02 17:00:11 -04:00 |
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Dillon Beliveau
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f2cb612de8
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JIT exception fixes
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2021-03-30 22:46:16 -04:00 |
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Dillon Beliveau
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f3aaa41c6e
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don't trigger compare interrupts twice in interpreter
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2021-03-28 17:01:04 -04:00 |
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Dillon Beliveau
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28d2e4bd08
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cp0 wait in interpreter
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2021-03-28 17:00:43 -04:00 |
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Dillon Beliveau
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c083fc0d19
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cast to dword
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2021-03-28 16:39:49 -04:00 |
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Dillon Beliveau
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5f674f8292
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count is shifted left by 1
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2021-03-28 15:45:43 -04:00 |
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Dillon Beliveau
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399919e0f7
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TLB exception in LW
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2021-03-28 15:41:34 -04:00 |
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Dillon Beliveau
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2efaca1ccb
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cp0 wait instruction in jit
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2021-03-28 14:46:42 -04:00 |
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Dillon Beliveau
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98732192ef
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bus changes to help test rom get past everdrive detection
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2021-03-28 14:24:49 -04:00 |
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Dillon Beliveau
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6a40bcbbf2
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syscall instr in jit
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2021-03-28 14:24:33 -04:00 |
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