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Author SHA1 Message Date
Dillon Beliveau
32a4d9d9a4 writing to DPC STATUS 2020-08-03 19:48:27 -04:00
Dillon Beliveau
356bf82685 RSP SLT 2020-08-03 19:48:13 -04:00
Dillon Beliveau
12cf81d082 Fix LRV 2020-08-03 19:34:53 -04:00
Dillon Beliveau
41b63fab99 update screen when VSync hit. Check VI interrupts and VSync at all appropriate times. Update screen when RDP plugin says to 2020-08-03 19:08:47 -04:00
Dillon Beliveau
ba1ed36af9 don't run angrylion with parallel mode on 2020-08-03 19:06:51 -04:00
Dillon Beliveau
c3dbccd165 kinda broken LRV/SRV 2020-08-02 18:07:09 -04:00
Dillon Beliveau
76a827d2a7 fix LSV 2020-08-02 15:50:13 -04:00
Dillon Beliveau
49010e4586 fix SLV 2020-08-02 15:07:28 -04:00
Dillon Beliveau
a43bf7410b fix LLV 2020-08-02 15:06:11 -04:00
Dillon Beliveau
9cc98cd798 fix LPV 2020-08-02 14:57:29 -04:00
Dillon Beliveau
be121b7148 fix MFC2 2020-08-02 14:50:58 -04:00
Dillon Beliveau
3d809abea0 fix MTC2 2020-08-02 14:46:50 -04:00
Dillon Beliveau
f164fc0ba3 more progress on STV, still not fully working 2020-08-02 14:42:10 -04:00
Dillon Beliveau
8f9966057e label columns 2020-08-02 14:19:36 -04:00
Dillon Beliveau
498820e49c don't run any other RSP tests if one fails - doesn't make any sense, since they depend on the output of the previous test. 2020-08-02 14:07:34 -04:00
Dillon Beliveau
a3648fecf6 Working on STV. Only consider top two bits of VT, do wrapping at byte level 2020-08-02 13:19:44 -04:00
Dillon Beliveau
660b7ee2f6 remove this code that was accidentally left in 2020-08-02 09:36:01 -04:00
Dillon Beliveau
0ad862cb74 quiet down plugin interface logging 2020-08-02 09:35:50 -04:00
Dillon Beliveau
02354069c8 sign extend multiply accumulator 2020-08-02 09:35:38 -04:00
Dillon Beliveau
6483d0f9b4 adjust RSP test output 2020-08-01 19:23:56 -04:00
Dillon Beliveau
901683b383 Fix LDV/SDV 2020-08-01 18:55:33 -04:00
Dillon Beliveau
68e73ee2fc fix LUV 2020-08-01 18:18:13 -04:00
Dillon Beliveau
7916c3888e uncomment all tests 2020-08-01 15:45:10 -04:00
Dillon Beliveau
a6d9f447aa don't fail tests on unimplemented RSP instructions 2020-08-01 15:43:23 -04:00
Dillon Beliveau
5909e36aeb VRSQH/VRSQL 2020-08-01 15:43:05 -04:00
Dillon Beliveau
16f4b8ebc4 vaddc 2020-08-01 15:42:51 -04:00
Dillon Beliveau
6ac1a3f872 LTV/STV 2020-08-01 15:42:34 -04:00
Dillon Beliveau
480defd022 mips:4000 in gdb 2020-08-01 15:42:16 -04:00
Dillon Beliveau
bf15110bd9 cleanup print statements all over tlb code, implement some RSP stuff 2020-07-30 21:21:20 -04:00
Dillon Beliveau
58fe7f5876 fix TLB 2020-07-28 23:03:53 -04:00
Dillon Beliveau
6f66a5ee07 don't debug gdbstub 2020-07-28 23:03:06 -04:00
Dillon Beliveau
72e8726cf9 don't do debugger stuff if -d isn't passed 2020-07-28 23:02:44 -04:00
Dillon Beliveau
cd11d7f113 cleanup message 2020-07-26 23:46:57 -04:00
Dillon Beliveau
10a9044e90 endianness, again 2020-07-26 23:22:04 -04:00
Dillon Beliveau
155409cd0a
Merge pull request #1 from Dillonb/tlb-wip 
TLB
 2020-07-26 23:20:33 -04:00
Dillon Beliveau
1f31691f97
Merge pull request #2 from Dillonb/gdb-stub 
GDB Stub
 2020-07-26 22:31:06 -04:00
Dillon Beliveau
1f5779e09b breakpoints, -d option, beginnings of a memory map, endianness 2020-07-26 17:51:30 -04:00
Dillon Beliveau
b87c479a67 step fixes, endianness fixes 2020-07-26 12:38:44 -04:00
Dillon Beliveau
114e4c48c8 Initial sorta-working gdb stub 2020-07-25 21:44:49 -04:00
Dillon Beliveau
8c5a150409 not a fatal error, just log it 2020-07-24 19:53:35 -04:00
Dillon Beliveau
f60bb78993 typo 2020-07-24 19:52:02 -04:00
Dillon Beliveau
d2ee10bfb3 tlb fixes, odd pages 2020-07-24 10:44:06 -04:00
Dillon Beliveau
24a35468cf get sockets set up for gdb stub 2020-07-24 08:46:00 -04:00
Dillon Beliveau
6265cda32c handle pagemask correctly 2020-07-23 21:44:16 -04:00
Dillon Beliveau
a6a9115a31 Merge branch 'master' into tlb-wip 2020-07-23 01:08:17 -04:00
Dillon Beliveau
3b05af35d2 Cleanup print statements 2020-07-23 01:07:28 -04:00
Dillon Beliveau
6ac1fdee01 DDIV / DADDIU 2020-07-23 01:07:11 -04:00
Dillon Beliveau
b3d709c464 remove check 2020-07-23 00:45:04 -04:00
Dillon Beliveau
4a2b259645 sync RSP to CPU at correct ratio 2020-07-23 00:44:57 -04:00
Dillon Beliveau
4bae06422a Rework DMA 2020-07-23 00:43:56 -04:00