Emulation/n64
1
0
Fork 0
mirror of https://github.com/Dillonb/n64.git synced 2025-04-02 10:42:08 -04:00
Code Issues Projects Releases Packages Wiki Activity
1910 commits 16 branches 0 tags 17 MiB
Commit graph

1910 commits

This branch
This branch
All branches
Author SHA1 Message Date
Dillon Beliveau
0f5d33c5aa use a mutex to block the audio thread from accessing the audiostream while it's being recreated 2020-12-01 23:02:53 -05:00
Dillon Beliveau
0ad8a735c7 sanitizers commented out in cmakelists 2020-12-01 22:16:01 -05:00
Dillon Beliveau
b1988d9d34 fix more sanitizer-detected issues 2020-12-01 22:03:33 -05:00
Dillon Beliveau
164f6e6adb fix some UBSan errors 2020-12-01 20:05:13 -05:00
Dillon Beliveau
efc7e89872 use memcpy for memory accesses 2020-12-01 19:21:11 -05:00
Dillon Beliveau
1b72259f6b Use straight pointers 2020-11-30 22:55:03 -05:00
Dillon Beliveau
8286a58e6d support loading .v64 and .n64 byte-swapped files 2020-11-30 20:02:56 -05:00
Dillon Beliveau
a6b1715340 cleanup unreachable logfatals 2020-11-29 22:36:35 -05:00
Dillon Beliveau
dacd79030b helpful messages 2020-11-29 21:36:56 -05:00
Dillon Beliveau
3fcc79ee40 don't try to build tests if bass and chksum64 are not on the path 2020-11-29 21:35:51 -05:00
Dillon Beliveau
48a3c0941a return zero (and log a warning) when reading from some other cartridge domains 2020-11-29 21:01:14 -05:00
Dillon Beliveau
b38fd7b5c4 these instructions use broadcast modifiers in VT 2020-11-29 20:54:20 -05:00
Dillon Beliveau
43ab78a908 allow reading DMA_CACHE value from RSP CP0 2020-11-29 20:54:08 -05:00
Dillon Beliveau
90270a56cf various DMA fixes 2020-11-29 20:53:57 -05:00
Dillon Beliveau
2b2cd6f443 allow use of broadcast modifiers here 2020-11-29 20:16:06 -05:00
Dillon Beliveau
ca36909f01 read single bytes from AI registers 2020-11-29 20:15:41 -05:00
Dillon Beliveau
068595f29a misaligned RSP DMA reads are only warnings 2020-11-29 12:54:21 -05:00
Dillon Beliveau
b6ce54af91 SIMD-ify lane selection where e [8, 15] 2020-11-29 12:46:09 -05:00
Dillon Beliveau
ed948f3813 ignore remaining build dirs 2020-11-29 12:07:14 -05:00
Dillon Beliveau
f9c3bcf190 add a warning 2020-11-29 12:04:56 -05:00
Dillon Beliveau
5566e95ea9 move tas_movie code into frontend dir 2020-11-29 11:35:54 -05:00
Dillon Beliveau
b63651cb82 implement DSUBU 2020-11-28 16:42:41 -05:00
Dillon Beliveau
e50c46c9c0 DSRL + DSRL32 2020-11-28 16:33:10 -05:00
Dillon Beliveau
e207ba4c8e SIMD-ify some of the hottest RSP multiplies 2020-11-28 15:46:12 -05:00
Dillon Beliveau
956256efbc Set flag registers to 0xFFFF instead of 1 when true 2020-11-28 15:18:46 -05:00
Dillon Beliveau
bb640818ef separate SIMD and SISD code in rsp_vector_instructions 2020-11-28 15:06:30 -05:00
Dillon Beliveau
1504730401 Cleanup stray print statement 2020-11-27 13:28:31 -05:00
Dillon Beliveau
7b2bf54292 Release builds don't link to Capstone 2020-11-27 13:24:22 -05:00
Dillon Beliveau
beadd1b2bf add default label 2020-11-27 13:19:20 -05:00
Dillon Beliveau
04bd3045f7 strip trailing spaces from game name 2020-11-27 12:59:24 -05:00
Dillon Beliveau
7a343df5f1 save partial RDP commands for next run 2020-11-26 13:50:20 -05:00
Dillon Beliveau
fc613e621b DADDU 2020-11-26 13:21:24 -05:00
Dillon Beliveau
f7de6e9b28 always enable unimplemented macro 2020-11-26 10:41:00 -05:00
Dillon Beliveau
a1d30f2f9e remove length checks in PIF 2020-11-26 10:40:48 -05:00
Dillon Beliveau
1bdbbbbf4d fix start button 2020-11-25 19:28:21 -05:00
Dillon Beliveau
4f66d8429b strip executable as part of pipeline 2020-11-25 18:40:08 -05:00
Dillon Beliveau
4eef802a00 C buttons and Z button 2020-11-25 18:31:30 -05:00
Dillon Beliveau
f30d98fad3 Revert "if possible, copy 8 bytes at a time in PI DMA" 
This reverts commit 6009393688.
 2020-11-25 17:41:54 -05:00
Dillon Beliveau
e7e111bc20 l and r 2020-11-25 17:21:59 -05:00
Dillon Beliveau
6009393688 if possible, copy 8 bytes at a time in PI DMA 2020-11-25 17:16:58 -05:00
Dillon Beliveau
4f713f84cd Gamepad support 2020-11-25 17:16:46 -05:00
Dillon Beliveau
01fd45594f stub WatchLo and WatchHi 2020-11-25 13:16:35 -05:00
Dillon Beliveau
88b9b61608 comment out FR change check 2020-11-25 12:45:26 -05:00
Dillon Beliveau
1ce564a75e always write pif seed to PIF RAM even if LLEing 2020-11-25 12:45:08 -05:00
Dillon Beliveau
acc25b3547 determine CIC type and write to PIF RAM. the PIF ROM now boots. 2020-11-25 11:51:03 -05:00
Dillon Beliveau
53b5d5b552 pif copy 8 bytes at a time 2020-11-25 10:54:48 -05:00
Dillon Beliveau
89d7d1bacc Latest version of parallel-rdp 2020-11-25 00:32:17 -05:00
Dillon Beliveau
8dee5581d0 disable SRGB backbuffer 2020-11-24 23:35:01 -05:00
Dillon Beliveau
ccdf47693b Revert "do this with a renderpass instead of accessing private members directly" 
This reverts commit 94307b9605.
 2020-11-24 22:56:29 -05:00
Dillon Beliveau
e390c22e0b typo 2020-11-23 21:54:48 -05:00