Dillon Beliveau
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249b14b849
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no need to mask twice
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2020-07-12 17:42:31 -04:00 |
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Dillon Beliveau
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7d53611e9f
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Convert expected value to little endian
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2020-07-12 17:33:24 -04:00 |
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Dillon Beliveau
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74bf20656c
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Fix unaligned word writes
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2020-07-12 17:31:23 -04:00 |
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Dillon Beliveau
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c6206d14b4
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check test output
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2020-07-12 16:29:54 -04:00 |
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Dillon Beliveau
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bc690f1e2e
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RSP LUI
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2020-07-12 16:05:04 -04:00 |
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Dillon Beliveau
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64b36ecb2b
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RSP tests with autogenerated CMake configs and input data
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2020-07-12 15:46:58 -04:00 |
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Dillon Beliveau
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6c6f5b2780
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Add testcases for RSP
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2020-07-12 14:36:42 -04:00 |
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Dillon Beliveau
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9031d91ae0
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CPU test cases in cpu subdir
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2020-07-12 12:52:41 -04:00 |
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Dillon Beliveau
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f50aededc6
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Fix VSAR
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2020-07-12 12:06:55 -04:00 |
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Dillon Beliveau
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9dc8409c96
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Check RDP interrupts from the callback only
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2020-07-11 23:49:00 -04:00 |
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Dillon Beliveau
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ca0a80d163
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RSP unaligned word writes
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2020-07-11 20:43:52 -04:00 |
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Dillon Beliveau
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7401ea7579
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VMADH/VMADN
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2020-07-11 20:43:32 -04:00 |
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Dillon Beliveau
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01e4426194
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VMADL, VMADM, VMUDH
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2020-07-11 19:00:15 -04:00 |
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Dillon Beliveau
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afc9fa84dd
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RSP SBV
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2020-07-11 17:26:52 -04:00 |
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Dillon Beliveau
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3b5a3b5634
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CP1 NEG
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2020-07-11 17:26:07 -04:00 |
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Dillon Beliveau
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4a2d4b1fbe
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some FPU instructions
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2020-07-11 17:14:30 -04:00 |
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Dillon Beliveau
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596ccf8a99
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RDP plugin may or may not raise an interrupt, so we should just check if it did instead of always raising one ourselves.
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2020-07-11 16:43:29 -04:00 |
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Dillon Beliveau
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d47f4bb233
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Lots more RSP instructions, quiet down logging
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2020-07-11 03:41:16 -04:00 |
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Dillon Beliveau
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77eeb620da
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RSP: more instructions, hook up more interfaces, unaligned reads
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2020-07-11 03:28:46 -04:00 |
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Dillon Beliveau
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10fd9722f4
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Finish up RSP interrupts, hook up RSP CP0 to more stuff
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2020-07-11 02:59:54 -04:00 |
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Dillon Beliveau
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bd30706876
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RSP SUB
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2020-07-11 02:59:20 -04:00 |
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Dillon Beliveau
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4fa2776234
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RSP: SSV, reverse DMA
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2020-07-11 02:51:48 -04:00 |
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Dillon Beliveau
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5bd0f5e9a1
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Don't need to set render scale
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2020-07-11 02:41:35 -04:00 |
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Dillon Beliveau
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a74acbc850
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RSP: VMACF, VMACU
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2020-07-11 02:41:17 -04:00 |
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Dillon Beliveau
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b954cccb46
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Vector registers in little endian byte order
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2020-07-11 02:36:15 -04:00 |
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Dillon Beliveau
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dd7df9b1e5
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RSP: CFC2, VMULF, VMULU, fix VSAR
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2020-07-11 02:24:00 -04:00 |
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Dillon Beliveau
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5962fe68d3
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uncomment
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2020-07-09 23:22:23 -04:00 |
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Dillon Beliveau
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5d60958519
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VU vec stuff, RSP SB
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2020-07-09 23:13:57 -04:00 |
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Dillon Beliveau
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0d5b296207
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RSP can only read from IMEM
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2020-07-09 22:13:55 -04:00 |
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Dillon Beliveau
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f74b0f833c
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Lots of CP2 stubbin'
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2020-07-09 21:30:43 -04:00 |
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Dillon Beliveau
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8a4d6f7e4c
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this is better named v
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2020-07-09 19:30:15 -04:00 |
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Dillon Beliveau
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ba6e5e56eb
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LQV
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2020-07-09 19:26:10 -04:00 |
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Dillon Beliveau
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00b3e66cda
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LDV/LSV
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2020-07-09 19:17:46 -04:00 |
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Dillon Beliveau
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6796201a8d
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these decode differently
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2020-07-08 23:38:33 -04:00 |
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Dillon Beliveau
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35f8b35a8b
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Stub LWC2 decodes
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2020-07-08 23:16:18 -04:00 |
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Dillon Beliveau
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22e3a9f9a7
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RSP semaphore, more RSP instructions
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2020-07-08 23:05:42 -04:00 |
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Dillon Beliveau
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f047f5b89b
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Angrylion working for software renderer
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2020-07-08 20:42:45 -04:00 |
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Dillon Beliveau
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0019e0170c
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Save my ears a bit
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2020-07-07 21:09:11 -04:00 |
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Dillon Beliveau
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dbba52b85c
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Hook into more plugin stuff
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2020-07-07 21:09:03 -04:00 |
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Dillon Beliveau
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1f7ed379dd
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Create OpenGL context
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2020-07-07 19:25:40 -04:00 |
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Dillon Beliveau
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4bd2b2667f
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Update comments, call a hook, raise an interrupt
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2020-07-06 23:49:57 -04:00 |
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Dillon Beliveau
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6076b4d73b
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Stub a ton of RDP stuff
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2020-07-06 23:39:11 -04:00 |
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Dillon Beliveau
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01af111a7b
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RSP ADD, BLEZ
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2020-07-06 21:25:19 -04:00 |
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Dillon Beliveau
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a876e4d809
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Load Mupen64Plus compatible RDP plugins
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2020-07-06 21:18:43 -04:00 |
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Dillon Beliveau
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376f5ca5cd
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These instructions don't exist on the RSP
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2020-07-05 15:48:07 -04:00 |
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Dillon Beliveau
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2af5431242
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Tune up RSP IO, add RSP JR
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2020-07-05 15:47:33 -04:00 |
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Dillon Beliveau
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3cf0f11277
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RSP BNE, hook up first RSP CP0 register
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2020-07-05 15:02:13 -04:00 |
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Dillon Beliveau
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f1521898b3
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stub RSP CP0
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2020-07-05 14:53:17 -04:00 |
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Dillon Beliveau
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dfd60504e1
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more RSP instructions
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2020-07-05 14:39:25 -04:00 |
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Dillon Beliveau
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73fa1e7230
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RSP is more separate/different than I originally thought
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2020-07-05 14:03:23 -04:00 |
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