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Author SHA1 Message Date
Dillon Beliveau
0aece987ba stub reading from CART_2_1 2020-10-03 17:01:35 -04:00
Dillon Beliveau
d5c50e9a8e stub mempack read 2020-10-03 16:56:07 -04:00
Dillon Beliveau
5e21e9a46a flush codecache when full 2020-10-03 16:55:56 -04:00
Dillon Beliveau
7bd5dc2054 Merge branch 'master' of github.com:Dillonb/n64 into master 2020-10-03 16:02:49 -04:00
Dillon Beliveau
454d7710d9
Update README.md 2020-10-03 16:02:23 -04:00
Dillon Beliveau
a284229033 vxor use vte 2020-10-03 15:07:49 -04:00
Dillon Beliveau
e655109e80 some logwarns to loginfo 2020-10-03 14:26:14 -04:00
Dillon Beliveau
088c275208 remove an unnecessary check on register access 2020-10-03 14:21:50 -04:00
Dillon Beliveau
72d7a7cf6b don't redefine 2020-10-03 14:20:50 -04:00
Dillon Beliveau
e93f2c4d46 RSP cannot read/write DWORDs 2020-10-03 14:20:43 -04:00
Dillon Beliveau
d00106d935 fix build when log enabled 2020-10-03 14:20:31 -04:00
Dillon Beliveau
5d7517304b
Merge pull request #3 from Dillonb/dynarec 
Dynarec
 2020-10-03 13:39:40 -04:00
Dillon Beliveau
41df53bf49 cleanup logs when enabled 2020-10-02 12:19:44 -04:00
Dillon Beliveau
5808fee06b speed up addi 2020-10-02 12:13:58 -04:00
Dillon Beliveau
b7036f3cdd speed up BEQ 2020-10-02 12:02:09 -04:00
Dillon Beliveau
edbf24dd7a perform all RSP steps at once without repeatedly calling 2020-10-02 10:56:36 -04:00
Dillon Beliveau
5a3db7ab61 comment 2020-10-02 10:38:21 -04:00
Dillon Beliveau
eafa8d72bc better error messages 2020-10-02 10:36:14 -04:00
Dillon Beliveau
67e94b3eb7 return block length from run function, remove unused block properties 2020-10-02 10:27:23 -04:00
Dillon Beliveau
6e3779e19e print statements behind ifdef 2020-10-02 09:53:01 -04:00
Dillon Beliveau
6111f9dc9f stray chunk of code that shouldn't be there 2020-10-02 02:11:51 -04:00
Dillon Beliveau
83503bc112 inline pre_instruction in asm 2020-10-02 02:11:23 -04:00
Dillon Beliveau
8fef998a84 remove print statements. fix a common edge case, break a much rarer one. 2020-10-02 01:15:27 -04:00
Dillon Beliveau
f50a4e5595 exit block early on CP1 unusable exceptions 2020-10-01 22:08:09 -04:00
Dillon Beliveau
4b8739f3ce don't save rax, move cpu_state type to top of file 2020-10-01 22:06:52 -04:00
Dillon Beliveau
d4f9b26142 compile cp1 2020-10-01 20:52:10 -04:00
Dillon Beliveau
ca8425b160 oops 2020-10-01 19:53:21 -04:00
Dillon Beliveau
ed2f60806a branches don't end blocks 2020-10-01 19:32:34 -04:00
Dillon Beliveau
8638091126 regimm, switch terminology to compile from emit 2020-10-01 16:31:24 -04:00
Dillon Beliveau
15bfc6c6d3 delay slots/branch likely instructions should be working now 2020-10-01 16:18:07 -04:00
Dillon Beliveau
f6212a9d15 keep track of the number of blocks run 2020-10-01 13:05:31 -04:00
Dillon Beliveau
d7faa6ba8c make sure we're at the right PC 2020-10-01 13:05:19 -04:00
Dillon Beliveau
a1f0eabbd6 emit special instructions 2020-10-01 12:36:10 -04:00
Dillon Beliveau
e7c85e344a emitters return their category, need to emit the delay slot for branch instrs 2020-10-01 12:25:38 -04:00
Dillon Beliveau
0fc6591fa9 less redundant log messages 2020-10-01 12:01:03 -04:00
Dillon Beliveau
48a9510744 builds on MacOS 2020-10-01 10:15:00 -04:00
Dillon Beliveau
d83cb1f1c1 attempting to fix blocks 2020-10-01 09:30:41 -04:00
Dillon Beliveau
cbbed8da66 emit cp0 instructions 2020-09-29 20:25:21 -04:00
Dillon Beliveau
39e2435550 compile all basic instructions 2020-09-29 20:20:16 -04:00
Dillon Beliveau
e81fbd1bac reorganize a bit 2020-09-29 19:55:58 -04:00
Dillon Beliveau
6a50589921 correct block length 2020-09-29 19:52:33 -04:00
Dillon Beliveau
4d39684159 framework for multiple instructions per block 2020-09-29 19:50:44 -04:00
Dillon Beliveau
aebf4ca4f4 cleanup, 128MiB code cache 2020-09-28 23:29:20 -04:00
Dillon Beliveau
e164db7caa fix dynarec 2020-09-28 22:50:50 -04:00
Dillon Beliveau
b008630ccf cached interpreter works, exceptions still broken 2020-09-26 19:35:53 -04:00
Dillon Beliveau
9702287e7b cached interpreter can generate a block and call it 2020-09-26 16:50:47 -04:00
Dillon Beliveau
eb5197c441 wire in dynasm 2020-09-26 01:01:47 -04:00
Dillon Beliveau
5b2d33cf9c beginnings of a dynarec/cached interpreter 2020-09-25 22:39:26 -04:00
Dillon Beliveau
272d1837d6 remove instruction type enum requirement 2020-09-24 19:40:03 -04:00
Dillon Beliveau
5670c28aa1 don't use instruction type enum in RSP, use function pointers 2020-09-24 19:27:48 -04:00