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Author	SHA1	Message	Date
Raiki Tamura	dff71e3c8a	Add TGE, TGEU, TLT, TLTU, TEQ, TNE	2023-08-06 11:37:12 +09:00
Raiki Tamura	95c566eea0	Clean up exception handling	2023-08-06 11:36:39 +09:00
Raiki Tamura	708262ee34	Refactor exception handling	2023-08-06 11:24:36 +09:00
Raiki Tamura	6613f0b9d1	Add some opcodes	2023-08-06 11:24:16 +09:00
Raiki Tamura	e1322121fb	Add LL, LLD	2023-08-06 10:58:53 +09:00
Raiki Tamura	856ec112da	Add VI registers	2023-08-06 10:43:19 +09:00
Raiki Tamura	0b01cc6db1	Add VI_CTRL reg	2023-08-06 10:09:06 +09:00
Raiki Tamura	2bb922129b	Add public domain ROMs	2023-08-05 21:01:06 +09:00
Raiki Tamura	0cfce92cf6	format	2023-08-05 20:08:23 +09:00
Raiki Tamura	07ec41865f	Add VI_BASE and VI_END	2023-08-05 20:08:14 +09:00
Raiki Tamura	b68cbdf65e	Implement initial VI	2023-08-05 20:07:53 +09:00
Raiki Tamura	a50d705425	Refactor bus/bus.cpp	2023-08-05 19:59:20 +09:00
Raiki Tamura	8af137691c	fix read/write utils	2023-08-05 19:58:35 +09:00
Raiki Tamura	2531782b04	fix CPU decoder	2023-08-05 19:39:02 +09:00
Raiki Tamura	18b6310229	Add LB, LBU, LH, SB, SH	2023-08-05 19:37:54 +09:00
Raiki Tamura	e61b023cf7	fix byte-wise read/write	2023-08-05 19:37:36 +09:00
Raiki Tamura	602e5588c8	Implement byte-wise access to bus	2023-08-05 17:36:40 +09:00
Raiki Tamura	a42c50ce75	clean up CPU instruction	2023-08-05 17:28:20 +09:00
Raiki Tamura	6098a263c4	Add LDL, LDR, SDL, SDR	2023-08-05 17:13:38 +09:00
Raiki Tamura	77d5686beb	Add DSLL, DSRL, DSRA, DSLL32, DSRL32, DSRA32	2023-08-05 13:59:25 +09:00
Raiki Tamura	1507dd232d	Fix cop1	2023-08-05 13:44:12 +09:00
Raiki Tamura	af79882bba	Add CFC1, CTC1	2023-08-05 13:35:51 +09:00
Raiki Tamura	fe6f2baabe	Move Cpu::execute_instruction	2023-08-05 03:54:44 +09:00
tamaron	d60902d318	Refactor CPU (#79)	2023-08-05 03:51:28 +09:00
Raiki Tamura	5d35c4e844	Add CP1 instruction decoder	2023-08-05 02:38:08 +09:00
Raiki Tamura	da352d2838	Add SRL, SRA, SRAV	2023-08-05 02:16:22 +09:00
Raiki Tamura	e5b177dad0	Add DIV, DIVU	2023-08-05 02:03:20 +09:00
Raiki Tamura	c4f585e8f2	Add LogLevel::WARN	2023-08-05 02:02:52 +09:00
Raiki Tamura	96d1fe9543	Update docs	2023-08-05 01:18:08 +09:00
Raiki Tamura	db7ca41f59	Add SLTI, SLTIU	2023-08-05 00:54:46 +09:00
Raiki Tamura	3118dbf3a1	Add BLTZ, BLTZL, BGEZ, BGEZL	2023-08-05 00:39:39 +09:00
Raiki Tamura	609c10fa67	read dword from RDRAM	2023-08-05 00:28:28 +09:00
Raiki Tamura	f90c9d42ac	fix MI_VERSION	2023-08-04 12:23:30 +09:00
Raiki Tamura	1bf3deee33	clean up pif.cpp	2023-08-04 12:23:18 +09:00
Raiki Tamura	0efbe44b14	Update .clang-format	2023-08-03 23:45:13 +09:00
Raiki Tamura	30873f50e4	Update .gitignore	2023-08-03 23:38:00 +09:00
Raiki Tamura	2d02c65b48	Implement initial TLB	2023-08-03 23:37:10 +09:00
tamaron	cb1d64316d	Implement more (#78)	2023-08-03 21:50:04 +09:00
tamaron	85e52e78ba	Add bound check to access to byte array (#77)	2023-08-03 09:45:34 +09:00
tamaron	7366a7d5fb	Fix interrupt handling and register names (#76)	2023-08-02 18:13:51 +09:00
tamaron	62a2edac73	Update README.md	2023-08-01 18:27:21 +09:00
Raiki Tamura	c285bfd79d	update README.md	2023-08-01 14:41:57 +09:00
tamaron	841e1deca9	Add MI MASK register (#74)	2023-08-01 14:33:58 +09:00
tamaron	b66ce3449d	MIとRSPのメモリマップを追加 (#73)	2023-08-01 13:36:26 +09:00
tamaron	01873a0edf	Add rsp registers (#72)	2023-07-31 14:15:15 +09:00
tamaron	ce70280acd	Fix access to MI, SI (#70)	2023-07-29 02:32:14 +09:00
tamaron	f17ba65610	Clean up (#69)	2023-07-29 01:52:27 +09:00
tamaron	c0fac7d932	Fix PIF ROM (#62)	2023-07-29 01:23:03 +09:00
tamaron	91e69be6f7	Clean up (#61)	2023-07-28 12:11:17 +09:00
tamaron	9120627bbd	Remove Boost (#60)	2023-07-28 11:21:32 +09:00