unknown
bdf9e27020
rewrote ADDI[U], SLTI and SLTIU
2015-11-28 16:21:10 -05:00
unknown
f790f4975e
For bit-wise portability, GPR file should not be signed.
2015-11-28 16:07:32 -05:00
unknown
3760de8c96
rewrote ANDI, ORI, XORI and LUI
2015-11-28 15:30:39 -05:00
unknown
abf4981928
Enumerate the list of GPR assembler syntax names.
2015-11-28 14:55:44 -05:00
unknown
f9579c1d47
rewrote LB, LBU, LH, LHU, LW, SB, SH and SW
2015-11-28 14:15:12 -05:00
unknown
0cb4e5a6e4
#define PROFILE_MODE to prefer speed vs. benchmark precision
2015-11-28 12:41:21 -05:00
unknown
43ef2e2292
split R4000 CPU interpreter cycle to its own function
2015-11-28 10:27:46 -05:00
unknown
aad3ecf3f8
CONTINUE macro #define should be deleted.
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#ifdef EMULATE_STATIC_PC, then `break;' should compile effectively into a `continue;' during optimizations. I need this change for flexibility in restructuring the instruction decode functions later.
2015-11-28 10:18:20 -05:00
unknown
776e50df85
EMULATE_STATIC_PC #define moved to header
2015-11-28 00:40:10 -05:00
unknown
f74c9feb14
message(): standard codespace braces conformance
2015-11-27 20:52:01 -05:00
unknown
3941c64eab
Do not always allocate a 4096-byte message buffer.
2015-11-27 20:48:04 -05:00
unknown
f5032094dd
accurate VSAR IW decoding of valid, scalar-based elements
2015-11-27 20:31:09 -05:00
unknown
d807c78226
some trivial clean-ups
2015-11-27 19:40:39 -05:00
unknown
f939466484
Delay the AND mask step adjusting to Mupen64's lack of one.
2015-11-27 17:48:13 -05:00
unknown
8a37d06a67
cleaned up step_SP_commands()
2015-11-27 17:36:55 -05:00
unknown
c7142b539a
Diagnose GlobalFree() in case it ever fails.
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This is also good to block permanent loops, if for some reason it perpetually fails every time.
2015-11-27 17:23:50 -05:00
unknown
b23bc4c5a7
The comment on GetModulePath() PJ64 2.0 hack isn't relevant.
2015-11-27 17:09:25 -05:00
cxd4
898e380c31
Merge pull request #5 from cxd4/HVQM
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Force refreshing color buffer in case the VI module neglects to.
2015-11-14 11:30:06 -05:00
cxd4
7afdfb9eea
Force refreshing color buffer in case the VI module neglects to.
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Maybe the interval should be regulated solely by the graphics plugin, but just in case some of them decline to (such as Jabo's Direct3D8, without "Software rendering" checked), then this should in those cases fix _Pokémon Puzzle League_.
2015-11-14 11:28:05 -05:00
unknown
50190ff0c4
rewrote task scheduler read from memory
2015-11-14 11:12:42 -05:00
Richard Goedeken
818c0e4aee
Merge pull request #12 from Gillou68310/update
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Merged upstream changes + added VS2013 project file
2015-11-10 21:00:00 -08:00
Gillou68310
7e15093088
Added filter file for VS2013 project file
2015-11-10 17:37:06 +01:00
Gillou68310
aaed3b5b35
Fixed undefined reference to _m_empty when building on x64
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MMX is not used so this is not necessary anyway
2015-11-10 13:38:22 +01:00
Gillou68310
737c5e5bed
Fixed uninitialized local variable
2015-11-10 13:33:31 +01:00
Gillou68310
2a0d6638e9
Added Visual Studio 2013 Project file
2015-11-10 13:29:36 +01:00
Gillou68310
8796295a2c
Merge commit '73232513e7889c82f86fd77f81ac6a060fe7d828'
2015-11-10 11:57:18 +01:00
cxd4
73232513e7
fixed broken GitHub markdown :)
2015-11-02 11:09:32 -05:00
unknown
d68bcc4dc7
Remove a (long since) outdated prototype.
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This code was back when I wanted a central function for shuffling the vectors, only when all the COP2 vector op-codes had the shuffling of VR[vt] done locally within them. Since shuffling is now done within the COP2 dispatch before the function call table--global to all the vector instructions--there is no more need to have this prototype for a central function. That code was probably removed over 2 years ago.
This also fixes some surviving 64-bit warnings with PIC linkage on Windows, reported by tony971, that I missed.
2015-08-19 20:38:18 -04:00
unknown
cd7c41482a
For better PIC linkage, remove SHUFFLE_VECTOR.
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Also got rid of the SSE2 code for shuffling. It takes too much extra byte code in the main interpreter instruction cache and requires an extra branch anyway, and an SSSE3 solution would still require at least 3 such large SIMD instructions anyway. So let's see if we can't safely overhaul this without a speed drop.
2015-08-17 11:09:01 -04:00
unknown
3d415f9711
minor typo in the case-insensitive Win32 build scripts
2015-08-16 17:51:59 -04:00
unknown
7fb9850b68
fixed possible PIC linkage faults by moving merge to static
2015-08-16 09:51:04 -04:00
unknown
7d9e2fcdef
Force invocation paths to bypass POSIX/Win32 shell install.
2015-08-15 21:30:13 -04:00
unknown
7310144f90
undefined reference to memcpy caused by compiling -O3 module.c
2015-07-16 19:19:33 -04:00
unknown
87b3d4c62b
Start using a .gitignore after 4 years of needing one.
2015-07-16 19:06:41 -04:00
unknown
c615b81db1
added 64-bit build script for Windows, since MinGW is 32-bit only
2015-07-16 18:58:39 -04:00
unknown
bf7c98f586
Conker's BFD micro-optimization with 2's cmpl. integer division
2015-06-08 16:28:21 -04:00
Richard Goedeken
be3799bbcf
Merge pull request #11 from bentley/openbsd
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Remove unnecessary OpenBSD warning.
2015-06-08 06:31:22 -07:00
Anthony J. Bentley
ae933a0b8c
Remove unnecessary OpenBSD warning.
2015-06-08 01:47:49 -06:00
unknown
690bb76c47
Do the same commit as before, but with rt'/vt'.
2015-06-08 00:30:43 -04:00
unknown
526d26286e
Do the same commit as before, but for rs'/vs' this time.
2015-06-08 00:14:28 -04:00
unknown
fcde75afdc
Optimize register allocation and timing: Do not set rd globally.
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My old reasoning behind that method was that the compiler would decide where to inline setting rd within which switch cases on my own, but now I can see it best plainly to decide for myself where rd should be locally initialized. This also helps prevent the problem of assigning a bitmask to the rd register specifier as an unnecessary precaution for op-codes that don't even access register[rd].
2015-06-07 23:22:29 -04:00
unknown
dede051ced
MinGW ld.exe doesn't always memorize standard library paths.
2015-05-03 11:45:39 -04:00
unknown
785b3f8584
Some versions of Windows command shell might not like forward slashes.
2015-05-03 11:43:01 -04:00
Richard Goedeken
7d16f6390c
Merge pull request #10 from conchurnavid/includes
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Sort the includes based on type and names
2015-03-21 21:26:38 -07:00
Conchúr Navid
c10a7f570e
Sort the includes based on type and names
2015-03-21 10:58:40 +01:00
Richard Goedeken
bd76ce38f7
Merge pull request #9 from conchurnavid/update
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Update to current upstream version
2015-03-15 08:58:34 -07:00
Conchúr Navid
57208865e7
Merge commit 'e1adbad4c18ddb1d8967be4d11bd751aa681587f'
2015-03-15 08:59:58 +01:00
unknown
e1adbad4c1
made MFC0 timeout dynamic--starts out high and slow, ends up fast
2015-03-10 20:32:21 -04:00
no
c104ada887
trying to fix merge issue :/
2015-03-10 14:50:31 -04:00
no
cbe87b5153
temporarily split x86 GCC flags for 32- vs. 64-bit
2015-03-10 14:46:26 -04:00
