mirror of
https://github.com/mupen64plus/mupen64plus-oldsvn.git
synced 2025-04-02 10:52:35 -04:00
5f40aa84cc
-Changed name of cheat config file to cheats.cfg. File is now read in on startup and written out on exit.
-Changed cheat config file format to the following:
{Some Game's CRC}
name=Some Game
[Cheat Name 1]
enabled=1
XXXXXXXX YYYY <-- cheat code (address, new value)
XXXXXXXX YYYY
XXXXXXXX YYYY
[Cheat Name 2]
enabled=0
XXXXXXXX YYYY
XXXXXXXX YYYY
XXXXXXXX YYYY
{Another Game's CRC}
name=Another Game
...
Here's the cheats.cfg I used for testing:
{635a2bff 8b022326}
name=SUPER MARIO 64
[Super Mega Jumps]
enabled=1
8133b176 0008
[Jesus Mode Mario]
enabled=1
81381764 0800
81381766 0024
81000090 3c04
81000092 8034
81000094 8484
81000096 b1e6
81000098 4484
8100009a 3000
810000a0 4680
810000a2 3120
810000a4 4604
810000a6 903c
810000ac 4500
810000ae 0002
810000b4 4600
810000b6 2486
810000b8 080e
810000ba 05db
810000bc e712
433 lines
9.8 KiB
C
433 lines
9.8 KiB
C
/**
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* Mupen64 - memory.h
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* Copyright (C) 2002 Hacktarux
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*
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* Mupen64 homepage: http://mupen64.emulation64.com
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* email address: hacktarux@yahoo.fr
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*
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* If you want to contribute to the project please contact
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* me first (maybe someone is already making what you are
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* planning to do).
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*
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*
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* This program is free software; you can redistribute it and/
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* or modify it under the terms of the GNU General Public Li-
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* cence as published by the Free Software Foundation; either
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* version 2 of the Licence, or any later version.
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*
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* This program is distributed in the hope that it will be use-
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* ful, but WITHOUT ANY WARRANTY; without even the implied war-
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* ranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public Licence for more details.
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*
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* You should have received a copy of the GNU General Public
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* Licence along with this program; if not, write to the Free
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* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
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* USA.
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*
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**/
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#ifndef MEMORY_H
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#define MEMORY_H
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#include "tlb.h"
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#ifdef __WIN32__
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#define byte __byte_
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#endif
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int init_memory(int DoByteSwap);
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void free_memory();
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#define read_word_in_memory() readmem[address>>16]()
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#define read_byte_in_memory() readmemb[address>>16]()
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#define read_hword_in_memory() readmemh[address>>16]()
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#define read_dword_in_memory() readmemd[address>>16]()
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#define write_word_in_memory() writemem[address>>16]()
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#define write_byte_in_memory() writememb[address >>16]()
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#define write_hword_in_memory() writememh[address >>16]()
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#define write_dword_in_memory() writememd[address >>16]()
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extern unsigned int SP_DMEM[0x1000/4*2];
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extern unsigned char *SP_DMEMb;
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extern unsigned int *SP_IMEM;
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extern unsigned int PIF_RAM[0x40/4];
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extern unsigned char *PIF_RAMb;
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extern unsigned int rdram[0x800000/4];
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extern unsigned int address, word;
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extern unsigned char byte;
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extern unsigned short hword;
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extern unsigned long long dword, *rdword;
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extern void (*readmem[0xFFFF])();
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extern void (*readmemb[0xFFFF])();
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extern void (*readmemh[0xFFFF])();
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extern void (*readmemd[0xFFFF])();
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extern void (*writemem[0xFFFF])();
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extern void (*writememb[0xFFFF])();
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extern void (*writememh[0xFFFF])();
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extern void (*writememd[0xFFFF])();
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typedef struct _RDRAM_register
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{
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unsigned int rdram_config;
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unsigned int rdram_device_id;
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unsigned int rdram_delay;
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unsigned int rdram_mode;
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unsigned int rdram_ref_interval;
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unsigned int rdram_ref_row;
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unsigned int rdram_ras_interval;
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unsigned int rdram_min_interval;
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unsigned int rdram_addr_select;
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unsigned int rdram_device_manuf;
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} RDRAM_register;
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typedef struct _SP_register
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{
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unsigned int sp_mem_addr_reg;
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unsigned int sp_dram_addr_reg;
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unsigned int sp_rd_len_reg;
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unsigned int sp_wr_len_reg;
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unsigned int w_sp_status_reg;
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unsigned int sp_status_reg;
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char halt;
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char broke;
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char dma_busy;
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char dma_full;
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char io_full;
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char single_step;
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char intr_break;
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char signal0;
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char signal1;
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char signal2;
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char signal3;
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char signal4;
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char signal5;
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char signal6;
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char signal7;
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unsigned int sp_dma_full_reg;
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unsigned int sp_dma_busy_reg;
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unsigned int sp_semaphore_reg;
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} SP_register;
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typedef struct _RSP_register
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{
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unsigned int rsp_pc;
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unsigned int rsp_ibist;
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} RSP_register;
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typedef struct _DPC_register
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{
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unsigned int dpc_start;
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unsigned int dpc_end;
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unsigned int dpc_current;
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unsigned int w_dpc_status;
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unsigned int dpc_status;
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char xbus_dmem_dma;
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char freeze;
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char flush;
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char start_glck;
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char tmem_busy;
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char pipe_busy;
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char cmd_busy;
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char cbuf_busy;
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char dma_busy;
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char end_valid;
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char start_valid;
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unsigned int dpc_clock;
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unsigned int dpc_bufbusy;
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unsigned int dpc_pipebusy;
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unsigned int dpc_tmem;
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} DPC_register;
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typedef struct _DPS_register
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{
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unsigned int dps_tbist;
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unsigned int dps_test_mode;
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unsigned int dps_buftest_addr;
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unsigned int dps_buftest_data;
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} DPS_register;
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typedef struct _mips_register
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{
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unsigned int w_mi_init_mode_reg;
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unsigned int mi_init_mode_reg;
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char init_length;
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char init_mode;
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char ebus_test_mode;
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char RDRAM_reg_mode;
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unsigned int mi_version_reg;
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unsigned int mi_intr_reg;
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unsigned int mi_intr_mask_reg;
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unsigned int w_mi_intr_mask_reg;
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char SP_intr_mask;
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char SI_intr_mask;
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char AI_intr_mask;
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char VI_intr_mask;
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char PI_intr_mask;
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char DP_intr_mask;
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} mips_register;
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typedef struct _VI_register
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{
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unsigned int vi_status;
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unsigned int vi_origin;
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unsigned int vi_width;
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unsigned int vi_v_intr;
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unsigned int vi_current;
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unsigned int vi_burst;
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unsigned int vi_v_sync;
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unsigned int vi_h_sync;
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unsigned int vi_leap;
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unsigned int vi_h_start;
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unsigned int vi_v_start;
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unsigned int vi_v_burst;
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unsigned int vi_x_scale;
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unsigned int vi_y_scale;
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unsigned int vi_delay;
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} VI_register;
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typedef struct _AI_register
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{
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unsigned int ai_dram_addr;
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unsigned int ai_len;
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unsigned int ai_control;
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unsigned int ai_status;
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unsigned int ai_dacrate;
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unsigned int ai_bitrate;
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unsigned int next_delay;
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unsigned int next_len;
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unsigned int current_delay;
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unsigned int current_len;
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} AI_register;
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typedef struct _PI_register
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{
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unsigned int pi_dram_addr_reg;
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unsigned int pi_cart_addr_reg;
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unsigned int pi_rd_len_reg;
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unsigned int pi_wr_len_reg;
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unsigned int read_pi_status_reg;
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unsigned int pi_bsd_dom1_lat_reg;
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unsigned int pi_bsd_dom1_pwd_reg;
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unsigned int pi_bsd_dom1_pgs_reg;
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unsigned int pi_bsd_dom1_rls_reg;
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unsigned int pi_bsd_dom2_lat_reg;
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unsigned int pi_bsd_dom2_pwd_reg;
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unsigned int pi_bsd_dom2_pgs_reg;
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unsigned int pi_bsd_dom2_rls_reg;
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} PI_register;
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typedef struct _RI_register
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{
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unsigned int ri_mode;
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unsigned int ri_config;
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unsigned int ri_current_load;
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unsigned int ri_select;
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unsigned int ri_refresh;
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unsigned int ri_latency;
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unsigned int ri_error;
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unsigned int ri_werror;
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} RI_register;
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typedef struct _SI_register
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{
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unsigned int si_dram_addr;
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unsigned int si_pif_addr_rd64b;
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unsigned int si_pif_addr_wr64b;
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unsigned int si_stat;
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} SI_register;
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extern RDRAM_register rdram_register;
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extern PI_register pi_register;
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extern mips_register MI_register;
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extern SP_register sp_register;
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extern SI_register si_register;
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extern VI_register vi_register;
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extern RSP_register rsp_register;
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extern RI_register ri_register;
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extern AI_register ai_register;
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extern DPC_register dpc_register;
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extern DPS_register dps_register;
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extern unsigned char *rdramb;
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#ifndef _BIG_ENDIAN
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#define sl(mot) \
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( \
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((mot & 0x000000FF) << 24) | \
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((mot & 0x0000FF00) << 8) | \
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((mot & 0x00FF0000) >> 8) | \
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((mot & 0xFF000000) >> 24) \
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)
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#define S8 3
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#define S16 2
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#define Sh16 1
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#else
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#define sl(mot) mot
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#define S8 0
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#define S16 0
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#define Sh16 0
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#endif
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void read_nothing();
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void read_nothingh();
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void read_nothingb();
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void read_nothingd();
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void read_nomem();
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void read_nomemb();
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void read_nomemh();
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void read_nomemd();
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void read_rdram();
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void read_rdramb();
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void read_rdramh();
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void read_rdramd();
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void read_rdramFB();
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void read_rdramFBb();
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void read_rdramFBh();
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void read_rdramFBd();
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void read_rdramreg();
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void read_rdramregb();
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void read_rdramregh();
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void read_rdramregd();
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void read_rsp_mem();
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void read_rsp_memb();
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void read_rsp_memh();
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void read_rsp_memd();
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void read_rsp_reg();
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void read_rsp_regb();
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void read_rsp_regh();
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void read_rsp_regd();
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void read_rsp();
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void read_rspb();
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void read_rsph();
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void read_rspd();
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void read_dp();
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void read_dpb();
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void read_dph();
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void read_dpd();
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void read_dps();
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void read_dpsb();
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void read_dpsh();
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void read_dpsd();
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void read_mi();
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void read_mib();
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void read_mih();
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void read_mid();
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void read_vi();
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void read_vib();
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void read_vih();
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void read_vid();
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void read_ai();
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void read_aib();
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void read_aih();
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void read_aid();
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void read_pi();
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void read_pib();
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void read_pih();
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void read_pid();
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void read_ri();
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void read_rib();
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void read_rih();
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void read_rid();
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void read_si();
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void read_sib();
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void read_sih();
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void read_sid();
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void read_flashram_status();
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void read_flashram_statusb();
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void read_flashram_statush();
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void read_flashram_statusd();
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void read_rom();
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void read_romb();
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void read_romh();
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void read_romd();
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void read_pif();
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void read_pifb();
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void read_pifh();
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void read_pifd();
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void write_nothing();
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void write_nothingb();
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void write_nothingh();
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void write_nothingd();
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void write_nomem();
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void write_nomemb();
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void write_nomemd();
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void write_nomemh();
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void write_rdram();
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void write_rdramb();
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void write_rdramh();
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void write_rdramd();
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void write_rdramFB();
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void write_rdramFBb();
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void write_rdramFBh();
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void write_rdramFBd();
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void write_rdramreg();
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void write_rdramregb();
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void write_rdramregh();
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void write_rdramregd();
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void write_rsp_mem();
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void write_rsp_memb();
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void write_rsp_memh();
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void write_rsp_memd();
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void write_rsp_reg();
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void write_rsp_regb();
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void write_rsp_regh();
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void write_rsp_regd();
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void write_rsp();
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void write_rspb();
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void write_rsph();
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void write_rspd();
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void write_dp();
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void write_dpb();
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void write_dph();
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void write_dpd();
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void write_dps();
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void write_dpsb();
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void write_dpsh();
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void write_dpsd();
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void write_mi();
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void write_mib();
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void write_mih();
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void write_mid();
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void write_vi();
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void write_vib();
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void write_vih();
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void write_vid();
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void write_ai();
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void write_aib();
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void write_aih();
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void write_aid();
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void write_pi();
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void write_pib();
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void write_pih();
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void write_pid();
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void write_ri();
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void write_rib();
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void write_rih();
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void write_rid();
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void write_si();
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void write_sib();
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void write_sih();
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void write_sid();
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void write_flashram_dummy();
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void write_flashram_dummyb();
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void write_flashram_dummyh();
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void write_flashram_dummyd();
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void write_flashram_command();
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void write_flashram_commandb();
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void write_flashram_commandh();
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void write_flashram_commandd();
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void write_rom();
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void write_pif();
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void write_pifb();
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void write_pifh();
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void write_pifd();
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void update_SP();
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void update_DPC();
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#endif
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