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https://github.com/mupen64plus/mupen64plus-oldsvn.git
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139 lines
3.7 KiB
C
139 lines
3.7 KiB
C
/**
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* Mupen64 - gcop1.c
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* Copyright (C) 2002 Hacktarux
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*
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* Mupen64 homepage: http://mupen64.emulation64.com
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* email address: hacktarux@yahoo.fr
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*
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* If you want to contribute to the project please contact
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* me first (maybe someone is already making what you are
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* planning to do).
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*
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*
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* This program is free software; you can redistribute it and/
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* or modify it under the terms of the GNU General Public Li-
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* cence as published by the Free Software Foundation; either
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* version 2 of the Licence, or any later version.
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*
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* This program is distributed in the hope that it will be use-
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* ful, but WITHOUT ANY WARRANTY; without even the implied war-
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* ranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public Licence for more details.
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*
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* You should have received a copy of the GNU General Public
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* Licence along with this program; if not, write to the Free
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* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
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* USA.
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*
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**/
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#include <stdio.h>
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#include "../recomph.h"
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#include "../recomp.h"
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#include "assemble.h"
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#include "../r4300.h"
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#include "../ops.h"
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#include "../../memory/memory.h"
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#include "../macros.h"
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#include "interpret.h"
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void genmfc1()
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{
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#ifdef INTERPRET_MFC1
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gencallinterp((unsigned int)MFC1, 0);
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#else
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gencheck_cop1_unusable();
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mov_eax_memoffs32((unsigned int*)(®_cop1_simple[dst->f.r.nrd]));
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mov_reg32_preg32(EBX, EAX);
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mov_m32_reg32((unsigned int*)dst->f.r.rt, EBX);
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sar_reg32_imm8(EBX, 31);
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mov_m32_reg32(((unsigned int*)dst->f.r.rt)+1, EBX);
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#endif
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}
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void gendmfc1()
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{
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#ifdef INTERPRET_DMFC1
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gencallinterp((unsigned int)DMFC1, 0);
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#else
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gencheck_cop1_unusable();
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mov_eax_memoffs32((unsigned int*)(®_cop1_double[dst->f.r.nrd]));
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mov_reg32_preg32(EBX, EAX);
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mov_reg32_preg32pimm32(ECX, EAX, 4);
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mov_m32_reg32((unsigned int*)dst->f.r.rt, EBX);
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mov_m32_reg32(((unsigned int*)dst->f.r.rt)+1, ECX);
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#endif
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}
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void gencfc1()
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{
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#ifdef INTERPRET_CFC1
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gencallinterp((unsigned int)CFC1, 0);
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#else
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gencheck_cop1_unusable();
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if(dst->f.r.nrd == 31) mov_eax_memoffs32((unsigned int*)&FCR31);
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else mov_eax_memoffs32((unsigned int*)&FCR0);
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mov_memoffs32_eax((unsigned int*)dst->f.r.rt);
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sar_reg32_imm8(EAX, 31);
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mov_memoffs32_eax(((unsigned int*)dst->f.r.rt)+1);
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#endif
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}
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void genmtc1()
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{
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#ifdef INTERPRET_MTC1
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gencallinterp((unsigned int)MTC1, 0);
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#else
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gencheck_cop1_unusable();
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mov_eax_memoffs32((unsigned int*)dst->f.r.rt);
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mov_reg32_m32(EBX, (unsigned int*)(®_cop1_simple[dst->f.r.nrd]));
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mov_preg32_reg32(EBX, EAX);
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#endif
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}
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void gendmtc1()
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{
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#ifdef INTERPRET_DMTC1
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gencallinterp((unsigned int)DMTC1, 0);
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#else
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gencheck_cop1_unusable();
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mov_eax_memoffs32((unsigned int*)dst->f.r.rt);
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mov_reg32_m32(EBX, ((unsigned int*)dst->f.r.rt)+1);
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mov_reg32_m32(EDX, (unsigned int*)(®_cop1_double[dst->f.r.nrd]));
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mov_preg32_reg32(EDX, EAX);
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mov_preg32pimm32_reg32(EDX, 4, EBX);
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#endif
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}
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void genctc1()
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{
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#ifdef INTERPRET_CTC1
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gencallinterp((unsigned int)CTC1, 0);
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#else
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gencheck_cop1_unusable();
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if (dst->f.r.nrd != 31) return;
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mov_eax_memoffs32((unsigned int*)dst->f.r.rt);
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mov_memoffs32_eax((unsigned int*)&FCR31);
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and_eax_imm32(3);
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cmp_eax_imm32(0);
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jne_rj(12);
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mov_m32_imm32((unsigned int*)&rounding_mode, 0x33F); // 10
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jmp_imm_short(48); // 2
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cmp_eax_imm32(1); // 5
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jne_rj(12); // 2
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mov_m32_imm32((unsigned int*)&rounding_mode, 0xF3F); // 10
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jmp_imm_short(29); // 2
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cmp_eax_imm32(2); // 5
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jne_rj(12); // 2
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mov_m32_imm32((unsigned int*)&rounding_mode, 0xB3F); // 10
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jmp_imm_short(10); // 2
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mov_m32_imm32((unsigned int*)&rounding_mode, 0x73F); // 10
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fldcw_m16((unsigned short*)&rounding_mode);
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#endif
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}
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