mirror of
https://github.com/mupen64plus/mupen64plus-oldsvn.git
synced 2025-04-02 10:52:35 -04:00
a6860ca17b
and the order is cyple-by-cyle. Also removed seperate version string for debugger, fixed the appearance of the disassembler including the quality of disassembled opcodes. Allow frontend to close program even if execution is in step mode. Added ZZT32 as contributor to decoder.c and cleaned up a lot of the garbage dumped to stdout & stderr.
1256 lines
29 KiB
C
1256 lines
29 KiB
C
/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
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* Mupen64plus - decoder.c *
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* Mupen64Plus homepage: http://code.google.com/p/mupen64plus/ *
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* Copyright (C) 2002 davFr *
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* Copyright (C) 2008 ZZT32 *
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* Copyright (C) 2008 DarkJezter *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
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* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
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#include "decoder.h"
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#include "opprintf.h"
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static int mot;
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static char *op;
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static char *args;
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static int pc;
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static void RESERV(){
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sprintf(op, "INVLD(%02X) 0x%08X", (mot>>26)&0x3F, mot);
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}
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//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ SPECIAL ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
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static void SLL()
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{
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if( !mot )
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mr4kd_sprintf( op, "NOP", mot, pc, "%n0" );
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else{
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mr4kd_sprintf( op, "SLL", mot, pc, "%ns%rd, %rt, %sa" );
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}
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}
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static void SRL(){
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mr4kd_sprintf( op, "SRL", mot, pc, "%ns%rd, %rt, %sa" );
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}
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static void SRA(){
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mr4kd_sprintf( op, "SRA", mot, pc, "%ns%rd, %rt, %sa" );
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}
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static void SLLV(){
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mr4kd_sprintf( op, "SLLV", mot, pc, "%ns%rd, %rt, %rs" );
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}
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static void SRLV(){
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mr4kd_sprintf( op, "SRLV", mot, pc, "%ns%rd, %rt, %rs" );
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}
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static void SRAV(){
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mr4kd_sprintf( op, "SRAV", mot, pc, "%ns%rd, %rt, %rs" );
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}
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static void JR(){
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mr4kd_sprintf( op, "JR", mot, pc, "%ns%rs" );
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}
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static void JALR(){
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mr4kd_sprintf( op, "JALR", mot, pc, "%ns%rd, %rs" );
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}
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static void SYSCALL(){
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mr4kd_sprintf( op, "SYSCALL", mot, pc, "%n0" );
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}
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static void BREAK(){
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mr4kd_sprintf( op, "BREAK", mot, pc, "%n0" );
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}
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static void SYNC(){
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mr4kd_sprintf( op, "SYNC", mot, pc, "%n0" );
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}
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static void MFHI(){
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mr4kd_sprintf( op, "MFHI", mot, pc, "%ns%rd" );
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}
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static void MTHI(){
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mr4kd_sprintf( op, "MTHI", mot, pc, "%ns%rs" );
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}
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static void MFLO(){
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mr4kd_sprintf( op, "MFLO", mot, pc, "%ns%rd" );
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}
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static void MTLO(){
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mr4kd_sprintf( op, "MTLO", mot, pc, "%ns%rs" );
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}
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static void DSLLV(){
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mr4kd_sprintf( op, "DSLLV", mot, pc, "%ns%rd, %rt, %rs" );
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}
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static void DSRLV(){
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mr4kd_sprintf( op, "DSRLV", mot, pc, "%ns%rd, %rt, %rs" );
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}
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static void DSRAV(){
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mr4kd_sprintf( op, "DSRAV", mot, pc, "%ns%rd, %rt, %rs" );
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}
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static void MULT(){
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mr4kd_sprintf( op, "MULT", mot, pc, "%ns%rs, %rt" );
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}
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static void MULTU(){
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mr4kd_sprintf( op, "MULTU", mot, pc, "%ns%rs, %rt" );
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}
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static void DIV(){
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mr4kd_sprintf( op, "DIV", mot, pc, "%ns%rs, %rt" );
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}
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static void DIVU(){
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mr4kd_sprintf( op, "DIVU", mot, pc, "%ns%rs, %rt" );
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}
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static void DMULT(){
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mr4kd_sprintf( op, "DMULT", mot, pc, "%ns%rs, %rt" );
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}
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static void DMULTU(){
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mr4kd_sprintf( op, "DMULTU", mot, pc, "%ns%rs, %rt" );
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}
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static void DDIV(){
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mr4kd_sprintf( op, "DDIV", mot, pc, "%ns%rs, %rt" );
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}
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static void DDIVU(){
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mr4kd_sprintf( op, "DDIVU", mot, pc, "%ns%rs, %rt" );
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}
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static void ADD(){
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mr4kd_sprintf( op, "ADD", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void ADDU(){
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mr4kd_sprintf( op, "ADDU", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void SUB()
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{
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mr4kd_sprintf( op, "SUB", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void SUBU(){
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mr4kd_sprintf( op, "SUBU", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void AND(){
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mr4kd_sprintf( op, "AND", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void OR(){
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mr4kd_sprintf( op, "OR", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void XOR(){
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mr4kd_sprintf( op, "XOR", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void NOR(){
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mr4kd_sprintf( op, "NOR", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void SLT(){
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mr4kd_sprintf( op, "SLT", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void SLTU(){
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mr4kd_sprintf( op, "SLTU", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void DADD(){
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mr4kd_sprintf( op, "DADD", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void DADDU(){
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mr4kd_sprintf( op, "DADDU", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void DSUB(){
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mr4kd_sprintf( op, "DSUB", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void DSUBU(){
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mr4kd_sprintf( op, "DSUBU", mot, pc, "%ns%rd, %rs, %rt" );
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}
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static void TGE(){
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mr4kd_sprintf( op, "TGE", mot, pc, "%ns%rs, %rt" );
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}
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static void TGEU(){
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mr4kd_sprintf( op, "TGEU", mot, pc, "%ns%rs, %rt" );
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}
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static void TLT(){
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mr4kd_sprintf( op, "TLT", mot, pc, "%ns%rs, %rt" );
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}
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static void TLTU(){
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mr4kd_sprintf( op, "TLTU", mot, pc, "%ns%rs, %rt" );
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}
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static void TEQ(){
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mr4kd_sprintf( op, "TEQ", mot, pc, "%ns%rs, %rt" );
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}
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static void TNE(){
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mr4kd_sprintf( op, "TNE", mot, pc, "%ns%rs, %rt" );
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}
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static void DSLL(){
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mr4kd_sprintf( op, "DSLL", mot, pc, "%ns%rd, %rt, %sa" );
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}
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static void DSRL(){
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mr4kd_sprintf( op, "DSRL", mot, pc, "%ns%rd, %rt, %sa" );
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}
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static void DSRA(){
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mr4kd_sprintf( op, "DSRA", mot, pc, "%ns%rd, %rt, %sa" );
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}
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static void DSLL32(){
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mr4kd_sprintf( op, "DSLL32", mot, pc, "%ns%rd, %rt, %sa" );
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}
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static void DSRL32(){
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mr4kd_sprintf( op, "DSRL32", mot, pc, "%ns%rd, %rt, %sa" );
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}
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static void DSRA32(){
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mr4kd_sprintf( op, "DSRA32", mot, pc, "%ns%rd, %rt, %sa" );
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}
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static void special()
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{
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// sprintf(op, "[00] SPECIAL");
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switch( mot & 0x3F)
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{
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case 0x00: SLL(); break;
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case 0x02: SRL(); break;
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case 0x03: SRA(); break;
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case 0x04: SLLV(); break;
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case 0x06: SRLV(); break;
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case 0x07: SRAV(); break;
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case 0x08: JR(); break;
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case 0x09: JALR(); break;
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case 0x0C: SYSCALL(); break;
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case 0x0D: BREAK(); break;
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case 0x0F: SYNC(); break;
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case 0x10: MFHI(); break;
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case 0x11: MTHI(); break;
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case 0x12: MFLO(); break;
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case 0x13: MTLO(); break;
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case 0x14: DSLLV(); break;
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case 0x16: DSRLV(); break;
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case 0x17: DSRAV(); break;
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case 0x18: MULT(); break;
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case 0x19: MULTU(); break;
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case 0x1A: DIV(); break;
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case 0x1B: DIVU(); break;
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case 0x1C: DMULT(); break;
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case 0x1D: DMULTU(); break;
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case 0x1E: DDIV(); break;
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case 0x1F: DDIVU(); break;
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case 0x20: ADD(); break;
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case 0x21: ADDU(); break;
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case 0x22: SUB(); break;
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case 0x23: SUBU(); break;
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case 0x24: AND(); break;
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case 0x25: OR(); break;
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case 0x26: XOR(); break;
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case 0x27: NOR(); break;
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case 0x2A: SLT(); break;
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case 0x2B: SLTU(); break;
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case 0x2C: DADD(); break;
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case 0x2D: DADDU(); break;
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case 0x2E: DSUB(); break;
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case 0x2F: DSUBU(); break;
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case 0x30: TGE(); break;
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case 0x31: TGEU(); break;
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case 0x32: TLT(); break;
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case 0x33: TLTU(); break;
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case 0x34: TEQ(); break;
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case 0x36: TNE(); break;
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case 0x38: DSLL(); break;
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case 0x3A: DSRL(); break;
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case 0x3B: DSRA(); break;
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case 0x3C: DSLL32(); break;
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case 0x3E: DSRL32(); break;
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case 0x3F: DSRA32(); break;
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default : RESERV(); //just to be sure
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}
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}
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//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ REGIMM ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
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static void BLTZ(){
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mr4kd_sprintf( op, "BLTZ", mot, pc, "%ns%rs, %br" );
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}
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static void BGEZ(){
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mr4kd_sprintf( op, "BGEZ", mot, pc, "%ns%rs, %br" );
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}
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static void BLTZL(){
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mr4kd_sprintf( op, "BLTZL", mot, pc, "%ns%rs, %br" );
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}
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static void BGEZL(){
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mr4kd_sprintf( op, "BGEZL", mot, pc, "%ns%rs, %br" );
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}
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static void TGEI(){
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mr4kd_sprintf( op, "TGEI", mot, pc, "%ns%rs, %ih" );
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}
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static void TGEIU(){
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mr4kd_sprintf( op, "TGEIU", mot, pc, "%ns%rs, %ih" );
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}
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static void TLTI(){
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mr4kd_sprintf( op, "TLTI", mot, pc, "%ns%rs, %ih" );
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}
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static void TLTIU(){
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mr4kd_sprintf( op, "TLTIU", mot, pc, "%ns%rs, %ih" );
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}
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static void TEQI(){
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mr4kd_sprintf( op, "TEQI", mot, pc, "%ns%rs, %ih" );
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}
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static void TNEI(){
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mr4kd_sprintf( op, "TNEI", mot, pc, "%ns%rs, %ih" );
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}
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static void BLTZAL(){
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mr4kd_sprintf( op, "BLTZAL", mot, pc, "%ns%rs, %br" );
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}
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static void BGEZAL(){
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mr4kd_sprintf( op, "BGEZAL", mot, pc, "%ns%rs, %br" );
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}
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static void BLTZALL(){
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mr4kd_sprintf( op, "BLTZALL", mot, pc, "%ns%rs, %br" );
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}
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static void BGEZALL(){
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mr4kd_sprintf( op, "BGEZALL", mot, pc, "%ns%rs, %br" );
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}
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static void regimm()
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{
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// sprintf(op, "[01] REGIMM");
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switch( (mot>>16) & 0x1F)
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{
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case 0x00: BLTZ(); break;
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case 0x01: BGEZ(); break;
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case 0x02: BLTZL(); break;
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case 0x03: BGEZL(); break;
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case 0x08: TGEI(); break;
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case 0x09: TGEIU(); break;
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case 0x0A: TLTI(); break;
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case 0x0B: TLTIU(); break;
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case 0x0C: TEQI(); break;
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case 0x0E: TNEI(); break;
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case 0x10: BLTZAL(); break;
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case 0x11: BGEZAL(); break;
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case 0x12: BLTZALL(); break;
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case 0x13: BGEZALL(); break;
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default: RESERV();
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}
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}
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//]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ ... ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[
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static void J(){
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mr4kd_sprintf( op, "J", mot, pc, "%ns%jm" );
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}
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static void JAL(){
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mr4kd_sprintf( op, "JAL", mot, pc, "%ns%jm" );
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}
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static void BEQ(){
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mr4kd_sprintf( op, "BEQ", mot, pc, "%ns%rs, %rt, %br" );
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}
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static void BNE(){
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mr4kd_sprintf( op, "BNE", mot, pc, "%ns%rs, %rt, %br" );
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}
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static void BLEZ(){
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mr4kd_sprintf( op, "BLEZ", mot, pc, "%ns%rs, %br" );
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}
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static void BGTZ(){
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mr4kd_sprintf( op, "BGTZ", mot, pc, "%ns%rs, %br" );
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}
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static void ADDI(){
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mr4kd_sprintf( op, "ADDI", mot, pc, "%ns%rt, %rs, %ih" );
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}
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static void ADDIU(){
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mr4kd_sprintf( op, "ADDIU", mot, pc, "%ns%rt, %rs, %ih" );
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}
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static void SLTI(){
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mr4kd_sprintf( op, "SLTI", mot, pc, "%ns%rt, %rs, %ih" );
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}
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static void SLTIU(){
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mr4kd_sprintf( op, "SLTIU", mot, pc, "%ns%rt, %rs, %ih" );
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}
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static void ANDI(){
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mr4kd_sprintf( op, "ANDI", mot, pc, "%ns%rt, %rs, %ih" );
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}
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static void ORI(){
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mr4kd_sprintf( op, "ORI", mot, pc, "%ns%rt, %rs, %ih" );
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}
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static void XORI(){
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mr4kd_sprintf( op, "XORI", mot, pc, "%ns%rt, %rs, %ih" );
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}
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static void LUI(){
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mr4kd_sprintf( op, "LUI", mot, pc, "%ns%rt, %ih" );
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}
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//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ cop0 ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
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static void MFC0(){
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mr4kd_sprintf( op, "MFC0", mot, pc, "%ns%rt, %cp" );
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}
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static void MTC0(){
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mr4kd_sprintf( op, "MTC0", mot, pc, "%ns%rt, %cp" );
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}
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//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ tlb ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
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static void TLBR(){
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mr4kd_sprintf( op, "TLBR", mot, pc, "%n0" );
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}
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static void TLBWI(){
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mr4kd_sprintf( op, "TLBWI", mot, pc, "%n0" );
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}
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static void TLBWR(){
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mr4kd_sprintf( op, "TLBWR", mot, pc, "%n0" );
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}
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static void TLBP(){
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mr4kd_sprintf( op, "TLBP", mot, pc, "%n0" );
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}
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static void ERET(){
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mr4kd_sprintf( op, "ERET", mot, pc, "%n0" );
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}
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|
static void tlb()
|
|
{
|
|
// sprintf(op, "[10] tlb");
|
|
|
|
switch( mot & 0x3F)
|
|
{
|
|
case 0x01: TLBR() ; break;
|
|
case 0x02: TLBWI() ; break;
|
|
case 0x06: TLBWR() ; break;
|
|
case 0x08: TLBP() ; break;
|
|
case 0x18: ERET() ; break;
|
|
default: RESERV();
|
|
}
|
|
}
|
|
|
|
static void cop0()
|
|
{
|
|
// sprintf(op, "[10] COP0");
|
|
|
|
switch( (mot>>21) & 0x1F)
|
|
{
|
|
case 0x00: MFC0() ; break;
|
|
case 0x04: MTC0() ; break;
|
|
case 0x10: tlb() ; break;
|
|
default: RESERV();
|
|
}
|
|
}
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ cop1 ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
|
|
static void MFC1(){
|
|
mr4kd_sprintf( op, "MFC1", mot, pc, "%ns%rt, %fs" );
|
|
}
|
|
|
|
static void DMFC1(){
|
|
mr4kd_sprintf( op, "DMFC1", mot, pc, "%ns%rt, %fs" );
|
|
}
|
|
|
|
static void CFC1(){
|
|
mr4kd_sprintf( op, "CFC1", mot, pc, "%ns%rt, %rd" );
|
|
}
|
|
|
|
static void MTC1(){
|
|
mr4kd_sprintf( op, "MTC1", mot, pc, "%ns%ft, %rd" );
|
|
}
|
|
|
|
static void DMTC1(){
|
|
mr4kd_sprintf( op, "DMTC1", mot, pc, "%ns%ft, %rd" );
|
|
}
|
|
|
|
static void CTC1(){
|
|
mr4kd_sprintf( op, "CTC1", mot, pc, "%ns%rt, %rd" );
|
|
}
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ BC ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
|
|
static void BC1F(){
|
|
mr4kd_sprintf( op, "BC1F", mot, pc, "%ns%br" );
|
|
}
|
|
|
|
static void BC1T(){
|
|
mr4kd_sprintf( op, "BC1T", mot, pc, "%ns%br" );
|
|
|
|
}
|
|
|
|
static void BC1FL(){
|
|
mr4kd_sprintf( op, "BC1FL", mot, pc, "%ns%br" );
|
|
|
|
}
|
|
|
|
static void BC1TL(){
|
|
mr4kd_sprintf( op, "BC1TL", mot, pc, "%ns%br" );
|
|
}
|
|
|
|
static void BC()
|
|
{
|
|
// sprintf(op, "[11] BC");
|
|
|
|
switch( (mot>>16) & 3)
|
|
{
|
|
case 0x00: BC1F(); break;
|
|
case 0x01: BC1T(); break;
|
|
case 0x02: BC1FL(); break;
|
|
case 0x03: BC1TL(); break;
|
|
}
|
|
}
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ S ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
|
|
static void ADD_S(){
|
|
mr4kd_sprintf( op, "ADD.S", mot, pc, "%ns%fd, %fs, %ft" );
|
|
}
|
|
|
|
static void SUB_S(){
|
|
mr4kd_sprintf( op, "SUB.S", mot, pc, "%ns%fd, %fs, %ft" );
|
|
}
|
|
|
|
static void MUL_S(){
|
|
mr4kd_sprintf( op, "MUL.S", mot, pc, "%ns%fd, %fs, %ft" );
|
|
}
|
|
|
|
static void DIV_S(){
|
|
mr4kd_sprintf( op, "DIV.S", mot, pc, "%ns%fd, %fs, %ft" );
|
|
}
|
|
|
|
static void SQRT_S(){
|
|
mr4kd_sprintf( op, "SQRT.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void ABS_S(){
|
|
mr4kd_sprintf( op, "ABS.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void MOV_S(){
|
|
mr4kd_sprintf( op, "MOV.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void NEG_S(){
|
|
mr4kd_sprintf( op, "NEG.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void ROUND_L_S(){
|
|
mr4kd_sprintf( op, "ROUND.L.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void TRUNC_L_S(){
|
|
mr4kd_sprintf( op, "TRUNC.L.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CEIL_L_S(){
|
|
mr4kd_sprintf( op, "CEIL.L.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void FLOOR_L_S(){
|
|
mr4kd_sprintf( op, "FLOOR.L.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void ROUND_W_S(){
|
|
mr4kd_sprintf( op, "ROUND.W.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void TRUNC_W_S(){
|
|
mr4kd_sprintf( op, "TRUNC.W.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CEIL_W_S(){
|
|
mr4kd_sprintf( op, "CEIL.W.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void FLOOR_W_S(){
|
|
mr4kd_sprintf( op, "FLOOR.W.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CVT_D_S(){
|
|
mr4kd_sprintf( op, "CVT.D.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CVT_W_S(){
|
|
mr4kd_sprintf( op, "CVT.W.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CVT_L_S(){
|
|
mr4kd_sprintf( op, "CVT.L.S", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
|
|
static void C_F_S(){
|
|
mr4kd_sprintf( op, "C.F.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_UN_S(){
|
|
mr4kd_sprintf( op, "C.UN.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_EQ_S(){
|
|
mr4kd_sprintf( op, "C.EQ.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_UEQ_S(){
|
|
mr4kd_sprintf( op, "C.UEQ.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_OLT_S(){
|
|
mr4kd_sprintf( op, "C.OLT.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_ULT_S(){
|
|
mr4kd_sprintf( op, "C.ULT.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_OLE_S(){
|
|
mr4kd_sprintf( op, "C.OLE.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_ULE_S(){
|
|
mr4kd_sprintf( op, "C.ULE.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_SF_S(){
|
|
mr4kd_sprintf( op, "C.SF.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_NGLE_S(){
|
|
mr4kd_sprintf( op, "C.NGLE.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_SEQ_S(){
|
|
mr4kd_sprintf( op, "C.SEQ.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_NGL_S(){
|
|
mr4kd_sprintf( op, "C.NGL.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_LT_S(){
|
|
mr4kd_sprintf( op, "C.LT.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_NGE_S(){
|
|
mr4kd_sprintf( op, "C.NGE.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_LE_S(){
|
|
mr4kd_sprintf( op, "C.LE.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_NGT_S(){
|
|
mr4kd_sprintf( op, "C.NGT.S", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
|
|
static void S()
|
|
{
|
|
// sprintf(op, "[11] S");
|
|
|
|
switch( mot & 0x3F)
|
|
{
|
|
case 0x00: ADD_S(); break;
|
|
case 0x01: SUB_S(); break;
|
|
case 0x02: MUL_S(); break;
|
|
case 0x03: DIV_S(); break;
|
|
case 0x04: SQRT_S(); break;
|
|
case 0x05: ABS_S(); break;
|
|
case 0x06: MOV_S(); break;
|
|
case 0x07: NEG_S(); break;
|
|
case 0x08: ROUND_L_S(); break;
|
|
case 0x09: TRUNC_L_S(); break;
|
|
case 0x0A: CEIL_L_S(); break;
|
|
case 0x0B: FLOOR_L_S(); break;
|
|
case 0x0C: ROUND_W_S(); break;
|
|
case 0x0D: TRUNC_W_S(); break;
|
|
case 0x0E: CEIL_W_S(); break;
|
|
case 0x0F: FLOOR_W_S(); break;
|
|
case 0x21: CVT_D_S(); break;
|
|
case 0x24: CVT_W_S(); break;
|
|
case 0x25: CVT_L_S(); break;
|
|
case 0x30: C_F_S(); break;
|
|
case 0x31: C_UN_S(); break;
|
|
case 0x32: C_EQ_S(); break;
|
|
case 0x33: C_UEQ_S(); break;
|
|
case 0x34: C_OLT_S(); break;
|
|
case 0x35: C_ULT_S(); break;
|
|
case 0x36: C_OLE_S(); break;
|
|
case 0x37: C_ULE_S(); break;
|
|
case 0x38: C_SF_S(); break;
|
|
case 0x39: C_NGLE_S(); break;
|
|
case 0x3A: C_SEQ_S(); break;
|
|
case 0x3B: C_NGL_S(); break;
|
|
case 0x3C: C_LT_S(); break;
|
|
case 0x3D: C_NGE_S(); break;
|
|
case 0x3E: C_LE_S(); break;
|
|
case 0x3F: C_NGT_S(); break;
|
|
default: RESERV();
|
|
}
|
|
}
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ D ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
|
|
|
|
static void ADD_D(){
|
|
mr4kd_sprintf( op, "ADD.D", mot, pc, "%ns%fd, %fs, %ft" );
|
|
}
|
|
|
|
static void SUB_D(){
|
|
mr4kd_sprintf( op, "SUB.D", mot, pc, "%ns%fd, %fs, %ft" );
|
|
}
|
|
|
|
static void MUL_D(){
|
|
mr4kd_sprintf( op, "MUL.D", mot, pc, "%ns%fd, %fs, %ft" );
|
|
}
|
|
|
|
static void DIV_D(){
|
|
mr4kd_sprintf( op, "DIV.D", mot, pc, "%ns%fd, %fs, %ft" );
|
|
}
|
|
|
|
static void SQRT_D(){
|
|
mr4kd_sprintf( op, "SQRT.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void ABS_D(){
|
|
mr4kd_sprintf( op, "ABS.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void MOV_D(){
|
|
mr4kd_sprintf( op, "MOV.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void NEG_D(){
|
|
mr4kd_sprintf( op, "NEG.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void ROUND_L_D(){
|
|
mr4kd_sprintf( op, "ROUND.L.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void TRUNC_L_D(){
|
|
mr4kd_sprintf( op, "TRUNC.L.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CEIL_L_D(){
|
|
mr4kd_sprintf( op, "CEIL.L.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void FLOOR_L_D(){
|
|
mr4kd_sprintf( op, "FLOOR.L.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void ROUND_W_D(){
|
|
mr4kd_sprintf( op, "ROUND.W.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void TRUNC_W_D(){
|
|
mr4kd_sprintf( op, "TRUNC.W.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CEIL_W_D(){
|
|
mr4kd_sprintf( op, "CEIL.W.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void FLOOR_W_D(){
|
|
mr4kd_sprintf( op, "FLOOR.W.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CVT_S_D(){
|
|
mr4kd_sprintf( op, "CVT.S.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CVT_W_D(){
|
|
mr4kd_sprintf( op, "CVT.W.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CVT_L_D(){
|
|
mr4kd_sprintf( op, "CVT.L.D", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
|
|
|
|
static void C_F_D(){
|
|
mr4kd_sprintf( op, "C.F.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_UN_D(){
|
|
mr4kd_sprintf( op, "C.UN.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_EQ_D(){
|
|
mr4kd_sprintf( op, "C.EQ.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_UEQ_D(){
|
|
mr4kd_sprintf( op, "C.UEQ.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_OLT_D(){
|
|
mr4kd_sprintf( op, "C.OLT.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_ULT_D(){
|
|
mr4kd_sprintf( op, "C.ULT.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_OLE_D(){
|
|
mr4kd_sprintf( op, "C.OLE.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_ULE_D(){
|
|
mr4kd_sprintf( op, "C.ULE.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_SF_D(){
|
|
mr4kd_sprintf( op, "C.SF.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_NGLE_D(){
|
|
mr4kd_sprintf( op, "C.NGLE.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_SEQ_D(){
|
|
mr4kd_sprintf( op, "C.SEQ.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_NGL_D(){
|
|
mr4kd_sprintf( op, "C.NGL.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_LT_D(){
|
|
mr4kd_sprintf( op, "C.LT.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_NGE_D(){
|
|
mr4kd_sprintf( op, "C.NGE.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_LE_D(){
|
|
mr4kd_sprintf( op, "C.LE.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
static void C_NGT_D(){
|
|
mr4kd_sprintf( op, "C.NGT.D", mot, pc, "%ns%fs, %ft" );
|
|
}
|
|
|
|
|
|
static void D()
|
|
{
|
|
// sprintf(op, "[11] D");
|
|
|
|
switch( mot & 0x3F)
|
|
{
|
|
case 0x00: ADD_D(); break;
|
|
case 0x01: SUB_D(); break;
|
|
case 0x02: MUL_D(); break;
|
|
case 0x03: DIV_D(); break;
|
|
case 0x04: SQRT_D(); break;
|
|
case 0x05: ABS_D(); break;
|
|
case 0x06: MOV_D(); break;
|
|
case 0x07: NEG_D(); break;
|
|
case 0x08: ROUND_L_D(); break;
|
|
case 0x09: TRUNC_L_D(); break;
|
|
case 0x0A: CEIL_L_D(); break;
|
|
case 0x0B: FLOOR_L_D(); break;
|
|
case 0x0C: ROUND_W_D(); break;
|
|
case 0x0D: TRUNC_W_D(); break;
|
|
case 0x0E: CEIL_W_D(); break;
|
|
case 0x0F: FLOOR_W_D(); break;
|
|
case 0x20: CVT_S_D(); break;
|
|
case 0x24: CVT_W_D(); break;
|
|
case 0x25: CVT_L_D(); break;
|
|
case 0x30: C_F_D(); break;
|
|
case 0x31: C_UN_D(); break;
|
|
case 0x32: C_EQ_D(); break;
|
|
case 0x33: C_UEQ_D(); break;
|
|
case 0x34: C_OLT_D(); break;
|
|
case 0x35: C_ULT_D(); break;
|
|
case 0x36: C_OLE_D(); break;
|
|
case 0x37: C_ULE_D(); break;
|
|
case 0x38: C_SF_D(); break;
|
|
case 0x39: C_NGLE_D(); break;
|
|
case 0x3A: C_SEQ_D(); break;
|
|
case 0x3B: C_NGL_D(); break;
|
|
case 0x3C: C_LT_D(); break;
|
|
case 0x3D: C_NGE_D(); break;
|
|
case 0x3E: C_LE_D(); break;
|
|
case 0x3F: C_NGT_D(); break;
|
|
default: RESERV();
|
|
}
|
|
}
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ W ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
|
|
static void CVT_S_W(){
|
|
mr4kd_sprintf( op, "CVT.S.W", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CVT_D_W(){
|
|
mr4kd_sprintf( op, "CVT.D.W", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
|
|
static void W()
|
|
{
|
|
// sprintf(op, "[11] W");
|
|
// sprintf(args, " ");
|
|
|
|
switch( mot & 0x3F)
|
|
{
|
|
case 0x20: CVT_S_W(); break;
|
|
case 0x21: CVT_D_W(); break;
|
|
default: RESERV();
|
|
}
|
|
}
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ L ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
|
|
static void CVT_S_L(){
|
|
mr4kd_sprintf( op, "CVT.S.L", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
static void CVT_D_L(){
|
|
mr4kd_sprintf( op, "CVT.D.L", mot, pc, "%ns%fd, %fs" );
|
|
}
|
|
|
|
|
|
static void L(){
|
|
// sprintf(op, "[11] L");
|
|
// sprintf(args, " ");
|
|
|
|
switch( mot & 0x3F)
|
|
{
|
|
case 0x20: CVT_S_L(); break;
|
|
case 0x21: CVT_D_L(); break;
|
|
default: RESERV();
|
|
}
|
|
}
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ cop1 ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
|
|
static void cop1()
|
|
{
|
|
// sprintf(op, "[11] COP1");
|
|
|
|
switch( (mot>>21) & 0x1F)
|
|
{
|
|
case 0x00: MFC1(); break;
|
|
case 0x01: DMFC1(); break;
|
|
case 0x02: CFC1(); break;
|
|
case 0x04: MTC1(); break;
|
|
case 0x05: DMTC1(); break;
|
|
case 0x06: CTC1(); break;
|
|
case 0x08: BC(); break;
|
|
case 0x10: S(); break;
|
|
case 0x11: D(); break;
|
|
case 0x14: W(); break;
|
|
case 0x15: L(); break;
|
|
default: RESERV();
|
|
}
|
|
}
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ ... ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
|
|
static void BEQL(){
|
|
mr4kd_sprintf( op, "BEQL", mot, pc, "%ns%rs, %rt, %br" );
|
|
}
|
|
|
|
static void BNEL(){
|
|
mr4kd_sprintf( op, "BNEL", mot, pc, "%ns%rs, %rt, %br" );
|
|
}
|
|
|
|
static void BLEZL(){
|
|
mr4kd_sprintf( op, "BLEZL", mot, pc, "%ns%rs, %rt, %br" );
|
|
}
|
|
|
|
static void BGTZL(){
|
|
mr4kd_sprintf( op, "BGTZL", mot, pc, "%ns%rs, %rt, %br" );
|
|
}
|
|
|
|
|
|
static void DADDI(){
|
|
mr4kd_sprintf( op, "DADDI", mot, pc, "%ns%rt, %rs, %ih" );
|
|
}
|
|
|
|
static void DADDIU(){
|
|
mr4kd_sprintf( op, "DADDIU", mot, pc, "%ns%rt, %rs, %ih" );
|
|
}
|
|
|
|
|
|
static void LDL(){
|
|
mr4kd_sprintf( op, "LDL", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LDR(){
|
|
mr4kd_sprintf( op, "LDR", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LB(){
|
|
mr4kd_sprintf( op, "LB", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LH(){
|
|
mr4kd_sprintf( op, "LH", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LWL(){
|
|
mr4kd_sprintf( op, "LWL", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LW(){
|
|
mr4kd_sprintf( op, "LW", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LBU(){
|
|
mr4kd_sprintf( op, "LBU", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LHU(){
|
|
mr4kd_sprintf( op, "LHU", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LWR(){
|
|
mr4kd_sprintf( op, "LWR", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LWU(){
|
|
mr4kd_sprintf( op, "LWU", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SB(){
|
|
mr4kd_sprintf( op, "SB", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SH(){
|
|
mr4kd_sprintf( op, "SH", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SWL(){
|
|
mr4kd_sprintf( op, "SWL", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SW(){
|
|
mr4kd_sprintf( op, "SW", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SDL(){
|
|
mr4kd_sprintf( op, "SDL", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SDR(){
|
|
mr4kd_sprintf( op, "SDR", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SWR(){
|
|
mr4kd_sprintf( op, "SWR", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void CACHE(){
|
|
mr4kd_sprintf( op, "CACHE", mot, pc, "%ns%rt, %ih(%rs)");
|
|
}
|
|
|
|
static void LL(){
|
|
mr4kd_sprintf( op, "LL", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LWC1(){
|
|
mr4kd_sprintf( op, "LWC1", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LLD(){
|
|
mr4kd_sprintf( op, "LLD", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LDC1(){
|
|
mr4kd_sprintf( op, "LDC1", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void LD(){
|
|
mr4kd_sprintf( op, "LD", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SC(){
|
|
mr4kd_sprintf( op, "SC", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SWC1(){
|
|
mr4kd_sprintf( op, "SWC1", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SCD(){
|
|
mr4kd_sprintf( op, "SCD", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SDC1(){
|
|
mr4kd_sprintf( op, "SDC1", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
static void SD(){
|
|
mr4kd_sprintf( op, "SD", mot, pc, "%ns%rt, %ih(%rs)" );
|
|
}
|
|
|
|
|
|
|
|
//=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[ DECODE_OP ]=-=-=-=-=-=-=-=-=-=-=-=-=-=-=[//
|
|
void r4300_decode_op( uint32 instr, char *opcode, char *arguments, int counter )
|
|
{
|
|
char buffer[256]; int result;
|
|
mr4kd_disassemble( instr, counter, buffer );
|
|
|
|
/* Split it up */
|
|
if( (result = sscanf( buffer, "%s %s", opcode, arguments )) == 1 )
|
|
strcpy( arguments, " " );
|
|
else
|
|
strcpy( arguments, buffer + 16);
|
|
}
|
|
|
|
/* Disassemble */
|
|
void mr4kd_disassemble ( uint32 instruction, uint32 counter, char * buffer )
|
|
{
|
|
mot = instruction;
|
|
pc = counter;
|
|
op = buffer;
|
|
|
|
switch((mot>>26)&0x3F)
|
|
{
|
|
case 0x00: special(); break;
|
|
case 0x01: regimm(); break;
|
|
case 0x02: J(); break;
|
|
case 0x03: JAL(); break;
|
|
case 0x04: BEQ(); break;
|
|
case 0x05: BNE(); break;
|
|
case 0x06: BLEZ(); break;
|
|
case 0x07: BGTZ(); break;
|
|
case 0x08: ADDI(); break;
|
|
case 0x09: ADDIU(); break;
|
|
case 0x0A: SLTI(); break;
|
|
case 0x0B: SLTIU(); break;
|
|
case 0x0C: ANDI(); break;
|
|
case 0x0D: ORI(); break;
|
|
case 0x0E: XORI(); break;
|
|
case 0x0F: LUI(); break;
|
|
case 0x10: cop0(); break;
|
|
case 0x11: cop1(); break;
|
|
case 0x14: BEQL(); break;
|
|
case 0x15: BNEL(); break;
|
|
case 0x16: BLEZL(); break;
|
|
case 0x17: BGTZL(); break;
|
|
case 0x18: DADDI(); break;
|
|
case 0x19: DADDIU(); break;
|
|
case 0x1A: LDL(); break;
|
|
case 0x1B: LDR(); break;
|
|
case 0x20: LB(); break;
|
|
case 0x21: LH(); break;
|
|
case 0x22: LWL(); break;
|
|
case 0x23: LW(); break;
|
|
case 0x24: LBU(); break;
|
|
case 0x25: LHU(); break;
|
|
case 0x26: LWR(); break;
|
|
case 0x27: LWU(); break;
|
|
case 0x28: SB(); break;
|
|
case 0x29: SH(); break;
|
|
case 0x2A: SWL(); break;
|
|
case 0x2B: SW(); break;
|
|
case 0x2C: SDL(); break;
|
|
case 0x2D: SDR(); break;
|
|
case 0x2E: SWR(); break;
|
|
case 0x2F: CACHE(); break;
|
|
case 0x30: LL(); break;
|
|
case 0x31: LWC1(); break;
|
|
case 0x34: LLD(); break;
|
|
case 0x35: LDC1(); break;
|
|
case 0x37: LD(); break;
|
|
case 0x38: SC(); break;
|
|
case 0x39: SWC1(); break;
|
|
case 0x3C: SCD(); break;
|
|
case 0x3D: SDC1(); break;
|
|
case 0x3F: SD(); break;
|
|
default: RESERV();
|
|
}
|
|
}
|
|
|