mirror of
https://github.com/mupen64plus/mupen64plus-oldsvn.git
synced 2025-04-02 10:52:35 -04:00
a6860ca17b
and the order is cyple-by-cyle. Also removed seperate version string for debugger, fixed the appearance of the disassembler including the quality of disassembled opcodes. Allow frontend to close program even if execution is in step mode. Added ZZT32 as contributor to decoder.c and cleaned up a lot of the garbage dumped to stdout & stderr.
354 lines
11 KiB
C
354 lines
11 KiB
C
/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
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* Mupen64plus - opprintf.c *
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* Mupen64Plus homepage: http://code.google.com/p/mupen64plus/ *
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* Copyright (C) 2008 ZZT32 *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
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* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
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#include <stdio.h>
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#include <string.h>
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#include <ctype.h>
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#include "opprintf.h"
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/* Command Access Macros */
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#define _OPCODE(x) (((x) >> 26) & 0x3F)
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#define _RS(x) (((x) >> 21) & 0x1F)
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#define _RT(x) (((x) >> 16) & 0x1F)
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#define _RD(x) (((x) >> 11) & 0x1F)
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#define _FS(x) (_RD(x))
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#define _FT(x) (_RT(x))
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#define _FD(x) (((x) >> 6) & 0x1F)
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#define _BASE(x) (_RS(x))
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#define _IMMEDIATE(x) ((x) & 0xFFFF)
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#define _OFFSET(x) (_IMMEDIATE(x))
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#define _B_OFFSET(x) (((s16)_IMMEDIATE(x)) * (s16)4)
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#define _TARGET_RAW(x) ((x) & 0x3FFFFFF)
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#define _TARGET(x) (_TARGET_RAW(x) << 2)
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#define _FUNC(x) ((x) & 0x3F)
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#define _SHAM(x) (((x) >> 6) & 0x1F)
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#define _FMT(x) (_RS(x))
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#define _COP(x) ((x) >> 26 & 3)
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/* FMT modes */
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static char fpu_fmt_names[] =
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{
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'S', 'D', /* single/double */
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'?', '?', /* reserved */
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'W', 'L' /* word/longword */
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};
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/* Floating point condition */
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static char *fp_compare_types[] =
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{
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"F", "UN", "EQ", "UEQ", "OLT", "ULT",
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"OLE", "ULE", "SF", "NGLE", "SEQ", "NGL",
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"LT", "NGE", "LE", "NGT"
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};
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/* General purpose register names */
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static char *registers_a_gpr[] =
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{
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"R0", "AT", "V0", "V1",
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"A0", "A1", "A2", "A3",
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"T0", "T1", "T2", "T3",
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"T4", "T5", "T6", "T7",
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"S0", "S1", "S2", "S3",
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"S4", "S5", "S6", "S7",
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"T8", "T9", "K0", "K1",
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"GP", "SP", "S8", "RA"
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};
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/* Floating point register names */
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static char *registers_a_fpr[] =
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{
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"F0", "F1", "F2", "F3",
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"F4", "F5", "F6", "F7",
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"F8", "F9", "F10", "F11",
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"F12", "F13", "F14", "F15",
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"F16", "F17", "F18", "F19",
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"F20", "F21", "F22", "F23",
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"F24", "F25", "F26", "F27",
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"F28", "F29", "F30", "F31"
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};
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/* Coprocessor register names */
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static char *registers_a_cop[] =
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{
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"Index", "Random", "EntryLo0",
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"EntryLo1", "Context", "PageMask",
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"Wired", "Resrvd07", "BadVAddr",
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"Count", "EntryHi", "Compare",
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"Status", "Cause", "EPC", "PRevID",
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"Config", "LLAddr", "WatchLo",
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"WatchHi", "XContext", "Resrvd21",
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"Resrvd22", "Resrvd23", "Resrvd24",
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"Resrvd25", "PErr", "CacheErr", "TagLo",
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"TagHi", "ErrorEPC", "Resrvd31"
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};
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/* The configuration word */
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static long mr4kd_conf =
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MR4KD_SPACING(16) | MR4KD_RPREFIX | MR4KD_RLOWER | MR4KD_OLOWER;
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/* Copy a register name to dest */
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static int mr4kd_rcpy_gpr ( char *dest, int reg )
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{
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int i = 0, s = 0;
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/* Do we put a '$' ? */
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if( mr4kd_conf & MR4KD_RPREFIX )
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dest[i++] = '$';
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for( ; registers_a_gpr[reg][s]; i++, s++ )
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dest[i] = ( (mr4kd_conf & MR4KD_RLOWER) ? tolower(registers_a_gpr[reg][s]) : registers_a_gpr[reg][s] );
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dest[i] = 0;
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return i;
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}
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/* Copy a register name to dest */
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static int mr4kd_rcpy_fpr ( char *dest, int reg )
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{
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int i = 0, s = 0;
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/* Do we put a '$' ? */
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if( mr4kd_conf & MR4KD_RPREFIX )
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dest[i++] = '$';
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for(; registers_a_gpr[reg][s]; i++, s++ )
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dest[i] = ( (mr4kd_conf & MR4KD_RLOWER) ? tolower(registers_a_fpr[reg][s]) : registers_a_fpr[reg][s] );
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dest[i] = 0;
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return i;
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}
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#define TOKEN(x, y) ((x) << 8 | (y))
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/* Give some pretty, formatted output */
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int mr4kd_sprintf ( char *dest, char *name, uint32 instruction, uint32 pc, char *fmt )
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{
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/*
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** Format specifiers:
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** - %rs
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** - %rt
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** - %rd
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**
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** - %fs
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** - %ft
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** - %fd
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**
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** - %cp Coprocessor register
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**
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** - %ff FP mode (single, double etc)
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** - %fc FP compare condition
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**
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** - %ih Immediate (hex)
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** - %id Immediate (dec)
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** - %br Branch address
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** - %jm Jump target
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**
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** - %co COP #
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**
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** - %ns Name
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** - %nc Name with COP number
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** - %nf Name with FP format
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**
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** - %sa Shift amount
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**
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** - %SP Remainder spacing
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*/
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int s = 0; /* Source */
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int d = 0; /* Dest */
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uint16 token;
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/* Scan the format string for specifiers */
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for( s = 0; fmt[s]; s++ )
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{
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/* No token? */
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if( fmt[s] != '%' )
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{
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dest[d++] = fmt[s];
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continue;
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}
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/* Got token, read it in */
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token = (fmt[s + 1] << 8 | fmt[s + 2]);
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/* Check */
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switch( token )
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{
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/* GPRs */
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case TOKEN('r', 's'): d += mr4kd_rcpy_gpr( &dest[d], _RS(instruction) ); break;
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case TOKEN('r', 't'): d += mr4kd_rcpy_gpr( &dest[d], _RT(instruction) ); break;
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case TOKEN('r', 'd'): d += mr4kd_rcpy_gpr( &dest[d], _RD(instruction) ); break;
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/* FPRs */
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case TOKEN('f', 's'): d += mr4kd_rcpy_fpr( &dest[d], _RS(instruction) ); break;
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case TOKEN('f', 't'): d += mr4kd_rcpy_fpr( &dest[d], _RT(instruction) ); break;
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case TOKEN('f', 'd'): d += mr4kd_rcpy_fpr( &dest[d], _RD(instruction) ); break;
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/* COP */
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case TOKEN('c', 'p'): d += sprintf( &dest[d], "%s", registers_a_cop[_RD(instruction)] ); break;
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/* Immediate (hex) */
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case TOKEN('i', 'h'):
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d += sprintf( &dest[d], MR4KD_FLAG_GET(MR4KD_HLOWER) ? "0x%04x" : "0x%04X", _IMMEDIATE(instruction) );
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break;
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/* Immediate (decimal) */
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case TOKEN('i', 'd'):
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d += sprintf( &dest[d], "%i", (int)((short)_IMMEDIATE(instruction)) );
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break;
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/* Branch address */
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case TOKEN('b', 'r'):
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d += sprintf( &dest[d], MR4KD_FLAG_GET(MR4KD_HLOWER) ? "0x%08x" : "0x%08X", ((unsigned int)pc + 4 + (short)(instruction & 0xFFFF) * 4) );
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break;
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/* Jump target */
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case TOKEN('j', 'm'):
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d += sprintf( &dest[d], MR4KD_FLAG_GET(MR4KD_HLOWER) ? "0x%08x" : "0x%08X", _TARGET(instruction) | 0x80000000 );
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break;
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/* Coprocessor number */
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case TOKEN('c', 'o'):
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d += sprintf( &dest[d], "%u", _COP(instruction) );
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break;
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/* Shift amount */
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case TOKEN('s', 'a'):
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d += sprintf( &dest[d], "%u", _SHAM(instruction) );
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break;
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/* Floating point compare mode */
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case TOKEN('f', 'c'):
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d += sprintf( &dest[d], "%s", fp_compare_types[instruction & 0xF] );
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break;
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/* Floating point mode */
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case TOKEN('f', 'f'):
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d += sprintf( &dest[d], "%c", fpu_fmt_names[_FMT(instruction) - 16] );
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break;
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/* Spacing! */
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case TOKEN('S', 'P'):
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d += sprintf( &dest[d], "%*s", -((mr4kd_conf >> 24) - d), " ");
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break;
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/* Instruction name - regular (no space) */
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case TOKEN('n', '0'):
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{
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int i; char nb[32];
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/* Convert to the proper case */
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for( i = 0; name[i]; i++ )
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nb[i] = ( mr4kd_conf & MR4KD_OLOWER ) ? tolower(name[i]) : toupper(name[i]);
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/* Copy it to dest */
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d += sprintf( &dest[d], "%.*s", i, nb );
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}
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break;
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/* Instruction name - regular */
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case TOKEN('n', 's'):
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{
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int i; char nb[32];
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/* Convert to the proper case */
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for( i = 0; name[i]; i++ )
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nb[i] = ( mr4kd_conf & MR4KD_OLOWER ) ? tolower(name[i]) : toupper(name[i]);
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/* Copy it to dest */
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d += sprintf( &dest[d], "%*.*s", -(mr4kd_conf >> 24), i, nb );
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}
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break;
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/* Instruction name - with COP# */
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case TOKEN('n', 'c'):
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{
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int i; char nb[32];
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/* Convert to the proper case */
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for( i = 0; name[i]; i++ )
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nb[i] = ( mr4kd_conf & MR4KD_OLOWER ) ? tolower(name[i]) : toupper(name[i]);
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/* Copy number */
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i += sprintf( &nb[i], "%u", _COP(instruction) );
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/* Copy it to dest */
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d += sprintf( &dest[d], "%*.*s", -(mr4kd_conf >> 24), i, nb );
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}
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break;
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/* Floating point format */
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case TOKEN('n', 'f'):
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{
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int i; char nb[32];
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/* Convert to the proper case */
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for( i = 0; name[i]; i++ )
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nb[i] = ( mr4kd_conf & MR4KD_OLOWER ) ? tolower(name[i]) : toupper(name[i]);
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/* Copy the precision mode */
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i += sprintf( &nb[i], ".%c",( mr4kd_conf & MR4KD_OLOWER ) ?
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tolower(fpu_fmt_names[_FMT(instruction)-16]) :
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toupper(fpu_fmt_names[_FMT(instruction)-16]) );
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/* Copy it to dest */
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d += sprintf( &dest[d], "%*.*s", -(mr4kd_conf >> 24), i, nb );
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}
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break;
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}
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/* Update source pointer */
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s += 2;
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}
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/* Null terminate output */
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dest[d] = 0;
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/* Return chars processed */
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return d;
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}
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/* Set a flag */
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void mr4kd_flag_set ( int flag )
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{
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MR4KD_FLAG_SET( flag );
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}
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/* Clear a flag */
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void mr4kd_flag_clear ( int flag )
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{
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MR4KD_FLAG_CLEAR( flag );
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}
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/* Get flag status */
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int mr4kd_flag_get ( int flag )
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{
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return (mr4kd_conf & flag);
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}
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/* Set spacing (between op & operands) */
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void mr4kd_spacing ( int space )
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{
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MR4KD_SET_SPACE( space );
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}
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