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Author SHA1 Message Date
Nebuleon Fumika
780bde88d2 Use int64_t for the FPU's registers and int32_t for control registers 
This affects 'reg_cop1_fgr_64', 'FCR0' and 'FCR31'.
 2015-02-23 11:04:21 +00:00
Nebuleon Fumika
741cfd03b1 Use uint32_t for the Coprocessor 0 registers 
uint32_t is also used for 'next_interupt', a variable whose meaning
heavily depends on the Coprocessor 0 Count register.
 2015-02-23 11:04:21 +00:00
Nebuleon Fumika
d98f0094b3 Use uint32_t for opcodes in fast_mem_access and recompile_block 2015-02-23 11:04:21 +00:00
Nebuleon Fumika
b8f252a928 Use uint32_t for jumping to N64 addresses 
uint32_t is also used for 'last_addr' and 'pcaddr'.

This commit also contains a fix for a bug whereby loading a PJ64 saved
state file under the New Dynarec would try to read the Program Counter
beyond the file. (It had been read into last_addr, and the other cores
used generic_jump_to(last_addr), but not the New Dynarec.)
 2015-02-23 11:04:21 +00:00
Nebuleon Fumika
e07982cb53 Use intN_t for N64 memory accesses 
The variables affected are 'address', 'rdword', 'cpu_byte',
'cpu_hword', 'cpu_word' and 'cpu_dword'.
 2015-02-23 11:04:21 +00:00
Nebuleon Fumika
b185a3f811 Use int64_t for 'reg', 'hi' and 'lo' 2015-02-23 11:04:15 +00:00
Richard Goedeken
e1639f91f9 unused function warning is kind of stupid 2015-02-22 14:29:42 -08:00
Richard Goedeken
4727b9d6e1 Merge pull request #82 from Nebuleon/debugger-changes 
Debugger enhancements
 2015-02-22 08:32:25 -08:00
Richard Goedeken
7ea3733428 Merge pull request #77 from Gillou68310/interger_divide 
DIV/DIVU instructions use hardware integer divide if available
 2015-02-22 08:22:23 -08:00
Richard Goedeken
7a9f16de89 added project/solution file for Visual Studio 2013. removed older MSVS project files. fix code compatilibity problems with MSVC 2015-02-22 07:13:34 -08:00
Nebuleon Fumika
b52ee85e05 debugger: Split opcodes from their operands on tabs as well as spaces 
For some reason, Coprocessor 1 opcodes are written by the disassembler
as

  opcode <tab> operands

while other opcodes use a 16-character field for the opcode, padded
with spaces. r4300_decode_op would split Coprocessor 1 opcodes like so:

  opcode "mtc1\t\t$a0,$f0", operands ""

Now they are split like so:

  opcode "mtc1", operands "$a0,$f0"

This can be helpful for disassembly outputs that don't use tabs.
 2015-02-21 06:32:46 +00:00
Nebuleon Fumika
dafbe985fc debugger: Add $ to all register names for consistency 
Previously, $zero, $at, $gp, $sp, $ra and FPU registers ($fNN) had a
dollar sign in front of them, but not any of the other integer
registers.
 2015-02-21 06:14:21 +00:00
Dorian Fevrier
3030f93360 Merge pull request #80 from Nebuleon/load-swap-opt-2 
Copy and byte-swap incoming N64 ROMs in one step.
 2015-02-17 21:25:28 -05:00
Gillou68310
3e770dbd34 new_dynarec: parse cpuinfo in C instead of C++ 2015-02-17 15:05:19 +01:00
Gillou68310
3231d2c270 new_dynarec: autodetect ARM integer divide feature at runtime 2015-02-17 13:46:37 +01:00
Gillou68310
3ee6b48ae0 new_dynarec: DIV/DIVU use integer divide if available (disable by default) 2015-02-17 13:42:26 +01:00
Nebuleon Fumika
cf05bb12d7 Copy and byte-swap incoming N64 ROMs in one step 
memcpy + swap_rom, on .z64 and .n64 input ROMs, was doing two passes
on the Core's ROM buffer. The second pass had to read each word back
after the memcpy, and they were likely kicked out of the data cache.
 2015-02-17 05:39:41 +00:00
Nebuleon Fumika
cbea2fe7e8 Use memcmp against 4-byte arrays to determine if a ROM image is valid 
This is much less unwieldy and removes some magic constants in the
code.
 2015-02-17 05:31:27 +00:00
Richard Goedeken
e108a88677 bugfix in regtest script 2015-02-14 08:39:43 -08:00
Richard Goedeken
6fe1b2c32c Merge branch 'wnayes-dbg-runstate-enum' 2015-02-14 08:37:10 -08:00
Richard Goedeken
4abfbaf472 Merge branch 'dbg-runstate-enum' of https://github.com/wnayes/mupen64plus-core into wnayes-dbg-runstate-enum 2015-02-14 08:34:55 -08:00
Richard Goedeken
951a8d39aa Merge pull request #53 from bsmiles32/fix_load_regs_bt 
Fix load_regs_bt.
 2015-02-14 08:29:47 -08:00
Richard Goedeken
52c9449d12 Merge pull request #71 from bsmiles32/ai_refac 
AI refactorings
 2015-02-14 08:25:40 -08:00
Richard Goedeken
6e8b9c3227 Merge pull request #76 from Gillou68310/DMULTU 
Implemented recompiled DMULTU instruction on ARM
 2015-02-14 07:50:58 -08:00
Richard Goedeken
fa107367b9 Merge pull request #75 from Gillou68310/DMULT 
Implemented recompiled DMULT instruction on ARM
 2015-02-14 07:49:48 -08:00
Richard Goedeken
8f0e994305 Merge pull request #58 from Gillou68310/new_dynarec_msvc10 
Allow building the core with the new dynarec on windows
 2015-02-14 00:54:15 -08:00
Richard Goedeken
067eb4596e Merge pull request #70 from bsmiles32/rdram_detection_hack 
Rdram detection hack
 2015-02-14 00:40:29 -08:00
Richard Goedeken
619916d22e Merge pull request #69 from Nebuleon/pure-interp-decoupling 
Decouple the Pure Interpreter from the Cached Interpreter
 2015-02-13 23:23:32 -08:00
bsmiles32
55f2f248ae Merge pull request #74 from bsmiles32/fix_vi_field_update 
Fix vi->field update when in interlaced mode.
 2015-02-13 19:04:18 +01:00
Gillou68310
e436dd2073 new_dynarec: Use HOST_TEMPREG instead of allocating a new temp register 2015-02-13 10:25:09 +01:00
Gillou68310
753f4c0f73 new_dynarec: Implemented recompiled DMULTU instruction on ARM 2015-02-13 10:25:08 +01:00
Gillou68310
514154f23b new_dynarec: Use HOST_TEMPREG instead of allocating a new temp register 2015-02-13 10:23:17 +01:00
Gillou68310
2fdbcfcd19 new_dynarec: Implemented recompiled DMULT instruction on ARM 2015-02-13 10:23:15 +01:00
Richard Goedeken
7376730999 add new performance tests to regression test script. add more detailed options for selecting which tests to run 2015-02-11 07:14:34 -08:00
Dorian Fevrier
2cdaad62b9 Merge pull request #73 from gizmo98/patch-1 
linkage_arm.S: Fix VFP SOFTFP target
 2015-02-11 09:25:09 -05:00
Bobby Smiles
7342554963 Fix vi->field update when in interlaced mode. 
vi->field value is assumed to be either 0 or 1 for VI_CURRENT_REG
update. The previous vi->field update formula did not guarantee that,
and therefore could lead to corrupted VI_CURRENT_REG values.

This regression was introduced in commit f9308adc.
 2015-02-11 12:23:04 +01:00
gizmo98
95d68cdeca linkage_arm.S: Fix VFP SOFTFP target 
https://github.com/mupen64plus/mupen64plus-core/issues/72
 2015-02-10 18:15:42 +01:00
Gillou68310
23f45a252a Fixed building issues on MSVC2010 2015-02-10 14:56:55 +01:00
Gillou68310
1e4a30ce79 Added .filters file to MSVC2010 project so every source files are classified by folder name 2015-02-10 11:59:50 +01:00
Gillou68310
f613e1070f Fixed building issues on MSVC2010 2015-02-10 11:59:50 +01:00
Gillou68310
dd7057786f Rename rdram to g_rdram in linkage_x86.asm 2015-02-10 11:59:49 +01:00
Gillou68310
183e2a8dc9 Leading underscore on assembly symbols should be the default behavior 
According to NASM documentation (see 9.1.1 External Symbol Names)
http://www.nasm.us/doc/nasmdoc9.html

Most 32-bit C compilers share the convention used by 16-bit compilers,
that the names of all global symbols (functions or data) they define are
formed by prefixing an underscore to the name as it appears in the C
program. However, not all of them do: the ELF specification states that
C symbols do not have a leading underscore on their assembly-language
names.
 2015-02-10 11:59:49 +01:00
Gillou68310
9f3385b996 Update makefile to build linkage_x86.asm with NASM 2015-02-10 11:59:49 +01:00
Gillou68310
f1357216a7 Added project file for MSVC2010 
4 possible configurations are available:
-Debug
-Release
-New_dynarec_Debug
-New_dynarec_Release
 2015-02-10 11:59:49 +01:00
Gillou68310
a87764a311 new_dynarec: Ported linkage_x86.S to intel format assembly 2015-02-10 11:59:49 +01:00
Gillou68310
42287c3aaa new_dynarec: Allow building the new_dynarec code in C++ mode so it can be built using MSVC2010 2015-02-10 11:59:49 +01:00
Gillou68310
3eab0b2961 Rename "word", "dword" and "hword" variables to "cpu_word", "cpu_dword" and "cpu_hword" 2015-02-10 11:45:45 +01:00
Bobby Smiles
a5330b75de Isolate AI subsystem from audio plugin. 
The AI controller has been reworked to be made independent of the audio
plugin. All it expects is 2 callbacks (one for setting sample format,
and the other to push samples).

A retro-compatibility module implements these 2 new callbacks using the
existing audio plugin in a best effort manner as pure zilmar spec
is not fully compatible with the new callbacks. However, by exploiting
implementation details of both core and audio plugin, we can get
a "good enough" implementation of these callbacks.

Audio DMA fifo has been also reworked and its associated data has
changed. A compromise has been made in order to not change the
savestate format.
 2015-02-09 02:33:47 +01:00
Bobby Smiles
9ecd295e48 Extract fifo_push and fifo_pop functions. 2015-02-08 22:30:16 +01:00
Richard Goedeken
683127a1ae update Mupen64Plus regression tests: 1. add Glide64Mk2 video plugin build and test, 2. for Rice video image compares, use Bash and Image Magick to only test the center of the screenshot images, with a 1-pixel border all around 2015-02-08 10:55:10 -08:00