mirror of
https://github.com/decaf-emu/decaf-emu.git
synced 2025-04-02 10:42:13 -04:00
b8b41add42
This commit converges the CPU and GPU retiling implementations to have a common interface. It also converges their actual implementations to be the same for both, allowing debugging and performance improvements to the retiler on CPU before porting to GPU. This commit also updates the retiler testing to be a lot more consistent, and also ensures that both tiling AND untiling are behaving appropriately.
115 lines
3.6 KiB
C++
115 lines
3.6 KiB
C++
#pragma once
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#include <addrlib/addrinterface.h>
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#include <catch.hpp>
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#include <random>
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#include <spdlog/spdlog.h>
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#include <vector>
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#include <libgpu/gpu7_tiling.h>
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extern std::vector<uint8_t> sRandomData;
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struct TestLayout
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{
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uint32_t width;
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uint32_t height;
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uint32_t depth;
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uint32_t testFirstSlice;
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uint32_t testNumSlices;
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};
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struct TestFormat
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{
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gpu7::tiling::DataFormat format;
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uint32_t bpp;
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bool depth;
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};
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struct TestTilingMode
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{
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gpu7::tiling::TileMode tileMode;
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};
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static constexpr TestLayout sTestLayout[] = {
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{ 1u, 1u, 1u, 0u, 1u },
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{ 1u, 1u, 11u, 5u, 5u },
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{ 338u, 309u, 1u, 0u, 1u },
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{ 338u, 309u, 11u, 5u, 5u },
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// The variants above cover these, but they are useful for
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// debugging various errors in the algorithms. The matrix
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// is already huge though, so disabling by default.
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//{ 338u, 309u, 4u, 0u, 4u },
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};
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static constexpr TestLayout sPerfTestLayout = { 338u, 309u, 8u, 0u, 8u };
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static constexpr TestTilingMode sTestTilingMode[] = {
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{ gpu7::tiling::TileMode::Micro1DTiledThin1 },
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{ gpu7::tiling::TileMode::Micro1DTiledThick },
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{ gpu7::tiling::TileMode::Macro2DTiledThin1 },
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{ gpu7::tiling::TileMode::Macro2DTiledThin2 },
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{ gpu7::tiling::TileMode::Macro2DTiledThin4 },
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{ gpu7::tiling::TileMode::Macro2DTiledThick },
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{ gpu7::tiling::TileMode::Macro2BTiledThin1 },
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{ gpu7::tiling::TileMode::Macro2BTiledThin2 },
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{ gpu7::tiling::TileMode::Macro2BTiledThin4 },
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{ gpu7::tiling::TileMode::Macro2BTiledThick },
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{ gpu7::tiling::TileMode::Macro3DTiledThin1 },
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{ gpu7::tiling::TileMode::Macro3DTiledThick },
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{ gpu7::tiling::TileMode::Macro3BTiledThin1 },
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{ gpu7::tiling::TileMode::Macro3BTiledThick },
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};
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static constexpr TestFormat sTestFormats[] = {
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{ gpu7::tiling::DataFormat::FMT_8, 8u, false },
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{ gpu7::tiling::DataFormat::FMT_8_8, 16u, false },
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{ gpu7::tiling::DataFormat::FMT_8_8_8_8, 32u, false },
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{ gpu7::tiling::DataFormat::FMT_32_32, 64u, false },
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{ gpu7::tiling::DataFormat::FMT_32_32_32_32, 128u, false },
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//{ gpu7::tiling::DataFormat::FMT_16, 16u, true },
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//{ gpu7::tiling::DataFormat::FMT_32, 32u, true },
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//{ gpu7::tiling::DataFormat::FMT_X24_8_32_FLOAT, 64u, true },
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};
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static const char*
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tileModeToString(gpu7::tiling::TileMode mode)
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{
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switch (mode) {
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case gpu7::tiling::TileMode::LinearGeneral:
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return "LinearGeneral";
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case gpu7::tiling::TileMode::LinearAligned:
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return "LinearAligned";
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case gpu7::tiling::TileMode::Micro1DTiledThin1:
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return "Tiled1DThin1";
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case gpu7::tiling::TileMode::Micro1DTiledThick:
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return "Tiled1DThick";
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case gpu7::tiling::TileMode::Macro2DTiledThin1:
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return "Tiled2DThin1";
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case gpu7::tiling::TileMode::Macro2DTiledThin2:
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return "Tiled2DThin2";
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case gpu7::tiling::TileMode::Macro2DTiledThin4:
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return "Tiled2DThin4";
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case gpu7::tiling::TileMode::Macro2DTiledThick:
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return "Tiled2DThick";
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case gpu7::tiling::TileMode::Macro2BTiledThin1:
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return "Tiled2BThin1";
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case gpu7::tiling::TileMode::Macro2BTiledThin2:
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return "Tiled2BThin2";
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case gpu7::tiling::TileMode::Macro2BTiledThin4:
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return "Tiled2BThin4";
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case gpu7::tiling::TileMode::Macro2BTiledThick:
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return "Tiled2BThick";
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case gpu7::tiling::TileMode::Macro3DTiledThin1:
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return "Tiled3DThin1";
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case gpu7::tiling::TileMode::Macro3DTiledThick:
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return "Tiled3DThick";
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case gpu7::tiling::TileMode::Macro3BTiledThin1:
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return "Tiled3BThin1";
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case gpu7::tiling::TileMode::Macro3BTiledThick:
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return "Tiled3BThick";
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default:
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FAIL(fmt::format("Unknown tiling mode {}", static_cast<int>(mode)));
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return "Unknown";
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}
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}
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