mirror of
https://github.com/DaedalusX64/daedalus.git
synced 2025-04-02 10:21:48 -04:00
132 lines
5.7 KiB
C++
132 lines
5.7 KiB
C++
/*
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Copyright (C) 2001,2005 StrmnNrmn
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#pragma once
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#ifndef SYSW32_DYNAREC_X64_CODEGENERATORX64_H_
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#define SYSW32_DYNAREC_X64_CODEGENERATORX64_H_
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#include "DynaRec/CodeGenerator.h"
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#include "DynaRec/TraceRecorder.h"
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#include "AssemblyWriterX64.h"
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#include "DynarecTargetX64.h"
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// XXXX For GenerateCompare_S/D
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#define FLAG_SWAP 0x100
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#define FLAG_C_LT (0x41) // jne- le
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#define FLAG_C_LE (FLAG_SWAP|0x41) // je - ! gt
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#define FLAG_C_EQ (FLAG_SWAP|0x40) // je - ! eq
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#ifdef DAEDALUS_W32
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#define FIRST_PARAM_REG_CODE RCX_CODE
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#define SECOND_PARAM_REG_CODE RDX_CODE
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#define THIRD_PARAM_REG_CODE R8_CODE
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#else
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#define FIRST_PARAM_REG_CODE RDI_CODE
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#define SECOND_PARAM_REG_CODE RSI_CODE
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#define THIRD_PARAM_REG_CODE RDX_CODE
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#endif
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class CCodeGeneratorX64 : public CCodeGenerator, public CAssemblyWriterX64
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{
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public:
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CCodeGeneratorX64( CAssemblyBuffer * p_primary, CAssemblyBuffer * p_secondary );
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virtual void Initialise( u32 entry_address, u32 exit_address, u32 * hit_counter, const void * p_base, const SRegisterUsageInfo & register_usage );
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virtual void Finalise( ExceptionHandlerFn p_exception_handler_fn, const std::vector< CJumpLocation > & exception_handler_jumps, const std::vector<RegisterSnapshotHandle>& exception_handler_snapshots );
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virtual void UpdateRegisterCaching( u32 instruction_idx );
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virtual RegisterSnapshotHandle GetRegisterSnapshot();
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virtual CCodeLabel GetEntryPoint() const;
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virtual CCodeLabel GetCurrentLocation() const;
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virtual u32 GetCompiledCodeSize() const;
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virtual CJumpLocation GenerateExitCode( u32 exit_address, u32 jump_address, u32 num_instructions, CCodeLabel next_fragment );
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virtual void GenerateEretExitCode( u32 num_instructions, CIndirectExitMap * p_map );
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virtual void GenerateIndirectExitCode( u32 num_instructions, CIndirectExitMap * p_map );
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virtual void GenerateBranchHandler( CJumpLocation branch_handler_jump, RegisterSnapshotHandle snapshot );
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virtual CJumpLocation GenerateOpCode( const STraceEntry& ti, bool branch_delay_slot, const SBranchDetails * p_branch, CJumpLocation * p_branch_jump);
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virtual CJumpLocation ExecuteNativeFunction( CCodeLabel speed_hack, bool check_return );
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private:
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void SetVar( u32 * p_var, u32 value );
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void SetVar8( u32 * p_var, u8 value );
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CJumpLocation GenerateBranchAlways( CCodeLabel target );
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CJumpLocation GenerateBranchIfSet( const u32 * p_var, CCodeLabel target );
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CJumpLocation GenerateBranchIfNotSet( const u32 * p_var, CCodeLabel target );
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CJumpLocation GenerateBranchIfEqual32( const u32 * p_var, u32 value, CCodeLabel target );
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CJumpLocation GenerateBranchIfEqual8( const u32 * p_var, u8 value, CCodeLabel target );
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CJumpLocation GenerateBranchIfNotEqual32( const u32 * p_var, u32 value, CCodeLabel target );
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CJumpLocation GenerateBranchIfNotEqual8( const u32 * p_var, u8 value, CCodeLabel target );
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void GenerateGenericR4300( OpCode op_code, CPU_Instruction p_instruction );
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void GenerateExceptionHander( ExceptionHandlerFn p_exception_handler_fn, const std::vector< CJumpLocation > & exception_handler_jumps, const std::vector<RegisterSnapshotHandle>& exception_handler_snapshots );
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private:
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bool mSpCachedInESI; // Is sp cached in ESI?
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u32 mSetSpPostUpdate; // Set Sp base counter after this update
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CAssemblyBuffer * mpPrimary;
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CAssemblyBuffer * mpSecondary;
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private:
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void GenerateLoad(EN64Reg base, s16 offset, u8 twiddle, u8 bits);
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void GenerateCACHE( EN64Reg base, s16 offset, u32 cache_op );
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bool GenerateLW(EN64Reg rt, EN64Reg base, s16 offset );
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bool GenerateSW(EN64Reg rt, EN64Reg base, s16 offset );
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bool GenerateSWC1( u32 ft, EN64Reg base, s16 offset );
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bool GenerateLB(EN64Reg rt, EN64Reg base, s16 offset );
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bool GenerateLBU(EN64Reg rt, EN64Reg base, s16 offset );
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bool GenerateLH(EN64Reg rt, EN64Reg base, s16 offset );
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bool GenerateLWC1(u32 ft, EN64Reg base, s16 offset );
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void GenerateLUI(EN64Reg rt, s16 offset );
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void GenerateDADDIU( EN64Reg rt, EN64Reg rs, s16 immediate );
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void GenerateADDIU( EN64Reg rt, EN64Reg rs, s16 immediate );
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void GenerateANDI( EN64Reg rt, EN64Reg rs, u16 immediate );
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void GenerateORI( EN64Reg rt, EN64Reg rs, u16 immediate );
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void GenerateXORI( EN64Reg rt, EN64Reg rs, u16 immediate );
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void GenerateJAL( u32 address );
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void GenerateJR( EN64Reg rs);
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void GenerateSLL( EN64Reg rd, EN64Reg rt, u32 sa );
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void GenerateSRL( EN64Reg rd, EN64Reg rt, u32 sa );
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void GenerateSRA( EN64Reg rd, EN64Reg rt, u32 sa );
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void GenerateOR( EN64Reg rd, EN64Reg rs, EN64Reg rt );
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void GenerateAND( EN64Reg rd, EN64Reg rs, EN64Reg rt );
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void GenerateXOR( EN64Reg rd, EN64Reg rs, EN64Reg rt );
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void GenerateNOR( EN64Reg rd, EN64Reg rs, EN64Reg rt );
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void GenerateADDU( EN64Reg rd, EN64Reg rs, EN64Reg rt );
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void GenerateSUBU( EN64Reg rd, EN64Reg rs, EN64Reg rt );
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void GenerateDADDU( EN64Reg rd, EN64Reg rs, EN64Reg rt );
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void GenerateDSUBU( EN64Reg rd, EN64Reg rs, EN64Reg rt );
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};
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#endif // SYSW32_DYNAREC_X64_CODEGENERATORX64_H_
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