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8b89df2fdc
Replaced all references to simulation with emulation Updated copyright year Updated .gitignore to reduce chances of random files being uploaded to the repo Added .gitattributes to normalize all text files, and to ignore binary files (which includes the logo and the NEC PDF)
114 lines
3.3 KiB
C
114 lines
3.3 KiB
C
//
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// ri/controller.c: RAM interface controller.
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//
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// CEN64: Cycle-Accurate Nintendo 64 Emulator.
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// Copyright (C) 2015, Tyler J. Stachecki.
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//
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// This file is subject to the terms and conditions defined in
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// 'LICENSE', which is part of this source code package.
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//
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#include "common.h"
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#include "bus/address.h"
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#include "bus/controller.h"
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#include "ri/controller.h"
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#ifdef DEBUG_MMIO_REGISTER_ACCESS
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const char *rdram_register_mnemonics[NUM_RDRAM_REGISTERS] = {
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#define X(reg) #reg,
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#include "ri/rdram_registers.md"
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#undef X
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};
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#endif
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#ifdef DEBUG_MMIO_REGISTER_ACCESS
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const char *ri_register_mnemonics[NUM_RI_REGISTERS] = {
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#define X(reg) #reg,
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#include "ri/registers.md"
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#undef X
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};
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#endif
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// Initializes the RI.
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int ri_init(struct ri_controller *ri, struct bus_controller *bus) {
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ri->bus = bus;
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// MESS uses these, so we will too?
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ri->regs[RI_MODE_REG] = 0xE;
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ri->regs[RI_CONFIG_REG] = 0x40;
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ri->regs[RI_SELECT_REG] = 0x14;
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ri->regs[RI_REFRESH_REG] = 0x63634;
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return 0;
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}
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// Reads a word from RDRAM.
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int read_rdram(void *opaque, uint32_t address, uint32_t *word) {
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struct ri_controller *ri = (struct ri_controller *) opaque;
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unsigned offset = address - RDRAM_BASE_ADDRESS;
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memcpy(word, ri->ram + offset, sizeof(*word));
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*word = byteswap_32(*word);
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return 0;
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}
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// Reads a word from the RDRAM MMIO register space.
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int read_rdram_regs(void *opaque, uint32_t address, uint32_t *word) {
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struct ri_controller *ri = (struct ri_controller *) opaque;
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unsigned offset = address - RDRAM_REGS_BASE_ADDRESS;
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enum rdram_register reg = (offset >> 2);
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*word = ri->rdram_regs[reg];
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debug_mmio_read(rdram, rdram_register_mnemonics[reg], *word);
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return 0;
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}
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// Reads a word from the RI MMIO register space.
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int read_ri_regs(void *opaque, uint32_t address, uint32_t *word) {
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struct ri_controller *ri = (struct ri_controller *) opaque;
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unsigned offset = address - RI_REGS_BASE_ADDRESS;
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enum ri_register reg = (offset >> 2);
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*word = ri->regs[reg];
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debug_mmio_read(ri, ri_register_mnemonics[reg], *word);
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return 0;
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}
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// Writes a word to RDRAM.
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int write_rdram(void *opaque, uint32_t address, uint32_t word, uint32_t dqm) {
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struct ri_controller *ri = (struct ri_controller *) opaque;
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unsigned offset = address - RDRAM_BASE_ADDRESS;
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uint32_t orig_word;
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memcpy(&orig_word, ri->ram + offset, sizeof(orig_word));
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orig_word = byteswap_32(orig_word) & ~dqm;
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word = byteswap_32(orig_word | word);
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memcpy(ri->ram + offset, &word, sizeof(word));
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return 0;
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}
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// Writes a word to the RDRAM MMIO register space.
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int write_rdram_regs(void *opaque, uint32_t address, uint32_t word, uint32_t dqm) {
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struct ri_controller *ri = (struct ri_controller *) opaque;
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unsigned offset = address - RDRAM_REGS_BASE_ADDRESS;
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enum rdram_register reg = (offset >> 2);
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debug_mmio_write(rdram, rdram_register_mnemonics[reg], word, dqm);
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ri->rdram_regs[reg] &= ~dqm;
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ri->rdram_regs[reg] |= word;
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return 0;
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}
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// Writes a word to the RI MMIO register space.
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int write_ri_regs(void *opaque, uint32_t address, uint32_t word, uint32_t dqm) {
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struct ri_controller *ri = (struct ri_controller *) opaque;
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unsigned offset = address - RI_REGS_BASE_ADDRESS;
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enum ri_register reg = (offset >> 2);
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debug_mmio_write(ri, ri_register_mnemonics[reg], word, dqm);
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ri->regs[reg] &= ~dqm;
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ri->regs[reg] |= word;
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return 0;
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}
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