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c4afd44ed7
Replaced all references to simulation with emulation Updated copyright year Updated .gitignore to reduce chances of random files being uploaded to the repo Added .gitattributes to normalize all text files, and to ignore binary files (which includes the logo and the NEC PDF)
95 lines
2.6 KiB
C
95 lines
2.6 KiB
C
//
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// bus/address.h: System bus address ranges.
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//
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// CEN64: Cycle-Accurate Nintendo 64 Emulator.
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// Copyright (C) 2015, Tyler J. Stachecki.
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//
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// This file is subject to the terms and conditions defined in
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// 'LICENSE', which is part of this source code package.
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//
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#ifndef __bus_address_h__
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#define __bus_address_h__
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// Audio interface registers.
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#define AI_REGS_BASE_ADDRESS 0x04500000
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#define AI_REGS_ADDRESS_LEN 0x00000018
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// DD C2 sector buffer.
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#define DD_C2S_BUFFER_ADDRESS 0x05000000
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#define DD_C2S_BUFFER_LEN 0x00000400
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// DD data sector buffer.
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#define DD_DS_BUFFER_ADDRESS 0x05000400
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#define DD_DS_BUFFER_LEN 0x00000100
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// DD IPL ROM.
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#define DD_IPL_ROM_ADDRESS 0x06000000
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#define DD_IPL_ROM_LEN 0x00400000
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// DD microsequencer RAM.
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#define DD_MS_RAM_ADDRESS 0x05000580
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#define DD_MS_RAM_LEN 0x00000040
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// DD interface registers.
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#define DD_REGS_BASE_ADDRESS 0x05000500
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#define DD_REGS_ADDRESS_LEN 0x0000004C
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// Display processor registers.
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#define DP_REGS_BASE_ADDRESS 0x04100000
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#define DP_REGS_ADDRESS_LEN 0x00000020
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// MIPS interface registers.
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#define MI_REGS_BASE_ADDRESS 0x04300000
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#define MI_REGS_ADDRESS_LEN 0x00000010
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// Parallel interface regs.
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#define PI_REGS_BASE_ADDRESS 0x04600000
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#define PI_REGS_ADDRESS_LEN 0x00100000
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// Peripheral interface RAM.
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#define PIF_RAM_BASE_ADDRESS 0x1FC007C0
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#define PIF_RAM_ADDRESS_LEN 0x00000040
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// Peripheral interface ROM.
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#define PIF_ROM_BASE_ADDRESS 0x1FC00000
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#define PIF_ROM_ADDRESS_LEN 0x000007C0
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// Physical memory.
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#define RDRAM_BASE_ADDRESS 0x00000000
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#define RDRAM_BASE_ADDRESS_LEN 0x00800000
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// RDRAM registers.
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#define RDRAM_REGS_BASE_ADDRESS 0x03F00000
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#define RDRAM_REGS_ADDRESS_LEN 0x00000028
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// RAM interface registers.
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#define RI_REGS_BASE_ADDRESS 0x04700000
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#define RI_REGS_ADDRESS_LEN 0x00000020
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// Cartridge ROM.
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#define ROM_CART_BASE_ADDRESS 0x10000000
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#define ROM_CART_ADDRESS_LEN 0x0FC00000
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// Serial interface registers.
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#define SI_REGS_BASE_ADDRESS 0x04800000
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#define SI_REGS_ADDRESS_LEN 0x0000001C
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// SP data/instruction memory.
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#define SP_MEM_BASE_ADDRESS 0x04000000
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#define SP_MEM_ADDRESS_LEN 0x00002000
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// SP interface registers.
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#define SP_REGS_BASE_ADDRESS 0x04040000
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#define SP_REGS_ADDRESS_LEN 0x00000020
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// SP interface registers [2].
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#define SP_REGS2_BASE_ADDRESS 0x04080000
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#define SP_REGS2_ADDRESS_LEN 0x00000008
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// Video interface registers.
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#define VI_REGS_BASE_ADDRESS 0x04400000
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#define VI_REGS_ADDRESS_LEN 0x00000038
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#endif
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