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599 commits 6 branches 1 tag 5.4 MiB
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28 commits

Author SHA1 Message Date
Tyler Stachecki
ec126dfc85 Fix SSE2 endian issue in the RSP ldst functions. 2015-01-28 22:38:24 -05:00
Tyler Stachecki
ca8e052024 Add (unoptimized) SSE2 support. 2015-01-07 17:32:19 -05:00
John Paul Adrian Glaubitz
08feca5ff1 Fix name mismatches of 'srcp' parameter in rsp_vect_load_and_shuffle_operand. 
Signed-off-by: Tyler Stachecki <tstache1@binghamton.edu>
 2015-01-07 09:43:39 -05:00
Tyler Stachecki
5229996ecd Trim off a few hundred bytes of code. 2015-01-05 23:00:49 -05:00
Tyler Stachecki
84d19566b9 Merge more functions together. 2015-01-02 23:51:20 -05:00
Tyler Stachecki
6d0af5d89a Cleanup SSSE3+ loads and stores. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
3a969b2379 Do some general cleanup/optimization. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
fea458e70c Add (partial) implementations for LPV/LUV/SPV/SUV. 
Also, cleanup other SSSE3+ accelerated loads and stores.
 2014-12-26 14:19:45 -05:00
Tyler Stachecki
a2f87f843c Optimize VRCP* and VRSQ* functions. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
824131db6b Use a union for RSP vectors to force alignment. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
6faca60054 Start reworking RSP vector loads and stores. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
e52e031ce3 Add implementations for VRSQ, VRSQL, and VRSQH. 2014-12-22 20:47:48 -05:00
Tyler Stachecki
affb4bb746 Add a patch job fix for SSE2 RSP builds. 2014-12-19 22:03:25 -05:00
Tyler Stachecki
33d2e15278 Reduce size of rsp_vload_dmem dynarec code. 
We're going to want to instantiate all possible branch targets
ahead of time to avoid SMC penalties, so we want each target to
fit into the smallest block of code possible.
 2014-11-10 22:51:33 -05:00
Tyler Stachecki
fc22ab18ba Fix some corner-case bugs in the last commit. 2014-11-10 19:04:23 -05:00
Tyler Stachecki
b4b95d1f21 Fix SS2 RSP vector loads/stores implementation. 2014-11-10 18:32:12 -05:00
Tyler Stachecki
316214d82d (Finally) permit SSE2-only builds. 
Add SSE2 codepaths where necessary (even if not complete), while
still allowing the project to be compiled with SSSE3+ intrinsics.
 2014-11-10 14:29:13 -05:00
Tyler Stachecki
6a6f4174ca Fix edge cases for some LWC2 operations. 2014-10-25 16:46:18 -04:00
Tyler Stachecki
e698bfe1d1 Improving accuracy of RSP LWC2/SWC2 operations. 2014-10-25 02:06:30 -04:00
Tyler Stachecki
c027d75198 Fix a typo leading to an unnecessarily large array. 2014-10-24 23:44:36 -04:00
Tyler Stachecki
ba2ca6f427 Fix more byte-ordering issues. This was hard. 2014-10-24 23:43:24 -04:00
Tyler Stachecki
1292220694 Fix a byte-ordering issue in the x86_64 RSP backend. 2014-10-24 21:27:18 -04:00
Tyler Stachecki
e63b13605e Various LWC2/SWC2 fixes, add VSAR. 2014-10-24 21:07:25 -04:00
Tyler Stachecki
97587e3811 Add guards around SSSE3 version of rsp_vstore_dmem. 2014-10-24 18:34:36 -04:00
Tyler Stachecki
f395be631e Start adding in support for LWC2/SWC2 ops: LQV/SQV. 2014-10-24 18:31:13 -04:00
Tyler Stachecki
e9e82b9b22 Fix a compilation error in the last commit. 2014-10-22 18:17:30 -04:00
Tyler Stachecki
620c1cbec5 Add SSE2 support to arch/x86_64/rsp. 2014-10-21 18:39:26 -04:00
Tyler Stachecki
65d4da87c6 Add SSE2/SSSE3 implementations of RSP bitwise functions. 2014-08-19 16:08:42 +00:00