Tyler Stachecki
c6729b8dcc
Add C2, data sector and MS RAM mappings for 64DD.
2015-01-06 14:29:16 -05:00
Tyler Stachecki
cc3aff976c
Add 64DD mappings and a controller.
2015-01-06 14:07:45 -05:00
Tyler Stachecki
028d8e673d
Decoder optimization: drastically reduce size.
2015-01-06 11:39:36 -05:00
Tyler Stachecki
efc4e38793
Remove an old, unused function.
2015-01-06 02:18:49 -05:00
Tyler Stachecki
e63f8b08e3
Perform some really clever branch folding.
...
Fold all the integer loads and stores into one code path.
2015-01-06 02:18:31 -05:00
Tyler Stachecki
ec3748f0c2
Trim off a few hundred bytes of code.
2015-01-05 22:59:52 -05:00
Tyler Stachecki
9aba20b423
Change the device subsystem cycle order.
...
We can eek out a little more performance by preferentially
cycles devices in a certain order.
2015-01-05 22:12:56 -05:00
Tyler Stachecki
c7a4a43242
Same as the last commit, but with the RSP.
2015-01-05 22:12:44 -05:00
Tyler Stachecki
57b026450c
Mark LDI (interlocks) as unlikely.
...
MIPS compilers of the time optimized this out very aggressively as
they waste cycles and there's generally other instructions you can
toss in the load delay slot, so flag the interlock as unlikely.
2015-01-05 22:12:34 -05:00
Tyler Stachecki
bc77b5f608
Prevent a if statement over ternary expressions.
2015-01-05 22:12:23 -05:00
Tyler Stachecki
d39737a039
Make interrupt exception checks more efficient.
2015-01-05 22:12:13 -05:00
Tyler Stachecki
999ff27b9e
Fix a last-minute bug in TLB exceptions.
2015-01-05 22:12:04 -05:00
Tyler Stachecki
134eb07fef
Add support for TLB modification exceptions.
2015-01-05 22:11:50 -05:00
Tyler Stachecki
ffebe24c59
Implement cache operations, fix cache op bug.
...
If we're doing a cache operation in the DC stage, don't
change the stage of the lines; the cache operations will
do it if needed. Also implement get/set taglo for DC.
2015-01-04 23:00:42 -05:00
Tyler Stachecki
7ee6eab842
Respect the TLB entry conherency bits.
...
If the TLB entry 'C bits' indicate the cache isn't to be
used for that virtual address range... don't use the cache.
2015-01-04 21:37:13 -05:00
Tyler Stachecki
16daf94430
Move cache functionality to the DC stage.
...
This is how the actual processor does it. In addition to
design correctness, we have the added benefit of being able
to support cache instructions whose virtual address lies
in a mapped part of the address space.
2015-01-04 21:11:22 -05:00
Tyler Stachecki
a648cedc87
More cleanup of the fault/TLB code.
2015-01-04 15:38:56 -05:00
Tyler Stachecki
1c1124bfd3
Temporarily patch the "render half frame" bug.
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Not sure why copy_size should = 4 for a 16-bit frame, so
look into that. But for now, it won't cause any buffer
overruns, so enable it with a warning.
2015-01-04 12:18:10 -05:00
Tyler Stachecki
aa175bf6d6
Fix the JALR RSP bug, similar to last commit.
2015-01-04 12:18:03 -05:00
Tyler Stachecki
9fb9f24724
Fix bugs, implement WatchLo/Hi support.
2015-01-04 12:17:57 -05:00
Tyler Stachecki
db0bf1a594
Squash IC->RF latch data on a fault.
2015-01-03 13:13:20 -05:00
Tyler Stachecki
ac6dfe16da
Cleanup the VR4300 exception logic somewhat.
2015-01-03 12:39:40 -05:00
Tyler Stachecki
c795c4ad2d
Remove old function definitions.
2015-01-03 00:49:52 -05:00
Tyler Stachecki
2697ba9445
Merge more functions together.
2015-01-02 23:51:53 -05:00
Tyler Stachecki
d8f60c4afa
Merge a handful of the vector compares.
2015-01-02 23:51:40 -05:00
Tyler Stachecki
1c8f871df8
Start merging RSP vector functions.
...
No need to separate all these functions when they contain so
much common code, so start combining things for the sake of
locality and predictor effectiveness (and size). In addition
to these benefits, the CPU backend is usually busy during the
execution of these functions, so suffering a misprediction
isn't as painful (especially seeing as we can potentially
improve the prediction from the indirect branch).
2015-01-02 22:21:32 -05:00
Tyler Stachecki
d50450e624
Disable register caching for now.
...
Until we can work around system libraries stomping over the
registers we want to reserve, just disable register caching for
the time being.
2015-01-02 21:05:07 -05:00
Tyler Stachecki
c1f1998c78
Add an implementation for VMACU.
2015-01-02 21:04:44 -05:00
Tyler Stachecki
b55940f139
Fix VMACF accumulation issues and lighting problems.
2015-01-02 21:04:33 -05:00
Tyler Stachecki
9ad566c658
Hacky fix to patch register caching.
...
On Windows, acc_lo (%xmm5) was clashing with the x64 calling
convention, which states %xmm5 is a volatile register and is
the caller's responsibility to save. We need the register
preserved across calls, so until we have a better solution to
the problem, pick registers that are not volatile according to
the calling convention.
2015-01-02 15:39:21 -05:00
Tyler Stachecki
33fd6a394d
Fix a CFC2/VCE error that produced the wrong mask.
2015-01-01 23:15:45 -05:00
Tyler Stachecki
fbd0a646f6
Fix potential undefined behaviour issues.
2015-01-01 23:15:35 -05:00
Tyler Stachecki
742ffc1493
Fix a series of RSP bugs that krom pointed out.
2015-01-01 21:13:41 -05:00
Tyler Stachecki
fca1cbe022
Add support for building on OS X.
2015-01-01 21:13:35 -05:00
Tyler Stachecki
91cfe79cd1
Add a missing line to CMakeLists.txt.
2015-01-01 21:13:29 -05:00
Tyler Stachecki
4e34f9a910
Restore most TLB functionality from backport.
2015-01-01 15:53:52 -05:00
Tyler Stachecki
fd74a5eb55
Update README and prepare for GitHub push.
2015-01-01 15:01:46 -05:00
Tyler Stachecki
f74ff068c4
Don't boot when if the CIC type is not known.
2015-01-01 15:01:37 -05:00
Tyler Stachecki
40ff6bd9ac
Automatically seed the PIF RAM based on CIC type.
2015-01-01 15:01:33 -05:00
Tyler Stachecki
0524573137
os/windows: Only show the console when asked.
2015-01-01 15:01:27 -05:00
Tyler Stachecki
5bf50af698
Clean up some rough edges in the last commit.
2015-01-01 15:01:22 -05:00
Tyler Stachecki
267d56491e
Get the Windows build in running condition.
...
Conflicts:
rdp/n64video.c
2015-01-01 15:00:53 -05:00
Tyler Stachecki
64b9ce8f5f
os/unix: Shuffle things around to align with WINAPI.
2015-01-01 11:33:55 -05:00
Tyler Stachecki
1a7611b6dc
Commit some MSVC-specific workarounds.
2015-01-01 10:47:25 -05:00
Tyler Stachecki
eba6ce1420
Fix VLT clipping bugs.
...
Thank you, AIO, for pointing this out.
2015-01-01 10:47:07 -05:00
Tyler Stachecki
d9d4ebcb8b
os/unix: Don't race during window initialization.
2015-01-01 10:47:00 -05:00
Tyler Stachecki
62eacc11a4
Cleanup the recently-committed VCH.
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We should refer to %xmm5 as acc_lo.
2015-01-01 10:46:53 -05:00
Tyler Stachecki
b52962aa19
Fix RSP bug that arises on BREAK.
2015-01-01 10:46:48 -05:00
Tyler Stachecki
e100147379
Add register-caching version of VCH.
...
Thanks go out to AIO for rounding out this commit with
his optimized SSE2 variant.
2015-01-01 10:46:41 -05:00
Tyler Stachecki
70efd3de4a
Fix a typo that broke some builds.
2015-01-01 10:46:34 -05:00
