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156 commits

Author SHA1 Message Date
Tyler Stachecki
267d56491e Get the Windows build in running condition. 
Conflicts:
	rdp/n64video.c
 2015-01-01 15:00:53 -05:00
Tyler Stachecki
b52962aa19 Fix RSP bug that arises on BREAK. 2015-01-01 10:46:48 -05:00
Tyler Stachecki
e100147379 Add register-caching version of VCH. 
Thanks go out to AIO for rounding out this commit with
his optimized SSE2 variant.
 2015-01-01 10:46:41 -05:00
Tyler Stachecki
5e313634d3 Enable register-caching on MinGW. 
Use a prelude to get around Microsoft's stupid calling convention.
 2015-01-01 10:46:10 -05:00
Tyler Stachecki
b6f0d0ec58 Set initial values for VCC/VCO/VCE. 
Thanks, krom!
 2015-01-01 10:45:45 -05:00
Tyler Stachecki
94ad149a12 Actually enable the register caching... 
And fix a lot of bugs introduced with a regex.
 2015-01-01 10:44:47 -05:00
Tyler Stachecki
7bc95ee3ee Implement register-caching version of VLT. 2015-01-01 10:44:40 -05:00
Tyler Stachecki
9b941eced8 Change RSP calling convention. 
pblendvb needs the mask in %xmm0, so change the calling convention
around just enough so we can cut out a movdqa from most instructions.
 2015-01-01 10:44:34 -05:00
Tyler Stachecki
4aabd7f49e Minor tweaks to VEQ/VNE register-cached versions. 2015-01-01 10:44:16 -05:00
Tyler Stachecki
e810689fde Implement register-caching versions of VGE. 2015-01-01 10:44:09 -05:00
Tyler Stachecki
340da34715 Implement register-caching versions of VEQ/VNE. 2015-01-01 10:44:02 -05:00
Tyler Stachecki
c83fe8d424 Prepare to register-cache RSP flags. 2015-01-01 10:43:54 -05:00
Tyler Stachecki
2cc1759259 Register-caching variations of bitwise functions. 2015-01-01 10:43:49 -05:00
Tyler Stachecki
586cf84113 Implement register-caching versions of VABS. 2015-01-01 10:43:44 -05:00
Tyler Stachecki
c1f4ddd911 Fix MFC2/MTC2 odd-element byte indexing. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
574c85ad37 Add some missing flag clears to VCL. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
8f17a516bc Fix a stray memory copy. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
3a969b2379 Do some general cleanup/optimization. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
b740c9a5b3 Optimize RSP CP2 register transfers. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
fea458e70c Add (partial) implementations for LPV/LUV/SPV/SUV. 
Also, cleanup other SSSE3+ accelerated loads and stores.
 2014-12-26 14:19:45 -05:00
Tyler Stachecki
03f04c1b82 Add implementation for MTC2. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
9f9e3ebf80 Sort out a pair of RSP bugs. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
b33f2800ae Add implementation for MFC2. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
824131db6b Use a union for RSP vectors to force alignment. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
dc008abe77 Fix more show-stopping RSP bugs. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
173815ed63 Another bug: make sure memory requests get filled. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
1e059e3f71 Fix a potentially disasterous RSP bug. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
645f4b06ea Minor cleanup to the RSP pipeline. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
6faca60054 Start reworking RSP vector loads and stores. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
f1929a056c Commit AIO's VMACF implementation. 2014-12-24 15:18:59 -05:00
Tyler Stachecki
ab8dde80e9 Add AIO's implementation for VMULU. 2014-12-23 01:10:15 -05:00
Tyler Stachecki
2ee295a671 Fix RSP DMEM accesses. 
Up until now, the simulator assumed that DMEM accesses had to be
aligned (similarly to the VR4300). This is not actually the case,
so allow scalar memory access to arbitrary DMEM addresses.
 2014-12-22 23:53:13 -05:00
Tyler Stachecki
3f2329be5b Fix a bug in VRCP/VRSQ precision selection. 2014-12-22 21:06:17 -05:00
Tyler Stachecki
e52e031ce3 Add implementations for VRSQ, VRSQL, and VRSQH. 2014-12-22 20:47:48 -05:00
Tyler Stachecki
4b6904240e Add implementations for VRCP, VRCPL, and VRCPH. 2014-12-22 20:29:16 -05:00
Tyler Stachecki
73709f4c45 Add implementation for VCR. 2014-12-22 13:01:03 -05:00
Tyler Stachecki
88310a8104 Add AIO's implementation for VMULF. 2014-12-22 09:50:29 -05:00
Tyler Stachecki
f268795da5 Add implementation for VMRG. 2014-12-21 15:49:44 -05:00
Tyler Stachecki
9f4664a4b6 Add implementation for VADDC. 2014-12-21 15:29:16 -05:00
Tyler Stachecki
a955bf1e2c Add implementation for VSUBC. 2014-12-21 15:07:00 -05:00
Tyler Stachecki
f199c7bac8 Add implementation for VABS. 2014-12-21 12:59:36 -05:00
Tyler Stachecki
de5b5b0f96 Commit AIO's VSUB optimizations, fix carry/borrow issue. 2014-12-21 12:55:38 -05:00
Tyler Stachecki
0be40f4358 Add implementations for VGE and VLT. 2014-12-21 11:08:00 -05:00
Tyler Stachecki
dc50279609 Add implementations for VEQ and VNE. 2014-12-21 10:39:10 -05:00
Tyler Stachecki
e1de6cd92d Add implementations for VCH. 2014-12-21 09:29:58 -05:00
Tyler Stachecki
145141225e Add implementations for VCL and CFC2. 2014-12-20 12:27:38 -05:00
Tyler Stachecki
c72f2c5028 Fix RSP alignment issues once and for all. 2014-12-19 20:03:03 -05:00
Tyler Stachecki
8b45d7eab5 Fix padding around SSE register types. 
Really need to stop doing patchjobs and just fix this.
 2014-11-16 14:27:43 -05:00
Tyler Stachecki
c1dc7cba08 Refactor for another major performance boost. 
Since the CEN64 core now runs in it's own thread (and doesn't use
the FPU), we can steal the host's FPU state register and not have
to worry about preserving it.

Along with that major overhaul, don't force "extra" features like
simulation statistics and debugging if the user doesn't want them.
Including that code, even when it is not run, mucks with register
allocation or something ever so slightly.
 2014-11-15 18:22:20 -05:00
Tyler Stachecki
0a9b8c2367 Make read_acc_* return a value. 
Instead of writing through a pointer, just return the value.
Thank you, Jared, for pointing out my stupidity.
 2014-11-13 19:54:33 -05:00