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788 commits 6 branches 1 tag 5.4 MiB
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15 commits

Author SHA1 Message Date
Tyler Stachecki
91b18f2644 rsp: Implement CTC2. 2016-06-29 21:38:25 -04:00
Derek "Turtle" Roe
8b89df2fdc See long description 
Replaced all references to simulation with emulation
Updated copyright year
Updated .gitignore to reduce chances of random files being uploaded to
the repo
Added .gitattributes to normalize all text files, and to ignore binary
files (which includes the logo and the NEC PDF)
 2015-07-01 18:44:21 -05:00
Tyler Stachecki
ca0b0c944d Vectorize/inline/optimize CFC2. 2015-01-27 10:28:36 -05:00
Tyler Stachecki
742ffc1493 Fix a series of RSP bugs that krom pointed out. 2015-01-01 21:13:41 -05:00
Tyler Stachecki
b6f0d0ec58 Set initial values for VCC/VCO/VCE. 
Thanks, krom!
 2015-01-01 10:45:45 -05:00
Tyler Stachecki
c83fe8d424 Prepare to register-cache RSP flags. 2015-01-01 10:43:54 -05:00
Tyler Stachecki
c1f4ddd911 Fix MFC2/MTC2 odd-element byte indexing. 2014-12-26 14:19:46 -05:00
Tyler Stachecki
b740c9a5b3 Optimize RSP CP2 register transfers. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
03f04c1b82 Add implementation for MTC2. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
9f9e3ebf80 Sort out a pair of RSP bugs. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
b33f2800ae Add implementation for MFC2. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
824131db6b Use a union for RSP vectors to force alignment. 2014-12-26 14:19:45 -05:00
Tyler Stachecki
3f2329be5b Fix a bug in VRCP/VRSQ precision selection. 2014-12-22 21:06:17 -05:00
Tyler Stachecki
4b6904240e Add implementations for VRCP, VRCPL, and VRCPH. 2014-12-22 20:29:16 -05:00
Tyler Stachecki
145141225e Add implementations for VCL and CFC2. 2014-12-20 12:27:38 -05:00