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vr4300: Fix a bug in (D) Index Load Tag.

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The VALID and DIRTY bits were not being shifted into the
proper positions after reading them from the line states.
This commit is contained in:
Tyler J. Stachecki 2016-07-09 12:39:45 -04:00
parent 9886ec2587
commit a12c5a3e04
2 changed files with 2 additions and 2 deletions
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2
vr4300/dcache.c
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@ -98,7 +98,7 @@ uint32_t vr4300_dcache_get_taglo(struct vr4300_dcache *dcache, uint64_t vaddr) {
struct vr4300_dcache_line *line = get_line(dcache, vaddr);
uint32_t taglo = ((line->metadata & 0x1) << 1) | ((line->metadata & 0x2) >> 1);
return taglo | (line->metadata >> 4 & 0x0FFFFF00U);
return (taglo << 6) | (line->metadata >> 4 & 0x0FFFFF00U);
}
// Initializes the instruction cache.

2
vr4300/functions.c
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@ -440,7 +440,7 @@ cen64_cold static int vr4300_cacheop_ic_invalidate_hit(
cen64_cold static int vr4300_cacheop_dc_get_taglo(
struct vr4300 *vr4300, uint64_t vaddr, uint32_t paddr) {
vr4300->regs[VR4300_CP0_REGISTER_TAGLO] =
vr4300->regs[VR4300_CP0_REGISTER_TAGLO] = (int32_t)
vr4300_dcache_get_taglo(&vr4300->dcache, vaddr);
return 0;