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https://github.com/n64dev/cen64.git
synced 2024-06-21 13:32:40 -04:00
Start fixing MSVC builds.
Conflicts: rdp/n64video.c
This commit is contained in:
parent
8415caf9ad
commit
3288229a50
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@ -360,7 +360,11 @@ set(VR4300_SOURCES
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if (DEFINED WIN32)
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include_directories(${PROJECT_SOURCE_DIR}/os/winapi)
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set(EXTRA_OS_EXE WIN32)
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set(EXTRA_OS_LIBS mingw32 opengl32 winmm ws2_32)
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if (NOT MSVC)
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set(EXTRA_OS_LIBS mingw32 opengl32 winmm ws2_32)
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else ()
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set(EXTRA_OS_LIBS opengl32 winmm ws2_32)
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endif ()
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list(APPEND OS_SOURCES
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${OS_COMMON_SOURCES}
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@ -406,6 +410,7 @@ endif (NOT MSVC)
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add_executable(cen64
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${EXTRA_OS_EXE}
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${ASM_SOURCES}
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${AI_SOURCES}
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${ARCH_X86_64_SOURCES}
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${BUS_SOURCES}
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@ -390,7 +390,7 @@ int write_dd_ipl_rom(void *opaque, uint32_t address, uint32_t word, uint32_t dqm
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}
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// Reads a word from the DD C2S/DS buffer.
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int read_dd_controller(void *opaque __attribute__ ((unused)), uint32_t address, uint32_t *word) {
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int read_dd_controller(void *unused(opaque), uint32_t address, uint32_t *word) {
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// XXX: Hack to reduce memorymap entries.
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if (address >= DD_MS_RAM_ADDRESS)
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return read_dd_ms_ram(opaque, address, word);
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@ -404,7 +404,7 @@ int read_dd_controller(void *opaque __attribute__ ((unused)), uint32_t address,
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}
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// Writes a word to the DD C2S/DS BUFFER.
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int write_dd_controller(void *opaque __attribute__ ((unused)), uint32_t address, uint32_t word, uint32_t dqm) {
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int write_dd_controller(void *unused(opaque), uint32_t address, uint32_t word, uint32_t dqm) {
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// XXX: Hack to reduce memorymap entries.
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if (address >= DD_MS_RAM_ADDRESS)
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return write_dd_ms_ram(opaque, address, word, dqm);
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@ -418,13 +418,13 @@ int write_dd_controller(void *opaque __attribute__ ((unused)), uint32_t address,
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}
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// Reads a word from the DD MS RAM.
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int read_dd_ms_ram(void *opaque __attribute__ ((unused)), uint32_t address, uint32_t *word) {
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int read_dd_ms_ram(void *unused(opaque), uint32_t address, uint32_t *word) {
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debug_mmio_read(dd, "DD_MS_RAM", *word);
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return 0;
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}
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// Writes a word to the DD MS RAM.
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int write_dd_ms_ram(void *opaque __attribute__ ((unused)), uint32_t address, uint32_t word, uint32_t dqm) {
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int write_dd_ms_ram(void *unused(opaque), uint32_t address, uint32_t word, uint32_t dqm) {
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debug_mmio_write(dd, "DD_MS_RAM", word, dqm);
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return 0;
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}
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@ -10,7 +10,7 @@
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#include "common.h"
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#ifdef __WIN32__
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#ifdef _WIN32
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#include <winsock2.h>
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#include <windows.h>
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#include <ws2tcpip.h>
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@ -35,10 +35,14 @@
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* implemented by Jun-ichiro itojun Itoh <itojun@itojun.org>
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*/
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#ifdef _WIN32
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#include <windows.h>
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#else
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#include <string.h>
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#include <sys/types.h>
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#include <sys/cdefs.h>
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#include <sys/time.h>
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#endif
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#include "sha1.h"
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@ -68,7 +68,7 @@ static int pi_dma_read(struct pi_controller *pi) {
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// SRAM
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if (pi->sram->ptr != NULL && addr + length <= 0x8000)
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memcpy(pi->sram->ptr + addr, pi->bus->ri->ram + source, length);
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memcpy((uint8_t *) (pi->sram->ptr) + addr, pi->bus->ri->ram + source, length);
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// FlashRAM: Save the RDRAM destination address. Writing happens
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// after the system sends the flash write command (handled in
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@ -109,7 +109,7 @@ static int pi_dma_write(struct pi_controller *pi) {
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uint32_t addr = source & 0x00FFFFF;
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if (pi->sram->ptr != NULL && addr + length <= 0x8000)
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memcpy(pi->bus->ri->ram + dest, pi->sram->ptr + addr, length);
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memcpy(pi->bus->ri->ram + dest, (const uint8_t *) (pi->sram->ptr) + addr, length);
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else if (pi->flashram.data != NULL) {
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// SRAM
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@ -220,7 +220,7 @@ typedef struct
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int32_t invalyscan[4];
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} SPAN;
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static SPAN span[1024];
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cen64_align(static SPAN span[1024], 16);
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uint8_t cvgbuf[1024];
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@ -6983,7 +6983,6 @@ static void rdp_tex_rect(uint32_t w1, uint32_t w2)
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edgewalker_for_prims(ewdata);
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}
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static void rdp_tex_rect_flip(uint32_t w1, uint32_t w2)
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15
rsp/cp0.c
15
rsp/cp0.c
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@ -57,8 +57,13 @@ uint32_t rsp_read_cp0_reg(struct rsp *rsp, unsigned src) {
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return *((volatile uint32_t *) &rsp->regs[RSP_CP0_REGISTER_SP_STATUS]);
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case RSP_CP0_REGISTER_SP_RESERVED:
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#ifdef _WIN32
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return _InterlockedCompareExchange((volatile long *)
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(&rsp->regs[RSP_CP0_REGISTER_SP_RESERVED]), 1, 0) == 0;
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#else
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return !__sync_bool_compare_and_swap(
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&rsp->regs[RSP_CP0_REGISTER_SP_RESERVED], 0, 1);
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#endif
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case RSP_CP0_REGISTER_DMA_FULL:
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case RSP_CP0_REGISTER_DMA_BUSY:
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@ -158,9 +163,15 @@ void rsp_status_write(struct rsp *rsp, uint32_t rt) {
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status &= ~SP_STATUS_SIG7;
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else if (rt & SP_SET_SIG7)
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status |= SP_STATUS_SIG7;
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#ifdef _WIN32
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} while (!(_InterlockedCompareExchange((volatile long *)
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(&rsp->regs[RSP_CP0_REGISTER_SP_STATUS]),
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status, prev_status) == prev_status));
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#else
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} while (!__sync_bool_compare_and_swap(
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&rsp->regs[RSP_CP0_REGISTER_SP_STATUS],
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prev_status, status));
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#endif
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}
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// Writes a value to the control processor.
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@ -193,7 +204,11 @@ void rsp_write_cp0_reg(struct rsp *rsp, unsigned dest, uint32_t rt) {
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case RSP_CP0_REGISTER_SP_RESERVED:
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if (rt == 0) {
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*((volatile uint32_t *) &rsp->regs[RSP_CP0_REGISTER_SP_RESERVED]) = 0;
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#ifdef _MSC_VER
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_ReadWriteBarrier();
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#else
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__asm__ __volatile__("" ::: "memory");
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#endif
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}
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break;
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11
si/pak.c
11
si/pak.c
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@ -8,6 +8,9 @@
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// 'LICENSE', which is part of this source code package.
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//
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#ifdef _WIN32
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#include <wchar.h>
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#endif
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#include "pak.h"
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#include "pak_transfer.h"
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uint8_t *recv_buf, uint8_t recv_bytes) {
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uint16_t address = send_buf[1] << 8 | send_buf[2];
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address &= ~0b11111; // lower 5 bits are address CRC
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address &= ~0x1F; // lower 5 bits are address CRC
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// printf("read from %04x\n", address);
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if (controller->pak == PAK_MEM) {
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if (address <= MEMPAK_SIZE - 0x20)
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memcpy(recv_buf, controller->mempak_save.ptr + address, 0x20);
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memcpy(recv_buf, (uint8_t *) (controller->mempak_save.ptr) + address, 0x20);
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else
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assert(0 && "invalid mempak address");
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}
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@ -48,7 +51,7 @@ int controller_pak_write(struct controller *controller,
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uint8_t *recv_buf, uint8_t recv_bytes) {
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uint16_t address = send_buf[1] << 8 | send_buf[2];
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address &= ~0b11111; // lower 5 bits are a checksum
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address &= ~0x1F; // lower 5 bits are a checksum
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// printf("write to %04x\n", address);
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if (address == 0x8000) {
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else if (controller->pak == PAK_MEM) {
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if (address <= MEMPAK_SIZE - 0x20)
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memcpy(controller->mempak_save.ptr + address, send_buf + 3, 0x20);
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memcpy((uint8_t *) (controller->mempak_save.ptr) + address, send_buf + 3, 0x20);
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else
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assert(0 && "Attempt to write past end of mempak");
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}
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@ -21,7 +21,7 @@ void transfer_pak_read(struct controller *controller,
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uint8_t *recv_buf, uint8_t recv_bytes) {
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uint16_t address = send_buf[1] << 8 | send_buf[2];
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address &= ~0b11111; // lower 5 bits are address CRC
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address &= ~0x1F; // lower 5 bits are address CRC
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// printf("read from %04x\n", address);
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// get enable/disable state
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// cart inserted, return mode and mode changed
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if (controller->tpak_rom.ptr != NULL) {
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memset(recv_buf, controller->tpak_mode == 1 ? 0x89 : 0x80, 0x20);
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recv_buf[0] |= controller->tpak_mode_changed ? 0b100 : 0;
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recv_buf[0] |= controller->tpak_mode_changed ? 0x4 : 0;
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}
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// cart not inserted
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uint8_t *recv_buf, uint8_t recv_bytes) {
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uint16_t address = send_buf[1] << 8 | send_buf[2];
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address &= ~0b11111; // lower 5 bits are address CRC
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address &= ~0x1F; // lower 5 bits are address CRC
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// printf("write to %04x\n", address);
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// set bank
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