mirror of
https://github.com/n64dev/cen64.git
synced 2024-06-22 22:12:45 -04:00
Start filling in lots of 64DD implementation.
Also, fix a few bugs in the past two commits.
This commit is contained in:
Tyler Stachecki
parent
c6729b8dcc
commit
10fc81d7a3
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@ -16,15 +16,19 @@
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#define AI_REGS_ADDRESS_LEN 0x00000018
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// DD C2 sector buffer.
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#define DD_C2S_BUFFER_ADDRESS 0x50000000
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#define DD_C2S_BUFFER_ADDRESS 0x05000000
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#define DD_C2S_BUFFER_LEN 0x00000400
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// DD data sector buffer.
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#define DD_DS_BUFFER_ADDRESS 0x50000400
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#define DD_DS_BUFFER_ADDRESS 0x05000400
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#define DD_DS_BUFFER_LEN 0x00000100
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// DD IPL ROM.
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#define DD_IPL_ROM_ADDRESS 0x06000000
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#define DD_IPL_ROM_LEN 0x00400000
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// DD microsequencer RAM.
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#define DD_MS_RAM_ADDRESS 0x50000580
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#define DD_MS_RAM_ADDRESS 0x05000580
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#define DD_MS_RAM_LEN 0x00000040
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// DD interface registers.
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@ -25,7 +25,7 @@
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#include "vr4300/cpu.h"
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#include "vr4300/interface.h"
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#define NUM_MAPPINGS 18
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#define NUM_MAPPINGS 19
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struct bus_controller_mapping {
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memory_rd_function read;
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@ -53,6 +53,7 @@ int bus_init(struct bus_controller *bus) {
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{read_dd_c2s_buffer, write_dd_c2s_buffer, DD_C2S_BUFFER_ADDRESS, DD_C2S_BUFFER_LEN},
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{read_dd_ds_buffer, write_dd_ds_buffer, DD_DS_BUFFER_ADDRESS, DD_DS_BUFFER_LEN},
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{read_dd_ms_ram, write_dd_ms_ram, DD_MS_RAM_ADDRESS, DD_MS_RAM_LEN},
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{read_dd_ipl_rom, write_dd_ipl_rom, DD_IPL_ROM_ADDRESS, DD_IPL_ROM_LEN},
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{read_pif_ram, write_pif_ram, PIF_RAM_BASE_ADDRESS, PIF_RAM_ADDRESS_LEN},
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{read_pif_rom, write_pif_rom, PIF_ROM_BASE_ADDRESS, PIF_ROM_ADDRESS_LEN},
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{read_rdram_regs, write_rdram_regs, RDRAM_REGS_BASE_ADDRESS, RDRAM_REGS_ADDRESS_LEN},
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@ -75,6 +76,7 @@ int bus_init(struct bus_controller *bus) {
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bus->dd,
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bus->dd,
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bus->dd,
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bus->dd,
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bus->si,
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bus->si,
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bus->ri,
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@ -42,7 +42,7 @@ struct memory_map_node {
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};
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struct memory_map {
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struct memory_map_node mappings[20];
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struct memory_map_node mappings[21];
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struct memory_map_node *nil;
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struct memory_map_node *root;
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30
cen64.c
30
cen64.c
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@ -15,13 +15,14 @@
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#include "os/rom_file.h"
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#include <stdlib.h>
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static int load_roms(const char *pifrom_path, const char *cart_path,
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static int load_roms(const char *ddipl_path, const char *pifrom_path,
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const char *cart_path, struct rom_file *ddipl,
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struct rom_file *pifrom, struct rom_file *cart);
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// Called when another simulation instance is desired.
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int cen64_cmdline_main(int argc, const char *argv[]) {
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struct cen64_options options = default_cen64_options;
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struct rom_file pifrom, cart;
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struct rom_file ddipl, pifrom, cart;
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int status;
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if (argc < 3) {
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@ -36,10 +37,14 @@ int cen64_cmdline_main(int argc, const char *argv[]) {
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return EXIT_FAILURE;
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}
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if (load_roms(options.pifrom_path, options.cart_path, &pifrom, &cart))
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if (load_roms(options.ddipl_path, options.pifrom_path,
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options.cart_path, &ddipl, &pifrom, &cart))
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return EXIT_FAILURE;
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status = os_main(&options, &pifrom, &cart);
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status = os_main(&options, &ddipl, &pifrom, &cart);
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if (options.ddipl_path)
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close_rom_file(&ddipl);
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close_rom_file(&cart);
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close_rom_file(&pifrom);
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@ -47,17 +52,32 @@ int cen64_cmdline_main(int argc, const char *argv[]) {
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}
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// Load any ROM images required for simulation.
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int load_roms(const char *pifrom_path, const char *cart_path,
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int load_roms(const char *ddipl_path, const char *pifrom_path,
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const char *cart_path, struct rom_file *ddipl,
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struct rom_file *pifrom, struct rom_file *cart) {
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memset(ddipl, 0, sizeof(*ddipl));
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if (ddipl_path && open_rom_file(ddipl_path, ddipl)) {
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printf("Failed to load DD IPL ROM: %s.\n", ddipl_path);
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return 1;
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}
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if (open_rom_file(pifrom_path, pifrom)) {
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printf("Failed to load PIF ROM: %s.\n", pifrom_path);
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if (ddipl_path)
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close_rom_file(ddipl);
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return 1;
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}
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if (open_rom_file(cart_path, cart)) {
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printf("Failed to load cart: %s.\n", cart_path);
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if (ddipl_path)
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close_rom_file(ddipl);
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close_rom_file(pifrom);
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return 2;
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}
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@ -22,8 +22,10 @@ const char *dd_register_mnemonics[NUM_DD_REGISTERS] = {
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#endif
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// Initializes the DD.
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int dd_init(struct dd_controller *dd, struct bus_controller *bus) {
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int dd_init(struct dd_controller *dd, struct bus_controller *bus,
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const uint8_t *rom) {
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dd->bus = bus;
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dd->rom = rom;
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return 0;
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}
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@ -53,6 +55,29 @@ int write_dd_regs(void *opaque, uint32_t address, uint32_t word, uint32_t dqm) {
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return 0;
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}
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// Reads a word from the DD IPL ROM.
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int read_dd_ipl_rom(void *opaque, uint32_t address, uint32_t *word) {
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uint32_t offset = address - DD_IPL_ROM_ADDRESS;
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struct dd_controller *dd = (struct dd_controller*) opaque;
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if (!dd->rom)
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memset(word, 0, sizeof(word));
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else {
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memcpy(word, dd->rom + offset, sizeof(*word));
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*word = byteswap_32(*word);
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}
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//debug_mmio_read(dd, "DD_IPL_ROM", *word);
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return 0;
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}
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// Writes a word to the DD IPL ROM.
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int write_dd_ipl_rom(void *opaque, uint32_t address, uint32_t word, uint32_t dqm) {
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assert(0 && "Attempt to write to DD IPL ROM.");
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return 0;
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}
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// Reads a word from the DD C2S buffer.
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int read_dd_c2s_buffer(void *opaque, uint32_t address, uint32_t *word) {
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struct dd_controller *dd = (struct dd_controller *) opaque;
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@ -89,7 +114,7 @@ int write_dd_ds_buffer(void *opaque, uint32_t address, uint32_t word, uint32_t d
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return 0;
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}
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// Reads a word from the DD DS buffer.
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// Reads a word from the DD MS RAM.
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int read_dd_ms_ram(void *opaque, uint32_t address, uint32_t *word) {
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struct dd_controller *dd = (struct dd_controller *) opaque;
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unsigned offset = address - DD_MS_RAM_ADDRESS;
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@ -98,7 +123,7 @@ int read_dd_ms_ram(void *opaque, uint32_t address, uint32_t *word) {
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return 0;
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}
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// Writes a word to the DD DS BUFFER.
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// Writes a word to the DD MS RAM.
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int write_dd_ms_ram(void *opaque, uint32_t address, uint32_t word, uint32_t dqm) {
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struct dd_controller *dd = (struct dd_controller *) opaque;
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unsigned offset = address - DD_MS_RAM_ADDRESS;
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@ -11,6 +11,7 @@
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#ifndef __dd_controller_h__
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#define __dd_controller_h__
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#include "common.h"
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#include "bus/address.h"
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struct bus_controller *bus;
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@ -27,6 +28,7 @@ extern const char *dd_register_mnemonics[NUM_DD_REGISTERS];
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struct dd_controller {
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struct bus_controller *bus;
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const uint8_t *rom;
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uint32_t regs[NUM_DD_REGISTERS];
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uint8_t c2s_buffer[DD_C2S_BUFFER_LEN];
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@ -34,11 +36,15 @@ struct dd_controller {
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uint8_t ms_ram[DD_MS_RAM_LEN];
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};
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cen64_cold int dd_init(struct dd_controller *dd, struct bus_controller *bus);
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cen64_cold int dd_init(struct dd_controller *dd, struct bus_controller *bus,
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const uint8_t *ddipl);
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int read_dd_regs(void *opaque, uint32_t address, uint32_t *word);
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int write_dd_regs(void *opaque, uint32_t address, uint32_t word, uint32_t dqm);
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int read_dd_ipl_rom(void *opaque, uint32_t address, uint32_t *word);
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int write_dd_ipl_rom(void *opaque, uint32_t address, uint32_t word, uint32_t dqm);
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int read_dd_c2s_buffer(void *opaque, uint32_t address, uint32_t *word);
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int write_dd_c2s_buffer(void *opaque, uint32_t address, uint32_t word, uint32_t dqm);
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int read_dd_ds_buffer(void *opaque, uint32_t address, uint32_t *word);
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@ -9,7 +9,7 @@
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//
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#ifndef DD_REGISTER_LIST
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#define DD_REGISTER_LIST
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#define DD_REGISTER_LIST \
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X(DD_ASIC_DATA) \
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X(DD_ASIC_MISC_REG) \
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X(DD_ASIC_CMD) \
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@ -19,6 +19,7 @@
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#include "bus/controller.h"
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#include "ai/controller.h"
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#include "dd/controller.h"
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#include "pi/controller.h"
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#include "ri/controller.h"
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#include "si/controller.h"
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@ -36,10 +37,12 @@ cen64_hot static int device_spin(struct cen64_device *device);
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// Creates and initializes a device.
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struct cen64_device *device_create(struct cen64_device *device,
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uint8_t *ram, const struct rom_file *pifrom, const struct rom_file *cart) {
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uint8_t *ram, const struct rom_file *ddipl, const struct rom_file *pifrom,
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const struct rom_file *cart) {
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// Initialize the bus.
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device->bus.ai = &device->ai;
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device->bus.dd = &device->dd;
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device->bus.pi = &device->pi;
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device->bus.ri = &device->ri;
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device->bus.si = &device->si;
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@ -61,6 +64,12 @@ struct cen64_device *device_create(struct cen64_device *device,
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return NULL;
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}
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// Initialize the DD.
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if (dd_init(&device->dd, &device->bus, ddipl->ptr)) {
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debug("create_device: Failed to initialize the AI.\n");
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return NULL;
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}
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// Initialize the PI.
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if (pi_init(&device->pi, &device->bus, cart->ptr, cart->size)) {
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debug("create_device: Failed to initialize the PI.\n");
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@ -74,7 +83,8 @@ struct cen64_device *device_create(struct cen64_device *device,
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}
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// Initialize the SI.
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if (si_init(&device->si, &device->bus, pifrom->ptr, cart->ptr)) {
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if (si_init(&device->si, &device->bus, pifrom->ptr,
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cart->ptr, ddipl->ptr != NULL)) {
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debug("create_device: Failed to initialize the SI.\n");
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return NULL;
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}
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@ -16,6 +16,7 @@
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#include "ai/controller.h"
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#include "bus/controller.h"
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#include "dd/controller.h"
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#include "pi/controller.h"
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#include "ri/controller.h"
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#include "si/controller.h"
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@ -34,6 +35,7 @@ struct cen64_device {
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struct vr4300 vr4300;
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struct ai_controller ai;
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struct dd_controller dd;
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struct pi_controller pi;
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struct ri_controller ri;
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struct si_controller si;
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@ -45,7 +47,8 @@ struct cen64_device {
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cen64_cold void device_destroy(struct cen64_device *device);
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cen64_cold struct cen64_device *device_create(struct cen64_device *device,
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uint8_t *ram, const struct rom_file *pifrom, const struct rom_file *cart);
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uint8_t *ram, const struct rom_file *ddipl, const struct rom_file *pifrom,
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const struct rom_file *cart);
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cen64_cold void device_exit(struct bus_controller *bus);
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cen64_cold void device_run(struct cen64_device *device);
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@ -12,6 +12,7 @@
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#include "options.h"
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const struct cen64_options default_cen64_options = {
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NULL, // ddipl_path
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NULL, // pifrom_path
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NULL, // cart_path
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#ifdef _WIN32
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@ -33,8 +34,16 @@ int parse_options(struct cen64_options *options, int argc, const char *argv[]) {
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else
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#endif
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if (!strcmp(argv[i], "-ddipl")) {
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if ((i + 1) >= (argc - 2)) {
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printf("-ddipl requires a path to the ROM file.\n\n");
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return 1;
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}
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if (!strcmp(argv[i], "-nointerface"))
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options->ddipl_path = argv[++i];
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}
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else if (!strcmp(argv[i], "-nointerface"))
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options->no_interface = true;
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#ifdef CEN64_DEVFEATURES
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@ -53,12 +62,13 @@ int parse_options(struct cen64_options *options, int argc, const char *argv[]) {
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// Prints the command-line usage string.
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void print_command_line_usage(const char *invokation_string) {
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printf("%s [Options] <PIFROM Path> <ROM Path>\n\n"
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printf("%s [Options] <PIF IPL ROM Path> <ROM Path>\n\n"
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"Options:\n"
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#ifdef _WIN32
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" -console : Creates/shows the system console.\n"
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#endif
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" -ddipl <path> : Path to the 64DD IPL ROM (enables 64DD mode).\n"
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" -nointerface : Run simulator without a user interface.\n"
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#ifdef CEN64_DEVFEATURES
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" -printsimstats : Print simulation statistics at exit.\n"
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@ -13,6 +13,7 @@
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#include "common.h"
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struct cen64_options {
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const char *ddipl_path;
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const char *pifrom_path;
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const char *cart_path;
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@ -14,7 +14,7 @@
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#include "rom_file.h"
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cen64_cold int os_main(struct cen64_options *options,
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struct rom_file *pifrom, struct rom_file *cart);
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struct rom_file *ddipl, struct rom_file *pifrom, struct rom_file *cart);
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cen64_cold bool os_exit_requested(struct gl_window *gl_window);
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cen64_cold void os_render_frame(struct gl_window *gl_window, const void *data,
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@ -101,7 +101,7 @@ bool os_exit_requested(struct gl_window *gl_window) {
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}
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// Allocates memory for a new device, runs it.
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int os_main(struct cen64_options *options,
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int os_main(struct cen64_options *options, struct rom_file *ddipl,
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struct rom_file *pifrom, struct rom_file *cart) {
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struct gl_window_hints hints;
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struct glx_window window;
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@ -121,7 +121,7 @@ int os_main(struct cen64_options *options,
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// about uninitialized memory being read, etc.
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memset(&device, 0, sizeof(device));
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if (device_create(&device, ram, pifrom, cart) == NULL) {
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if (device_create(&device, ram, ddipl, pifrom, cart) == NULL) {
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printf("Failed to create a device.\n");
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deallocate_ram(&hunk);
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@ -19,7 +19,8 @@
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#include <windows.h>
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static int cen64_win32_main(int argc, const char *argv[]);
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static int load_roms(const char *pifrom_path, const char *cart_path,
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static int load_roms(const char *ddipl_path, const char *pifrom_path,
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const char *cart_path, struct rom_file *ddipl,
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struct rom_file *pifrom, struct rom_file *cart);
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static void hide_console(void);
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|
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@ -67,7 +68,7 @@ int WINAPI WinMain(HINSTANCE hInstance,
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// Called when another simulation instance is desired.
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int cen64_win32_main(int argc, const char *argv[]) {
|
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struct cen64_options options = default_cen64_options;
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struct rom_file pifrom, cart;
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struct rom_file ddipl, pifrom, cart;
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int status;
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if (argc < 3) {
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|
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@ -88,10 +89,14 @@ int cen64_win32_main(int argc, const char *argv[]) {
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return EXIT_FAILURE;
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}
|
||||
|
||||
if (load_roms(options.pifrom_path, options.cart_path, &pifrom, &cart))
|
||||
if (load_roms(options.ddipl_path, options.pifrom_path,
|
||||
options.cart_path, &ddipl, &pifrom, &cart))
|
||||
return EXIT_FAILURE;
|
||||
|
||||
status = os_main(&options, &pifrom, &cart);
|
||||
status = os_main(&options, &ddipl, &pifrom, &cart);
|
||||
|
||||
if (options.ddipl_path)
|
||||
close_rom_file(&ddipl);
|
||||
|
||||
close_rom_file(&cart);
|
||||
close_rom_file(&pifrom);
|
||||
|
|
@ -107,21 +112,37 @@ void hide_console(void) {
|
|||
}
|
||||
|
||||
// Load any ROM images required for simulation.
|
||||
int load_roms(const char *pifrom_path, const char *cart_path,
|
||||
int load_roms(const char *ddipl_path, const char *pifrom_path,
|
||||
const char *cart_path, struct rom_file *ddipl,
|
||||
struct rom_file *pifrom, struct rom_file *cart) {
|
||||
memset(ddipl, 0, sizeof(*ddipl));
|
||||
|
||||
if (ddipl_path && open_rom_file(ddipl_path, ddipl)) {
|
||||
MessageBox(NULL, "Failed to load DD IPL ROM.", "CEN64",
|
||||
MB_OK | MB_ICONEXCLAMATION);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (open_rom_file(pifrom_path, pifrom)) {
|
||||
MessageBox(NULL, "Failed to load PIF ROM.", "CEN64",
|
||||
MB_OK | MB_ICONEXCLAMATION);
|
||||
|
||||
return 1;
|
||||
if (ddipl_path)
|
||||
close_rom_file(ddipl);
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
if (open_rom_file(cart_path, cart)) {
|
||||
MessageBox(NULL, "Failed to load cart.", "CEN64",
|
||||
MB_OK | MB_ICONEXCLAMATION);
|
||||
|
||||
if (ddipl_path)
|
||||
close_rom_file(ddipl);
|
||||
|
||||
close_rom_file(pifrom);
|
||||
return 2;
|
||||
return 3;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -144,7 +165,7 @@ void os_release_input(struct gl_window *gl_window) {
|
|||
}
|
||||
|
||||
// Allocates memory for a new device, runs it.
|
||||
int os_main(struct cen64_options *options,
|
||||
int os_main(struct cen64_options *options, struct rom_file *ddipl,
|
||||
struct rom_file *pifrom, struct rom_file *cart) {
|
||||
struct gl_window_hints hints;
|
||||
struct winapi_window window;
|
||||
|
|
@ -160,7 +181,8 @@ int os_main(struct cen64_options *options,
|
|||
// about uninitialized memory being read, etc.
|
||||
memset(&device, 0, sizeof(device));
|
||||
|
||||
if (device_create(&device, malloc(DEVICE_RAMSIZE), pifrom, cart) == NULL) {
|
||||
if (device_create(&device, malloc(DEVICE_RAMSIZE),
|
||||
ddipl, pifrom, cart) == NULL) {
|
||||
printf("Failed to create a device.\n");
|
||||
|
||||
//deallocate_ram(&hunk);
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@
|
|||
#include "common.h"
|
||||
#include "bus/address.h"
|
||||
#include "bus/controller.h"
|
||||
#include "dd/controller.h"
|
||||
#include "pi/controller.h"
|
||||
#include "ri/controller.h"
|
||||
#include "vr4300/interface.h"
|
||||
|
|
@ -70,7 +71,14 @@ static int pi_dma_write(struct pi_controller *pi) {
|
|||
if (length & 7)
|
||||
length = (length + 7) & ~7;
|
||||
|
||||
if (source & 0x08000000) {
|
||||
if (pi->bus->dd->rom && source & 0x03000000) {
|
||||
source &= 0x003FFFFF;
|
||||
|
||||
memcpy(pi->bus->ri->ram + dest, pi->bus->dd->rom + source, length);
|
||||
}
|
||||
|
||||
else if (source & 0x08000000) {
|
||||
|
||||
}
|
||||
|
||||
else if (!(source & 0x06000000)) {
|
||||
|
|
@ -79,7 +87,7 @@ static int pi_dma_write(struct pi_controller *pi) {
|
|||
//assert(0);
|
||||
}
|
||||
|
||||
memcpy(pi->bus->ri->ram + dest, pi->rom + source, length);
|
||||
memcpy(pi->bus->ri->ram + dest, pi->rom + source, length);
|
||||
}
|
||||
|
||||
pi->regs[PI_DRAM_ADDR_REG] += length;
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ static int pif_perform_command(struct si_controller *si, unsigned channel,
|
|||
|
||||
// Initializes the SI.
|
||||
int si_init(struct si_controller *si, struct bus_controller *bus,
|
||||
const uint8_t *pif_rom, const uint8_t *cart_rom) {
|
||||
const uint8_t *pif_rom, const uint8_t *cart_rom, bool dd_present) {
|
||||
uint32_t cic_seed;
|
||||
|
||||
si->bus = bus;
|
||||
|
|
@ -49,6 +49,14 @@ int si_init(struct si_controller *si, struct bus_controller *bus,
|
|||
si->ram[0x26] = cic_seed >> 8;
|
||||
si->ram[0x27] = cic_seed >> 0;
|
||||
|
||||
// 64DD present? Use that.
|
||||
if (dd_present) {
|
||||
si->ram[0x24] = 0x00;
|
||||
si->ram[0x25] = 0x0A;
|
||||
si->ram[0x26] = 0xDD;
|
||||
si->ram[0x27] = 0x3F;
|
||||
}
|
||||
|
||||
// Specify 8MiB RDRAM for 6102/6105 carts.
|
||||
if (si->ram[0x26] == 0x3F && si->ram[0x27] == 0x3F)
|
||||
bus_write_word(si->bus, 0x318, 0x800000, ~0U);
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@ struct si_controller {
|
|||
};
|
||||
|
||||
cen64_cold int si_init(struct si_controller *si, struct bus_controller *bus,
|
||||
const uint8_t *pif_rom, const uint8_t *cart_rom);
|
||||
const uint8_t *pif_rom, const uint8_t *cart_rom, bool dd_present);
|
||||
|
||||
int read_pif_ram(void *opaque, uint32_t address, uint32_t *word);
|
||||
int read_pif_rom(void *opaque, uint32_t address, uint32_t *word);
|
||||
|
|
|
|||
Loading…
Reference in a new issue