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DMTC0 status writes should update the segmented memory. (#135)
This matches the MTC0 code.
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@ -83,6 +83,8 @@ int VR4300_DMFC0(struct vr4300 *vr4300,
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//
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int VR4300_DMTC0(struct vr4300 *vr4300,
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uint32_t iw, uint64_t rs, uint64_t rt) {
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struct vr4300_icrf_latch *icrf_latch = &vr4300->pipeline.icrf_latch;
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struct vr4300_exdc_latch *exdc_latch = &vr4300->pipeline.exdc_latch;
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unsigned dest = GET_RD(iw);
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switch (dest + VR4300_REGISTER_CP0_0)
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@ -94,6 +96,10 @@ int VR4300_DMTC0(struct vr4300 *vr4300,
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case VR4300_CP0_REGISTER_COMPARE:
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vr4300->regs[VR4300_CP0_REGISTER_CAUSE] &= ~0x8000;
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break;
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case VR4300_CP0_REGISTER_STATUS:
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icrf_latch->segment = get_segment(icrf_latch->common.pc, rt);
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exdc_latch->segment = get_default_segment();
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break;
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}
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if (vr4300_cp0_reg_masks[dest] == 0x0000000000000BADULL)
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