32 commits

Author	SHA1	Message	Date
Yannik Marchand	f03950c875	A few gpu status register things	2019-05-02 20:35:40 +02:00
Yannik Marchand	4cf3b7981c	Work on DRMDMA ring buffer stuff	2019-05-02 19:11:17 +02:00
Yannik Marchand	bbc504ab93	Reorder comparisons in Latte controller based on occurrence	2018-01-19 14:34:04 +01:00
Yannik Marchand	2177b7c29c	Move part of scheduler to C++	2018-01-19 14:07:12 +01:00
Yannik Marchand	3eb1bef68d	Handle DSP messages and emulate PI interrupts more accurately	2018-01-18 13:48:04 +01:00
Yannik Marchand	2dff986a2c	Create DSPController class	2018-01-17 21:23:57 +01:00
Yannik Marchand	6e4dd50dc3	Create AIController class	2018-01-17 17:15:31 +01:00
Yannik Marchand	25d88da719	Put dc.rpl registers into a separate class	2018-01-17 16:35:56 +01:00
Yannik Marchand	e9d162f84f	Implement PM4 MEM_WRITE	2018-01-17 12:59:19 +01:00
Yannik Marchand	987803d36a	Return 1 on 0xC20609C read (dc.rpl)	2018-01-17 12:52:32 +01:00
Yannik Marchand	2665c4f8f2	Stub PM4 processor	2018-01-16 21:49:43 +01:00
Yannik Marchand	0c17ee11e9	Lower vsync delay	2018-01-16 21:33:13 +01:00
Yannik Marchand	5339716495	Found online information on GPU registers	2018-01-15 11:39:42 +01:00
Yannik Marchand	773c485774	Stub PAD registers	2018-01-15 10:45:39 +01:00
Yannik Marchand	e6ce1fb2c1	Trigger interrupt on vsync	2018-01-14 20:31:34 +01:00
Yannik Marchand	f0e3750159	Return 0x10000 on TCL register 0xC206070 read	2018-01-14 10:14:34 +01:00
Yannik Marchand	e4e8d1eed9	Fix hang in dc.rpl by returning a value in TCL register 0xC2064A0	2018-01-13 23:05:08 +01:00
Yannik Marchand	223231bea0	Return valid AV interrupt info through I2C	2018-01-13 22:22:56 +01:00
Yannik Marchand	6d308d8757	Trigger AV interrupt in I2c controller	2018-01-13 21:24:33 +01:00
Yannik Marchand	e623a544d0	Add code for GPIO interrupt generation logic	2018-01-13 19:56:06 +01:00
Yannik Marchand	840b4739ff	Remove unused I2CControllerPPC class	2018-01-11 10:47:03 +01:00
Yannik Marchand	02b12f2d31	Rewrite I2C controller	2018-01-08 18:25:55 +01:00
Yannik Marchand	5f19469f77	Implement a few more TCL registers (drmdma)	2018-01-07 19:26:50 +01:00
Yannik Marchand	ad42f9a9ad	Add debug command to print loaded RPLs	2018-01-07 18:29:31 +01:00
Yannik Marchand	1a7dab30a8	Rewrite debugger	2018-01-07 17:47:19 +01:00
Yannik Marchand	c730478c9a	Implement a few more TCL registers	2018-01-06 17:27:37 +01:00
Yannik Marchand	cc8bcc55f4	Stub TCL CP reset register	2018-01-06 12:33:11 +01:00
Yannik Marchand	cd4f1d8b74	Add TCL hardware class	2018-01-02 20:34:24 +01:00
Yannik Marchand	5618027165	Fix return value of unknown MEM read	2018-01-02 09:58:20 +01:00
Yannik Marchand	a9ba3f51ab	Add AESS/SHAS hardware	2017-12-30 22:17:51 +01:00
Yannik Marchand	dd7b8e7c28	Fix NAND writing	2017-12-30 14:14:49 +01:00
Yannik Marchand	2051d35c55	Let's start using git	2017-12-28 17:36:34 +01:00