mirror of
https://github.com/StrikerX3/StrikeBox.git
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3ef26120ee
Restructure CMake projects
109 lines
2.6 KiB
C++
109 lines
2.6 KiB
C++
#pragma once
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#include <cstdint>
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#include "vixen/io.h"
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#include "vixen/util/fifo.h"
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#include "vixen/util/invoke_later.h"
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#include "char.h"
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#include "../basic/irq.h"
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#include <chrono>
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namespace vixen {
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#define UART_FIFO_LENGTH 16
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#define PORT_SERIAL_BASE_1 0x3F8
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#define PORT_SERIAL_BASE_2 0x2F8
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#define PORT_SERIAL_COUNT 7
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class Serial : public IODevice {
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public:
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Serial(IRQHandler& irqHandler, uint32_t ioBase);
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virtual ~Serial();
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bool Init(CharDriver *chr);
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void Reset();
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void Stop();
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inline void SetIRQ(uint8_t irq) { m_irq = irq; }
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inline void SetBaudBase(int baudBase) { m_baudbase = baudBase; }
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bool MapIO(IOMapper *mapper);
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bool IORead(uint32_t port, uint32_t *value, uint8_t size);
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bool IOWrite(uint32_t port, uint32_t value, uint8_t size);
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bool m_active;
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private:
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int CanReceive();
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void Receive(const uint8_t *buf, int size);
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void ReceiveBreak();
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void Event(int event);
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void RecvFifoPut(uint8_t chr);
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void Transmit();
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void FifoTimeoutInterrupt();
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void UpdateIRQ();
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void UpdateMSL();
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void UpdateParameters();
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static int CanReceiveCB(void *userData);
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static void ReceiveCB(void *userData, const uint8_t *buf, int size);
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static void EventCB(void *userData, int event);
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static void UpdateMSLCB(void *userData);
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static void FifoTimeoutInterruptCB(void *userData);
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IRQHandler& m_irqHandler;
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uint32_t m_ioBase;
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uint16_t m_divider = 0;
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uint8_t m_rbr = 0; // receive register
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uint8_t m_thr = 0; // transmit holding register
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uint8_t m_tsr = 0; // transmit shift register
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uint8_t m_ier = 0;
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uint8_t m_iir = 0; // read only
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uint8_t m_lcr = 0;
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uint8_t m_mcr = 0;
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uint8_t m_lsr = 0; // read only
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uint8_t m_msr = 0; // read only
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uint8_t m_scr = 0;
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uint8_t m_fcr = 0;
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// NOTE: this hidden state is necessary for tx irq generation as it can be reset while reading iir
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int m_thr_ipending = 0;
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CharDriver *m_chr;
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bool m_lastBreakEnable = false;
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int m_itShift = 0;
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int m_baudbase = 0;
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int m_tsrRetry = 0;
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uint8_t m_irq = 0;
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// Time when the last byte was successfully sent out of the tsr
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uint64_t m_lastXmitTs = 0;
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Fifo<uint8_t> *m_recvFifo;
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Fifo<uint8_t> *m_xmitFifo;
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// Interrupt trigger level for recv_fifo
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uint8_t m_recvFifoITL;
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InvokeLater *m_fifoTimeoutTimer;
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int m_timeoutIpending = 0; // timeout interrupt pending state
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uint64_t m_charTransmitTime = 0; // time to transmit a char in ticks
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int m_pollMsl = 0;
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InvokeLater *m_modemStatusPoll;
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int lastDir = -1;
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};
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}
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