Emulation/StrikeBox
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  • e4a3a9961b Implemented Super I/O, serial devices and a null char driver StrikerX3 2018-03-11 17:51:22 -0300
  • 550a870680 Flesh out SuperIO and make devices map themselves StrikerX3 2018-03-11 14:04:56 -0300
  • bc09528869 Stubbed SuperIO and CMOS devices StrikerX3 2018-03-11 13:32:13 -0300
  • 131b7f9c80 Refactored I/O and MMIO mapping StrikerX3 2018-03-11 13:04:09 -0300
  • f6d6dfbbfb Basic NV2A implementation StrikerX3 2018-03-11 00:09:21 -0300
  • 271b9ebe34 More PCI work StrikerX3 2018-03-10 20:56:41 -0300
  • 7a59a9da68 Applied XQEMU modifications to i8259 StrikerX3 2018-03-10 17:07:38 -0300
  • 04e00a62a6 Implemented i8259 PIC StrikerX3 2018-03-10 17:05:10 -0300
  • 6074baf827 Moved some port handling to the appropriate device StrikerX3 2018-03-10 15:54:38 -0300
  • 0a60b3ba96 Minor logging fixes StrikerX3 2018-03-10 15:38:46 -0300
  • 531cd7cf11 Fixes to BAR mapping StrikerX3 2018-03-10 15:35:17 -0300
  • 87c1b86e65 Stub all PCI devices StrikerX3 2018-03-10 15:09:49 -0300
  • bc3b3db18e Allow PCI config space access with offset StrikerX3 2018-03-10 14:03:18 -0300
  • 8de91af403 Save APIC_BASE MSR StrikerX3 2018-03-10 14:03:00 -0300
  • 4c8837fc4f Hack around unexpected MMIO instruction on HAXM StrikerX3 2018-03-10 12:11:46 -0300
  • 1ed8ba3f7b Properly mask PCI config space writes StrikerX3 2018-03-10 11:14:55 -0300
  • dbfadc7015 PCI configuration space refactor StrikerX3 2018-03-10 00:19:00 -0300
  • 377ac26d1d Added AGP bridge stub StrikerX3 2018-03-09 22:16:42 -0300
  • 4cfb81fb40 Partially handle different read/write sizes on PCI config space StrikerX3 2018-03-09 22:04:42 -0300
  • 110c4fc0fb More logging StrikerX3 2018-03-09 20:42:06 -0300
  • cdcb1279f9 Refactored PCI BARs StrikerX3 2018-03-09 19:52:30 -0300
  • 99879724eb Added dummy MCPX Memory Controller device StrikerX3 2018-03-09 19:07:10 -0300
  • 276e6e14bb MMIO operations were reversed StrikerX3 2018-03-09 19:03:20 -0300
  • bfc6fef53b Implemented basic i8254 PIT, replacing the system clock StrikerX3 2018-03-09 15:01:08 -0300
  • d060f6ad01 HAXM: inject interrupts before running the CPU StrikerX3 2018-03-09 15:00:24 -0300
  • 56675a3b99 Log non-32-bit writes to PCI config space registers StrikerX3 2018-03-09 14:59:40 -0300
  • 894a1f3234 Allow SMBus reads/writes larger than 8 bits StrikerX3 2018-03-09 14:58:47 -0300
  • 2ad1fa3533 Use SMC challenge codes from XQEMU StrikerX3 2018-03-09 14:58:22 -0300
  • 18d8759c84 Add registers to Conexant TV encoder StrikerX3 2018-03-08 22:47:51 -0300
  • 040487d9de Added dummy Conexant TV encoder device StrikerX3 2018-03-08 22:06:45 -0300
  • b440ba9246 Fix HAXM I/O read StrikerX3 2018-03-08 21:43:38 -0300
  • 79e3790f90 Basic hardware devices implementation StrikerX3 2018-03-07 23:25:53 -0300
  • 7b1a533b20 Update README regarding ROM Ivan Roberto de Oliveira 2018-03-06 14:11:34 -0300
  • 074c6cbc3a Pass MCPX and BIOS ROM files as command line parameters Ivan Roberto de Oliveira 2018-03-06 08:16:48 -0300
  • 31a19d05f3 Clear warning Ivan Roberto de Oliveira 2018-03-06 08:13:02 -0300
  • ebe81c9f39 Preparing some basic stuff StrikerX3 2018-03-05 23:21:57 -0300
  • 7a019ac317 Prepare for full LLE implementation Ivan Roberto de Oliveira 2018-03-05 13:39:27 -0300
  • d60e1cafcb Fix GDB server on Windows StrikerX3 2018-01-23 00:03:42 -0200
  • 8adecb5c2d Windows build support with VS 2017 StrikerX3 2018-01-20 18:56:30 -0200
  • 126fbd13a5 Fix issue with GDB breakpoints Matt Borgerson 2017-12-27 14:08:57 -0700
  • 803f16b752 Update README Matt Borgerson 2017-12-25 21:28:57 -0700
  • 94af31d238 Add GDB server to enable CPU debug Matt Borgerson 2017-12-21 15:43:37 -0700
  • 0737574f21 Add basic system framework Matt Borgerson 2017-12-04 15:24:44 -0700
  • 16013a6529 Initial commit Matt Borgerson 2017-12-04 15:23:54 -0700