mirror of
https://github.com/StrikerX3/StrikeBox.git
synced 2024-06-23 14:53:22 -04:00
Fix Linux build
This commit is contained in:
StrikerX3
parent
d295014d8d
commit
77ce795e21
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@ -45,7 +45,7 @@ namespace openxbox {
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typedef void(*pTimerCB)(void*);
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typedef struct _TimerObject {
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int Type; // timer type (virtual or real)
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std::atomic_uint64_t ExpireTime_MS; // when the timer expires (ms)
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std::atomic<std::uint64_t> ExpireTime_MS; // when the timer expires (ms)
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std::atomic_bool Exit; // indicates that the timer should be destroyed
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pTimerCB Callback; // function to call when the timer expires
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void* Opaque; // opaque argument to pass to the callback
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@ -46,8 +46,9 @@
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#endif
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namespace openxbox {
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#ifdef _MSC_VER
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#pragma warning(pop)
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#endif
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void IoVecReset(IOVector* qiov) {
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assert(qiov->AllocNumber != -1);
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@ -38,6 +38,7 @@
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#pragma once
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#include <cstdint>
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#include <cstdlib>
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namespace openxbox {
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@ -159,7 +159,7 @@ void DumpCPUDisassembly(Cpu* cpu, uint32_t address, uint32_t count, bool physica
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ZydisDecodedInstruction instruction;
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for (int i = 0; i < count; i++) {
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for (uint32_t i = 0; i < count; i++) {
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if (physical) {
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if (cpu->MemRead(address, 16, mem)) {
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log_debug("<invalid address>\n\n");
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@ -21,8 +21,8 @@ namespace ata {
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ATADevice::ATADevice(Channel channel, uint8_t devIndex, ATARegisters& regs)
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: m_channel(channel)
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, m_devIndex(devIndex)
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, m_regs(regs)
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, m_driver(&g_nullATADeviceDriver)
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, m_regs(regs)
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{
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}
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@ -49,7 +49,7 @@ uint32_t ATADevice::ReadBuffer(uint8_t *dest, uint32_t length) {
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lenToRead = GetRemainingBufferLength();
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}
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memcpy_s(dest, length, m_dataBuffer + m_dataBufferPos, lenToRead);
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memcpy(dest, m_dataBuffer + m_dataBufferPos, lenToRead);
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m_dataBufferPos += lenToRead;
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return lenToRead;
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}
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@ -160,10 +160,10 @@ enum CommandProtocol : uint8_t {
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};
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// Map commands to their protocols
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const std::unordered_map<Command, CommandProtocol> kCmdProtocols = {
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const std::unordered_map<Command, CommandProtocol, std::hash<uint8_t>> kCmdProtocols = {
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{ CmdIdentifyDevice, CmdProtoPIODataIn },
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{ CmdSetFeatures, CmdProtoNonData },
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{ CmdSecurityUnlock, CmdProtoPIODataOut },
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{ CmdSecurityUnlock, CmdProtoPIODataOut }
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};
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// --- Command data -------------------------------------------------------------------------------
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@ -181,7 +181,9 @@ const uint8_t kFirmwareRevLength = 8;
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const uint8_t kModelNumberLength = 40;
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// [8.12.8 table 11] Data returned by the Identify Device command
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#ifdef _MSC_VER
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#include <pshpack2.h>
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#endif
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struct IdentifyDeviceData {
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uint16_t generalConfiguration; // word 0
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uint16_t numLogicalCylinders; // word 1
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@ -240,8 +242,12 @@ struct IdentifyDeviceData {
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uint16_t securityStatus; // word 128
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uint16_t _vendor[31]; // word 129-159
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uint16_t _reserved_10[96]; // word 160-255
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#ifdef _MSC_VER
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};
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#include <poppack.h>
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#else
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} __attribute__((aligned(2),packed));
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#endif
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// [8.12.8 table 11 word 0] Bits for the generalConfiguration field in the IdentifyDeviceData struct
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enum IdentifyDeviceGeneralConfiguration : uint16_t {
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@ -18,6 +18,9 @@ namespace openxbox {
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namespace hw {
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namespace ata {
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IATADeviceDriver::~IATADeviceDriver() {
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}
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}
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}
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}
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@ -28,6 +28,7 @@ namespace ata {
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*/
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class IATADeviceDriver {
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public:
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virtual ~IATADeviceDriver();
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virtual bool IsAttached() = 0;
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virtual void IdentifyDevice(IdentifyDeviceData *data) = 0;
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};
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@ -31,6 +31,9 @@ static void padString(uint8_t *dest, const char *src, uint32_t length) {
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}
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}
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DummyHardDriveATADeviceDriver::~DummyHardDriveATADeviceDriver() {
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}
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void DummyHardDriveATADeviceDriver::IdentifyDevice(IdentifyDeviceData *data) {
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// Fill in with reasonable parameters for a 10 GB hard drive
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memset(data, 0, sizeof(IdentifyDeviceData));
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@ -24,6 +24,7 @@ namespace ata {
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*/
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class DummyHardDriveATADeviceDriver : public IATADeviceDriver {
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public:
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~DummyHardDriveATADeviceDriver() override;
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bool IsAttached() override { return true; }
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void IdentifyDevice(IdentifyDeviceData *data) override;
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};
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@ -20,6 +20,9 @@ namespace ata {
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NullATADeviceDriver g_nullATADeviceDriver;
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NullATADeviceDriver::~NullATADeviceDriver() {
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}
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void NullATADeviceDriver::IdentifyDevice(IdentifyDeviceData *data) {
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// Fill in with zeros
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memset(data, 0, sizeof(IdentifyDeviceData));
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@ -24,6 +24,7 @@ namespace ata {
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*/
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class NullATADeviceDriver : public IATADeviceDriver {
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public:
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~NullATADeviceDriver() override;
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bool IsAttached() override { return true; }
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void IdentifyDevice(IdentifyDeviceData *data) override;
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};
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@ -64,237 +64,237 @@ enum FIFOEngine {
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};
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typedef struct VGACommonState {
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uint8_t st00 = 0; // Status Register 0
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uint8_t st01 = 0; // Status Register 1
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uint8_t st00; // Status Register 0
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uint8_t st01; // Status Register 1
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} VGACommonState;
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typedef struct ImageBlitState {
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uint32_t context_surfaces = 0;
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unsigned int operation = 0;
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unsigned int in_x = 0, in_y = 0;
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unsigned int out_x = 0, out_y = 0;
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unsigned int width = 0, height = 0;
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uint32_t context_surfaces;
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unsigned int operation;
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unsigned int in_x, in_y;
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unsigned int out_x, out_y;
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unsigned int width, height;
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} ImageBlitState;
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typedef struct KelvinState {
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uint32_t dma_notifies = 0;
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uint32_t dma_state = 0;
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uint32_t dma_semaphore = 0;
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unsigned int semaphore_offset = 0;
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uint32_t dma_notifies;
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uint32_t dma_state;
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uint32_t dma_semaphore;
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unsigned int semaphore_offset;
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} KelvinState;
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typedef struct ContextSurfaces2DState {
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uint32_t dma_image_source = 0;
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uint32_t dma_image_dest = 0;
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unsigned int color_format = 0;
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unsigned int source_pitch = 0, dest_pitch = 0;
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uint32_t source_offset = 0, dest_offset = 0;
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uint32_t dma_image_source;
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uint32_t dma_image_dest;
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unsigned int color_format;
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unsigned int source_pitch, dest_pitch;
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uint32_t source_offset, dest_offset;
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} ContextSurfaces2DState;
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typedef struct DMAObject {
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unsigned int dma_class = 0;
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unsigned int dma_target = 0;
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uint32_t address = 0;
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uint32_t limit = 0;
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unsigned int dma_class;
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unsigned int dma_target;
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uint32_t address;
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uint32_t limit;
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} DMAObject;
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typedef struct GraphicsObject {
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uint8_t graphics_class = 0;
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uint8_t graphics_class;
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union {
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ContextSurfaces2DState context_surfaces_2d;
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ImageBlitState image_blit;
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KelvinState kelvin;
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} data = { 0 };
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} data;
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} GraphicsObject;
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typedef struct GraphicsSubchannel {
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uint32_t object_instance = 0;
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GraphicsObject object = { 0 };
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uint32_t object_cache[5] = { 0 };
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uint32_t object_instance;
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GraphicsObject object;
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uint32_t object_cache[5];
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} GraphicsSubchannel;
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typedef struct GraphicsContext {
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bool channel_3d = false;
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unsigned int subchannel = 0;
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bool channel_3d;
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unsigned int subchannel;
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} GraphicsContext;
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typedef struct RAMHTEntry {
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uint32_t handle = 0;
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uint32_t instance = 0;
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enum FIFOEngine engine = ENGINE_SOFTWARE;
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uint32_t handle;
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uint32_t instance;
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enum FIFOEngine engine;
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unsigned int channel_id : 5;
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bool valid = false;
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bool valid;
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} RAMHTEntry;
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typedef struct {
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uint32_t offset = 0;
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uint32_t size = 0;
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void (*read)(NV2ADevice* nv2a, uint32_t addr, uint32_t *value, uint8_t size) = nullptr;
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void (*write)(NV2ADevice* nv2a, uint32_t addr, uint32_t value, uint8_t size) = nullptr;
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uint32_t offset;
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uint32_t size;
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void (*read)(NV2ADevice* nv2a, uint32_t addr, uint32_t *value, uint8_t size);
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void (*write)(NV2ADevice* nv2a, uint32_t addr, uint32_t value, uint8_t size);
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} NV2ABlockInfo;
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typedef struct {
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uint32_t regs[NV_PVIDEO_SIZE] = { 0 };
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uint32_t regs[NV_PVIDEO_SIZE];
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} NV2APVIDEO;
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typedef struct {
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uint8_t cr_index = 0;
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uint8_t cr[256] = { 0 }; /* CRT registers */
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uint8_t cr_index;
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uint8_t cr[256]; /* CRT registers */
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} NV2APRMCIO;
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typedef struct {
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uint32_t pendingInterrupts = 0;
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uint32_t enabledInterrupts = 0;
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uint32_t pendingInterrupts;
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uint32_t enabledInterrupts;
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} NV2APMC;
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typedef struct Surface {
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bool draw_dirty = false;
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bool buffer_dirty = false;
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bool write_enabled_cache = false;
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unsigned int pitch = 0;
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bool draw_dirty;
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bool buffer_dirty;
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bool write_enabled_cache;
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unsigned int pitch;
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uint32_t offset = 0;
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uint32_t offset;
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} Surface;
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typedef struct SurfaceShape {
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unsigned int z_format = 0;
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unsigned int color_format = 0;
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unsigned int zeta_format = 0;
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unsigned int log_width = 0, log_height = 0;
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unsigned int clip_x = 0, clip_y = 0;
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unsigned int clip_width = 0, clip_height = 0;
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unsigned int anti_aliasing = 0;
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unsigned int z_format;
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unsigned int color_format;
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unsigned int zeta_format;
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unsigned int log_width, log_height;
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unsigned int clip_x, clip_y;
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unsigned int clip_width, clip_height;
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unsigned int anti_aliasing;
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} SurfaceShape;
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typedef struct TextureShape {
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bool cubemap = false;
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unsigned int dimensionality = 0;
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unsigned int color_format = 0;
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unsigned int levels = 0;
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unsigned int width = 0, height = 0, depth = 0;
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bool cubemap;
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unsigned int dimensionality;
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unsigned int color_format;
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unsigned int levels;
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unsigned int width, height, depth;
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unsigned int min_mipmap_level = 0;
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unsigned int max_mipmap_level = 0;
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unsigned int pitch = 0;
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unsigned int min_mipmap_level;
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unsigned int max_mipmap_level;
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unsigned int pitch;
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} TextureShape;
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typedef struct TextureKey {
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TextureShape state = { 0 };
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uint64_t data_hash = 0;
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uint8_t* texture_data = nullptr;
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uint8_t* palette_data = nullptr;
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TextureShape state;
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uint64_t data_hash;
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uint8_t* texture_data;
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uint8_t* palette_data;
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} TextureKey;
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typedef struct TextureBinding {
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// FIXME: no OpenGL allowed here
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//GLenum gl_target;
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//GLuint gl_texture;
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unsigned int refcnt = 0;
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unsigned int refcnt;
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} TextureBinding;
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typedef struct {
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typedef struct NV2APGRAPH {
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std::mutex mutex;
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uint32_t pending_interrupts = 0;
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uint32_t enabled_interrupts = 0;
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uint32_t pending_interrupts;
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uint32_t enabled_interrupts;
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std::condition_variable interrupt_cond;
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uint32_t context_table = 0;
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uint32_t context_address = 0;
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uint32_t context_table;
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uint32_t context_address;
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unsigned int trapped_method = 0;
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unsigned int trapped_subchannel = 0;
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unsigned int trapped_channel_id = 0;
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uint32_t trapped_data[2] = { 0 };
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uint32_t notify_source = 0;
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unsigned int trapped_method;
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unsigned int trapped_subchannel;
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unsigned int trapped_channel_id;
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uint32_t trapped_data[2];
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uint32_t notify_source;
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bool fifo_access = false;
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bool fifo_access;
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std::condition_variable fifo_access_cond;
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std::condition_variable flip_3d;
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unsigned int channel_id = 0;
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bool channel_valid = false;
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GraphicsContext context[NV2A_NUM_CHANNELS] = { 0 };
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unsigned int channel_id;
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bool channel_valid;
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GraphicsContext context[NV2A_NUM_CHANNELS];
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uint32_t dma_color = 0;
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uint32_t dma_zeta = 0;
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Surface surface_color = { 0 };
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Surface surface_zeta = { 0 };
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unsigned int surface_type = 0;
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SurfaceShape surface_shape = { 0 };
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SurfaceShape last_surface_shape = { 0 };
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uint32_t dma_color;
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uint32_t dma_zeta;
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Surface surface_color;
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Surface surface_zeta;
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unsigned int surface_type;
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SurfaceShape surface_shape;
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SurfaceShape last_surface_shape;
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uint32_t dma_a = 0;
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uint32_t dma_b = 0;
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uint32_t dma_a;
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uint32_t dma_b;
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//GLruCache *texture_cache;
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bool texture_dirty[NV2A_MAX_TEXTURES] = { false };
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TextureBinding *texture_binding[NV2A_MAX_TEXTURES] = { nullptr };
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bool texture_dirty[NV2A_MAX_TEXTURES];
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TextureBinding *texture_binding[NV2A_MAX_TEXTURES];
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//GHashTable *shader_cache;
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//ShaderBinding *shader_binding;
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bool texture_matrix_enable[NV2A_MAX_TEXTURES] = { 0 };
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bool texture_matrix_enable[NV2A_MAX_TEXTURES];
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/* FIXME: Move to NV_PGRAPH_BUMPMAT... */
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float bump_env_matrix[NV2A_MAX_TEXTURES - 1][4] = { 0 }; /* 3 allowed stages with 2x2 matrix each */
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float bump_env_matrix[NV2A_MAX_TEXTURES - 1][4]; /* 3 allowed stages with 2x2 matrix each */
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// FIXME: no OpenGL allowed here
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////wglContext *gl_context;
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//GLuint gl_framebuffer;
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//GLuint gl_color_buffer, gl_zeta_buffer;
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GraphicsSubchannel subchannel_data[NV2A_NUM_SUBCHANNELS] = { 0 };
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GraphicsSubchannel subchannel_data[NV2A_NUM_SUBCHANNELS];
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uint32_t dma_report = 0;
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uint32_t report_offset = 0;
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bool zpass_pixel_count_enable = false;
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unsigned int zpass_pixel_count_result = 0;
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unsigned int gl_zpass_pixel_count_query_count = 0;
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uint32_t dma_report;
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uint32_t report_offset;
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bool zpass_pixel_count_enable;
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unsigned int zpass_pixel_count_result;
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unsigned int gl_zpass_pixel_count_query_count;
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// FIXME: no OpenGL allowed here
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//GLuint* gl_zpass_pixel_count_queries;
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uint32_t dma_vertex_a = 0;
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uint32_t dma_vertex_b = 0;
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uint32_t dma_vertex_a;
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uint32_t dma_vertex_b;
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unsigned int primitive_mode = 0;
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unsigned int primitive_mode;
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bool enable_vertex_program_write = false;
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bool enable_vertex_program_write;
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//uint32_t program_data[NV2A_MAX_TRANSFORM_PROGRAM_LENGTH][VSH_TOKEN_SIZE];
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uint32_t vsh_constants[NV2A_VERTEXSHADER_CONSTANTS][4] = { 0 };
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bool vsh_constants_dirty[NV2A_VERTEXSHADER_CONSTANTS] = { 0 };
|
||||
uint32_t vsh_constants[NV2A_VERTEXSHADER_CONSTANTS][4];
|
||||
bool vsh_constants_dirty[NV2A_VERTEXSHADER_CONSTANTS];
|
||||
|
||||
/* lighting constant arrays */
|
||||
uint32_t ltctxa[NV2A_LTCTXA_COUNT][4] = { 0 };
|
||||
bool ltctxa_dirty[NV2A_LTCTXA_COUNT] = { 0 };
|
||||
uint32_t ltctxb[NV2A_LTCTXB_COUNT][4] = { 0 };
|
||||
bool ltctxb_dirty[NV2A_LTCTXB_COUNT] = { 0 };
|
||||
uint32_t ltc1[NV2A_LTC1_COUNT][4] = { 0 };
|
||||
bool ltc1_dirty[NV2A_LTC1_COUNT] = { 0 };
|
||||
uint32_t ltctxa[NV2A_LTCTXA_COUNT][4];
|
||||
bool ltctxa_dirty[NV2A_LTCTXA_COUNT];
|
||||
uint32_t ltctxb[NV2A_LTCTXB_COUNT][4];
|
||||
bool ltctxb_dirty[NV2A_LTCTXB_COUNT];
|
||||
uint32_t ltc1[NV2A_LTC1_COUNT][4];
|
||||
bool ltc1_dirty[NV2A_LTC1_COUNT];
|
||||
|
||||
// should figure out where these are in lighting context
|
||||
float light_infinite_half_vector[NV2A_MAX_LIGHTS][3] = { 0 };
|
||||
float light_infinite_direction[NV2A_MAX_LIGHTS][3] = { 0 };
|
||||
float light_local_position[NV2A_MAX_LIGHTS][3] = { 0 };
|
||||
float light_local_attenuation[NV2A_MAX_LIGHTS][3] = { 0 };
|
||||
float light_infinite_half_vector[NV2A_MAX_LIGHTS][3];
|
||||
float light_infinite_direction[NV2A_MAX_LIGHTS][3];
|
||||
float light_local_position[NV2A_MAX_LIGHTS][3];
|
||||
float light_local_attenuation[NV2A_MAX_LIGHTS][3];
|
||||
|
||||
//VertexAttribute vertex_attributes[NV2A_VERTEXSHADER_ATTRIBUTES];
|
||||
|
||||
unsigned int inline_array_length = 0;
|
||||
uint32_t inline_array[NV2A_MAX_BATCH_LENGTH] = { 0 };
|
||||
unsigned int inline_array_length;
|
||||
uint32_t inline_array[NV2A_MAX_BATCH_LENGTH];
|
||||
// FIXME: no OpenGL allowed here
|
||||
//GLuint gl_inline_array_buffer;
|
||||
|
||||
unsigned int inline_elements_length = 0;
|
||||
uint32_t inline_elements[NV2A_MAX_BATCH_LENGTH] = { 0 };
|
||||
unsigned int inline_elements_length;
|
||||
uint32_t inline_elements[NV2A_MAX_BATCH_LENGTH];
|
||||
|
||||
unsigned int inline_buffer_length = 0;
|
||||
unsigned int inline_buffer_length;
|
||||
|
||||
unsigned int draw_arrays_length = 0;
|
||||
unsigned int draw_arrays_max_count = 0;
|
||||
unsigned int draw_arrays_length;
|
||||
unsigned int draw_arrays_max_count;
|
||||
|
||||
// FIXME: no OpenGL allowed here
|
||||
/* FIXME: Unknown size, possibly endless, 1000 will do for now */
|
||||
|
|
@ -305,66 +305,66 @@ typedef struct {
|
|||
//GLuint gl_memory_buffer;
|
||||
//GLuint gl_vertex_array;
|
||||
|
||||
uint32_t regs[NV_PGRAPH_SIZE] = { 0 }; // TODO : union
|
||||
uint32_t regs[NV_PGRAPH_SIZE]; // TODO : union
|
||||
} NV2APGRAPH;
|
||||
|
||||
typedef struct {
|
||||
uint32_t pendingInterrupts = 0;
|
||||
uint32_t enabledInterrupts = 0;
|
||||
uint32_t start = 0;
|
||||
uint32_t regs[NV_PCRTC_SIZE] = { 0 }; // TODO : union
|
||||
uint32_t pendingInterrupts;
|
||||
uint32_t enabledInterrupts;
|
||||
uint32_t start;
|
||||
uint32_t regs[NV_PCRTC_SIZE]; // TODO : union
|
||||
} NV2APCRTC;
|
||||
|
||||
typedef struct {
|
||||
uint32_t pending_interrupts = 0;
|
||||
uint32_t enabled_interrupts = 0;
|
||||
uint32_t numerator = 0;
|
||||
uint32_t denominator = 0;
|
||||
uint32_t alarm_time = 0;
|
||||
uint32_t regs[NV_PTIMER_SIZE] = { 0 };
|
||||
uint32_t pending_interrupts;
|
||||
uint32_t enabled_interrupts;
|
||||
uint32_t numerator;
|
||||
uint32_t denominator;
|
||||
uint32_t alarm_time;
|
||||
uint32_t regs[NV_PTIMER_SIZE];
|
||||
} NV2APTIMER;
|
||||
|
||||
typedef struct {
|
||||
uint32_t core_clock_coeff = 0;
|
||||
uint64_t core_clock_freq = 0;
|
||||
uint32_t memory_clock_coeff = 0;
|
||||
uint32_t video_clock_coeff = 0;
|
||||
uint32_t regs[NV_PRAMDAC_SIZE] = { 0 };
|
||||
uint32_t core_clock_coeff;
|
||||
uint64_t core_clock_freq;
|
||||
uint32_t memory_clock_coeff;
|
||||
uint32_t video_clock_coeff;
|
||||
uint32_t regs[NV_PRAMDAC_SIZE];
|
||||
} NV2APRAMDAC;
|
||||
|
||||
typedef struct CacheEntry {
|
||||
unsigned int method : 14;
|
||||
unsigned int subchannel : 3;
|
||||
bool nonincreasing = false;
|
||||
uint32_t parameter = 0;
|
||||
bool nonincreasing;
|
||||
uint32_t parameter;
|
||||
} CacheEntry;
|
||||
|
||||
typedef struct Cache1State {
|
||||
unsigned int channel_id = 0;
|
||||
FifoMode mode = FIFO_PIO;
|
||||
unsigned int channel_id;
|
||||
FifoMode mode;
|
||||
|
||||
/* Pusher state */
|
||||
bool push_enabled = false;
|
||||
bool dma_push_enabled = false;
|
||||
bool dma_push_suspended = false;
|
||||
uint32_t dma_instance = 0;
|
||||
bool push_enabled;
|
||||
bool dma_push_enabled;
|
||||
bool dma_push_suspended;
|
||||
uint32_t dma_instance;
|
||||
|
||||
bool method_nonincreasing = false;
|
||||
bool method_nonincreasing;
|
||||
unsigned int method : 14;
|
||||
unsigned int subchannel : 3;
|
||||
unsigned int method_count : 24;
|
||||
uint32_t dcount = 0;
|
||||
uint32_t dcount;
|
||||
|
||||
bool subroutine_active = false;
|
||||
uint32_t subroutine_return = 0;
|
||||
uint32_t get_jmp_shadow = 0;
|
||||
uint32_t rsvd_shadow = 0;
|
||||
uint32_t data_shadow = 0;
|
||||
uint32_t error = 0;
|
||||
bool subroutine_active;
|
||||
uint32_t subroutine_return;
|
||||
uint32_t get_jmp_shadow;
|
||||
uint32_t rsvd_shadow;
|
||||
uint32_t data_shadow;
|
||||
uint32_t error;
|
||||
|
||||
bool pull_enabled = false;
|
||||
enum FIFOEngine bound_engines[NV2A_NUM_SUBCHANNELS] = { ENGINE_SOFTWARE };
|
||||
enum FIFOEngine last_engine = ENGINE_SOFTWARE;
|
||||
bool pull_enabled;
|
||||
enum FIFOEngine bound_engines[NV2A_NUM_SUBCHANNELS];
|
||||
enum FIFOEngine last_engine;
|
||||
|
||||
/* The actual command queue */
|
||||
std::mutex mutex;
|
||||
|
|
@ -374,25 +374,25 @@ typedef struct Cache1State {
|
|||
} Cache1State;
|
||||
|
||||
typedef struct {
|
||||
uint32_t pending_interrupts = 0;
|
||||
uint32_t enabled_interrupts = 0;
|
||||
Cache1State cache1 = { 0 };
|
||||
uint32_t regs[NV_PFIFO_SIZE] = { 0 };
|
||||
uint32_t pending_interrupts;
|
||||
uint32_t enabled_interrupts;
|
||||
Cache1State cache1;
|
||||
uint32_t regs[NV_PFIFO_SIZE];
|
||||
std::thread puller_thread;
|
||||
} NV2APFIFO;
|
||||
|
||||
typedef struct {
|
||||
uint32_t registers[NV_PFB_SIZE] = { 0 };
|
||||
uint32_t registers[NV_PFB_SIZE];
|
||||
} NV2APFB;
|
||||
|
||||
typedef struct ChannelControl {
|
||||
uint32_t dma_put = 0;
|
||||
uint32_t dma_get = 0;
|
||||
uint32_t ref = 0;
|
||||
uint32_t dma_put;
|
||||
uint32_t dma_get;
|
||||
uint32_t ref;
|
||||
} ChannelControl;
|
||||
|
||||
typedef struct {
|
||||
ChannelControl channel_control[NV2A_NUM_CHANNELS] = { 0 };
|
||||
ChannelControl channel_control[NV2A_NUM_CHANNELS];
|
||||
} NV2AUSER;
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,6 +37,8 @@
|
|||
#include "ohci.h"
|
||||
#include "openxbox/log.h"
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
//#define DEBUG_PACKET
|
||||
//#define DEBUG_ISOCH
|
||||
|
||||
|
|
@ -279,7 +281,7 @@ void OHCI::OHCI_FrameBoundaryWorker()
|
|||
if (m_OldHcControl & (~m_Registers.HcControl) & (OHCI_CTL_BLE | OHCI_CTL_CLE)) {
|
||||
if (m_AsyncTD) {
|
||||
m_UsbDevice->USB_CancelPacket(&m_UsbPacket);
|
||||
m_AsyncTD = NULL;
|
||||
m_AsyncTD = 0;
|
||||
}
|
||||
OHCI_StopEndpoints();
|
||||
}
|
||||
|
|
@ -360,8 +362,8 @@ bool OHCI::OHCI_ReadHCCA(uint32_t Paddr, OHCI_HCCA* Hcca)
|
|||
|
||||
// NOTE: this shared memory contains the HCCA + EDs and TDs
|
||||
|
||||
if (Paddr != NULL) {
|
||||
std::memcpy(Hcca, reinterpret_cast<void*>(Paddr + CONTIGUOUS_MEMORY_BASE), sizeof(OHCI_HCCA));
|
||||
if (Paddr != 0) {
|
||||
memcpy(Hcca, reinterpret_cast<void*>(Paddr + CONTIGUOUS_MEMORY_BASE), sizeof(OHCI_HCCA));
|
||||
return false;
|
||||
}
|
||||
|
||||
|
|
@ -370,11 +372,11 @@ bool OHCI::OHCI_ReadHCCA(uint32_t Paddr, OHCI_HCCA* Hcca)
|
|||
|
||||
bool OHCI::OHCI_WriteHCCA(uint32_t Paddr, OHCI_HCCA* Hcca)
|
||||
{
|
||||
if (Paddr != NULL) {
|
||||
if (Paddr != 0) {
|
||||
// We need to calculate the offset of the HccaFrameNumber member to avoid overwriting HccaInterrruptTable
|
||||
size_t OffsetOfFrameNumber = offsetof(OHCI_HCCA, HccaFrameNumber);
|
||||
|
||||
std::memcpy(reinterpret_cast<void*>(Paddr + OffsetOfFrameNumber + CONTIGUOUS_MEMORY_BASE),
|
||||
memcpy(reinterpret_cast<void*>(Paddr + OffsetOfFrameNumber + CONTIGUOUS_MEMORY_BASE),
|
||||
reinterpret_cast<uint8_t*>(Hcca) + OffsetOfFrameNumber, 8);
|
||||
return false;
|
||||
}
|
||||
|
|
@ -384,7 +386,7 @@ bool OHCI::OHCI_WriteHCCA(uint32_t Paddr, OHCI_HCCA* Hcca)
|
|||
|
||||
bool OHCI::OHCI_ReadED(uint32_t Paddr, OHCI_ED* Ed)
|
||||
{
|
||||
if (Paddr != NULL) {
|
||||
if (Paddr != 0) {
|
||||
m_cpu->VMemRead(Paddr, sizeof(*Ed), Ed);
|
||||
return false;
|
||||
}
|
||||
|
|
@ -393,7 +395,7 @@ bool OHCI::OHCI_ReadED(uint32_t Paddr, OHCI_ED* Ed)
|
|||
|
||||
bool OHCI::OHCI_WriteED(uint32_t Paddr, OHCI_ED* Ed)
|
||||
{
|
||||
if (Paddr != NULL) {
|
||||
if (Paddr != 0) {
|
||||
// According to the standard, only the HeadP field is writable by the HC, so we'll write just that
|
||||
size_t OffsetOfHeadP = offsetof(OHCI_ED, HeadP);
|
||||
m_cpu->VMemWrite(Paddr, 4, Ed + OffsetOfHeadP);
|
||||
|
|
@ -404,7 +406,7 @@ bool OHCI::OHCI_WriteED(uint32_t Paddr, OHCI_ED* Ed)
|
|||
|
||||
bool OHCI::OHCI_ReadTD(uint32_t Paddr, OHCI_TD* Td)
|
||||
{
|
||||
if (Paddr != NULL) {
|
||||
if (Paddr != 0) {
|
||||
m_cpu->VMemRead(Paddr, sizeof(*Td), Td);
|
||||
return false;
|
||||
}
|
||||
|
|
@ -413,7 +415,7 @@ bool OHCI::OHCI_ReadTD(uint32_t Paddr, OHCI_TD* Td)
|
|||
|
||||
bool OHCI::OHCI_WriteTD(uint32_t Paddr, OHCI_TD* Td)
|
||||
{
|
||||
if (Paddr != NULL) {
|
||||
if (Paddr != 0) {
|
||||
m_cpu->VMemWrite(Paddr, sizeof(*Td), Td);
|
||||
return false;
|
||||
}
|
||||
|
|
@ -421,7 +423,7 @@ bool OHCI::OHCI_WriteTD(uint32_t Paddr, OHCI_TD* Td)
|
|||
}
|
||||
|
||||
bool OHCI::OHCI_ReadIsoTD(uint32_t Paddr, OHCI_ISO_TD* td) {
|
||||
if (Paddr != NULL) {
|
||||
if (Paddr != 0) {
|
||||
m_cpu->VMemRead(Paddr, sizeof(*td), td);
|
||||
return false;
|
||||
}
|
||||
|
|
@ -429,7 +431,7 @@ bool OHCI::OHCI_ReadIsoTD(uint32_t Paddr, OHCI_ISO_TD* td) {
|
|||
}
|
||||
|
||||
bool OHCI::OHCI_WriteIsoTD(uint32_t Paddr, OHCI_ISO_TD* td) {
|
||||
if (Paddr != NULL) {
|
||||
if (Paddr != 0) {
|
||||
m_cpu->VMemWrite(Paddr, sizeof(*td), td);
|
||||
return false;
|
||||
}
|
||||
|
|
@ -443,14 +445,14 @@ bool OHCI::OHCI_CopyTD(OHCI_TD* Td, uint8_t* Buffer, int Length, bool bIsWrite)
|
|||
// Figure out if we are crossing a 4K page boundary
|
||||
ptr = Td->CurrentBufferPointer;
|
||||
n = 0x1000 - (ptr & 0xFFF);
|
||||
if (n > Length) {
|
||||
n = Length;
|
||||
if (n > (unsigned int)Length) {
|
||||
n = (unsigned int)Length;
|
||||
}
|
||||
|
||||
if (OHCI_FindAndCopyTD(ptr, Buffer, n, bIsWrite)) {
|
||||
return true; // error
|
||||
}
|
||||
if (n == Length) {
|
||||
if (n == (unsigned int)Length) {
|
||||
return false; // no bytes left to copy
|
||||
}
|
||||
|
||||
|
|
@ -471,14 +473,14 @@ bool OHCI::OHCI_CopyIsoTD(uint32_t start_addr, uint32_t end_addr, uint8_t* Buffe
|
|||
|
||||
ptr = start_addr;
|
||||
n = 0x1000 - (ptr & 0xFFF);
|
||||
if (n > Length) {
|
||||
if (n > (unsigned int)Length) {
|
||||
n = Length;
|
||||
}
|
||||
|
||||
if (OHCI_FindAndCopyTD(ptr, Buffer, n, bIsWrite)) {
|
||||
return true; // error
|
||||
}
|
||||
if (n == Length) {
|
||||
if (n == (unsigned int)Length) {
|
||||
return false; // no bytes left to copy
|
||||
}
|
||||
ptr = end_addr & ~0xfffu;
|
||||
|
|
@ -501,7 +503,7 @@ bool OHCI::OHCI_FindAndCopyTD(uint32_t Paddr, uint8_t* Buffer, int Length, bool
|
|||
|
||||
int offset = 0;
|
||||
|
||||
if (Paddr == NULL) {
|
||||
if (Paddr == 0) {
|
||||
return true; // error
|
||||
}
|
||||
|
||||
|
|
@ -517,10 +519,10 @@ bool OHCI::OHCI_FindAndCopyTD(uint32_t Paddr, uint8_t* Buffer, int Length, bool
|
|||
}*/
|
||||
|
||||
if (bIsWrite) {
|
||||
std::memcpy(reinterpret_cast<void*>(Paddr + offset), Buffer, Length);
|
||||
memcpy(reinterpret_cast<void*>(Paddr + offset), Buffer, Length);
|
||||
}
|
||||
else {
|
||||
std::memcpy(Buffer, reinterpret_cast<void*>(Paddr + offset), Length);
|
||||
memcpy(Buffer, reinterpret_cast<void*>(Paddr + offset), Length);
|
||||
}
|
||||
|
||||
return false;
|
||||
|
|
@ -535,7 +537,7 @@ int OHCI::OHCI_ServiceEDlist(uint32_t Head, int Completion)
|
|||
|
||||
active = 0;
|
||||
|
||||
if (Head == NULL) {
|
||||
if (Head == 0) {
|
||||
// no ED here, nothing to do
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -556,7 +558,7 @@ int OHCI::OHCI_ServiceEDlist(uint32_t Head, int Completion)
|
|||
uint32_t addr = ed.HeadP & OHCI_DPTR_MASK;
|
||||
if (m_AsyncTD && addr == m_AsyncTD) {
|
||||
m_UsbDevice->USB_CancelPacket(&m_UsbPacket);
|
||||
m_AsyncTD = NULL;
|
||||
m_AsyncTD = 0;
|
||||
m_UsbDevice->USB_DeviceEPstopped(m_UsbPacket.Endpoint->Dev, m_UsbPacket.Endpoint);
|
||||
}
|
||||
continue;
|
||||
|
|
@ -782,9 +784,9 @@ int OHCI::OHCI_ServiceTD(OHCI_ED* Ed)
|
|||
}
|
||||
|
||||
// Writeback
|
||||
if (ret == packetlen || (direction == OHCI_TD_DIR_IN && ret >= 0 && flag_r)) {
|
||||
if ((unsigned int)ret == packetlen || (direction == OHCI_TD_DIR_IN && ret >= 0 && flag_r)) {
|
||||
// Transmission succeeded
|
||||
if (ret == length) {
|
||||
if ((unsigned int)ret == length) {
|
||||
td.CurrentBufferPointer = 0;
|
||||
}
|
||||
td.Flags |= OHCI_TD_T1;
|
||||
|
|
@ -792,7 +794,7 @@ int OHCI::OHCI_ServiceTD(OHCI_ED* Ed)
|
|||
OHCI_SET_BM(td.Flags, TD_CC, OHCI_CC_NOERROR);
|
||||
OHCI_SET_BM(td.Flags, TD_EC, 0);
|
||||
|
||||
if ((direction != OHCI_TD_DIR_IN) && (ret != length)) {
|
||||
if ((direction != OHCI_TD_DIR_IN) && ((unsigned int)ret != length)) {
|
||||
// Partial packet transfer: TD not ready to retire yet
|
||||
goto exit_no_retire;
|
||||
}
|
||||
|
|
@ -918,7 +920,7 @@ void OHCI::OHCI_StateReset()
|
|||
}
|
||||
if (m_AsyncTD) {
|
||||
m_UsbDevice->USB_CancelPacket(&m_UsbPacket);
|
||||
m_AsyncTD = NULL;
|
||||
m_AsyncTD = 0;
|
||||
}
|
||||
|
||||
OHCI_StopEndpoints();
|
||||
|
|
@ -1535,7 +1537,7 @@ void OHCI::OHCI_AsyncCancelDevice(XboxDeviceState* dev)
|
|||
m_UsbDevice->USB_IsPacketInflight(&m_UsbPacket) &&
|
||||
m_UsbPacket.Endpoint->Dev == dev) {
|
||||
m_UsbDevice->USB_CancelPacket(&m_UsbPacket);
|
||||
m_AsyncTD = NULL;
|
||||
m_AsyncTD = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1773,7 +1775,7 @@ int OHCI::OHCI_ServiceIsoTD(OHCI_ED* ed, int completion)
|
|||
// represent the size of the transfer.Together, these two fields constitute the Packet Status Word(PacketStatusWord)."
|
||||
|
||||
// Writeback
|
||||
if (dir == OHCI_TD_DIR_IN && ret >= 0 && ret <= len) {
|
||||
if (dir == OHCI_TD_DIR_IN && ret >= 0 && (unsigned int)ret <= len) {
|
||||
// IN transfer succeeded
|
||||
if (OHCI_CopyIsoTD(start_addr, end_addr, m_UsbBuffer, ret, true)) {
|
||||
OHCI_FatalError();
|
||||
|
|
@ -1782,7 +1784,7 @@ int OHCI::OHCI_ServiceIsoTD(OHCI_ED* ed, int completion)
|
|||
OHCI_SET_BM(iso_td.Offset[relative_frame_number], TD_PSW_CC, OHCI_CC_NOERROR);
|
||||
OHCI_SET_BM(iso_td.Offset[relative_frame_number], TD_PSW_SIZE, ret);
|
||||
}
|
||||
else if (dir == OHCI_TD_DIR_OUT && ret == len) {
|
||||
else if (dir == OHCI_TD_DIR_OUT && (unsigned int)ret == len) {
|
||||
// OUT transfer succeeded
|
||||
OHCI_SET_BM(iso_td.Offset[relative_frame_number], TD_PSW_CC, OHCI_CC_NOERROR);
|
||||
OHCI_SET_BM(iso_td.Offset[relative_frame_number], TD_PSW_SIZE, 0);
|
||||
|
|
|
|||
|
|
@ -181,7 +181,7 @@ private:
|
|||
// Done Queue Interrupt Counter
|
||||
int m_DoneCount;
|
||||
// the address of the pending TD
|
||||
uint32_t m_AsyncTD = NULL;
|
||||
uint32_t m_AsyncTD = 0;
|
||||
// indicates if there is a pending asynchronous packet to process
|
||||
bool m_AsyncComplete = 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -404,8 +404,8 @@ struct XboxDeviceState {
|
|||
uint8_t DataBuffer[4096]; // buffer where to write the data requested during usb requests
|
||||
int32_t RemoteWakeup; // wakeup flag
|
||||
int32_t SetupState; // result of a control transfer processing operation
|
||||
int32_t SetupLength; // this field specifies the length of the data transferred during the second phase of the control transfer
|
||||
int32_t SetupIndex; // index of the parameter in a setup token?
|
||||
uint32_t SetupLength; // this field specifies the length of the data transferred during the second phase of the control transfer
|
||||
uint32_t SetupIndex; // index of the parameter in a setup token?
|
||||
|
||||
USBEndpoint EP_ctl; // endpoints for SETUP tokens
|
||||
USBEndpoint EP_in[USB_MAX_ENDPOINTS]; // endpoints for OUT tokens
|
||||
|
|
@ -433,7 +433,7 @@ struct USBPacket {
|
|||
bool ShortNotOK; // the bufferRounding mode of the TD for this packet
|
||||
bool IntReq; // whether or not to generate an interrupt for this packet (DelayInterrupt of the TD is zero)
|
||||
int Status; // USB_RET_* status code
|
||||
int ActualLength; // number of bytes actually written to DataBuffer
|
||||
unsigned int ActualLength; // number of bytes actually written to DataBuffer
|
||||
// Internal use by the USB layer
|
||||
USBPacketState State;
|
||||
QTAILQ_ENTRY(USBPacket) Queue;
|
||||
|
|
|
|||
|
|
@ -440,7 +440,7 @@ void Hub::UsbHub_HandleControl(XboxDeviceState* dev, USBPacket* p, int request,
|
|||
|
||||
case GetHubDescriptor:
|
||||
{
|
||||
std::memcpy(data, HubDescriptor, sizeof(HubDescriptor));
|
||||
memcpy(data, HubDescriptor, sizeof(HubDescriptor));
|
||||
p->ActualLength = sizeof(HubDescriptor);
|
||||
break;
|
||||
}
|
||||
|
|
@ -473,7 +473,7 @@ void Hub::UsbHub_HandleData(XboxDeviceState* dev, USBPacket* p) {
|
|||
if (p->IoVec.Size == 1) { // FreeBSD workaround
|
||||
n = 1;
|
||||
}
|
||||
else if (n > p->IoVec.Size) {
|
||||
else if ((unsigned int)n > p->IoVec.Size) {
|
||||
p->Status = USB_RET_BABBLE;
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -138,7 +138,7 @@ void NV2ADevice::Reset() {
|
|||
m_PRAMDAC.memory_clock_coeff = 0;
|
||||
m_PRAMDAC.video_clock_coeff = 0x0003C20D; /* 25182Khz...? */
|
||||
|
||||
VGACommonState m_VGAState;
|
||||
//VGACommonState m_VGAState;
|
||||
}
|
||||
|
||||
const NV2ABlockInfo* NV2ADevice::FindBlock(uint32_t addr) {
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@
|
|||
|
||||
#include <string>
|
||||
#include <functional>
|
||||
#include <algorithm>
|
||||
|
||||
#include "openxbox/log.h"
|
||||
|
||||
|
|
@ -437,7 +438,7 @@ void USBPCIDevice::DoTokenIn(XboxDeviceState* s, USBPacket* p) {
|
|||
|
||||
case SETUP_STATE_DATA:
|
||||
if (s->SetupBuffer[0] & USB_DIR_IN) {
|
||||
int len = s->SetupLength - s->SetupIndex;
|
||||
unsigned int len = s->SetupLength - s->SetupIndex;
|
||||
if (len > p->IoVec.Size) {
|
||||
len = p->IoVec.Size;
|
||||
}
|
||||
|
|
@ -473,7 +474,7 @@ void USBPCIDevice::DoTokenOut(XboxDeviceState* s, USBPacket* p) {
|
|||
|
||||
case SETUP_STATE_DATA:
|
||||
if (!(s->SetupBuffer[0] & USB_DIR_IN)) {
|
||||
int len = s->SetupLength - s->SetupIndex;
|
||||
unsigned int len = s->SetupLength - s->SetupIndex;
|
||||
if (len > p->IoVec.Size) {
|
||||
len = p->IoVec.Size;
|
||||
}
|
||||
|
|
@ -1016,10 +1017,10 @@ int USBPCIDevice::USBDesc_HandleStandardGetDescriptor(XboxDeviceState* dev, USBP
|
|||
}
|
||||
|
||||
if (ret > 0) {
|
||||
if (ret > len) {
|
||||
if ((unsigned int)ret > len) {
|
||||
ret = len;
|
||||
}
|
||||
std::memcpy(dest, buf, ret);
|
||||
memcpy(dest, buf, ret);
|
||||
p->ActualLength = ret;
|
||||
ret = 0;
|
||||
}
|
||||
|
|
@ -1148,7 +1149,7 @@ size_t USBPCIDevice::USB_ReadOtherDesc(const USBDescOther* desc, uint8_t* dest,
|
|||
return -1;
|
||||
}
|
||||
|
||||
std::memcpy(dest, desc->data, bLength);
|
||||
memcpy(dest, desc->data, bLength);
|
||||
return bLength;
|
||||
}
|
||||
|
||||
|
|
@ -1177,7 +1178,7 @@ int USBPCIDevice::USB_ReadEndpointDesc(const USBDescEndpoint* ep, int flags, uin
|
|||
// Dropped from XQEMU the reading of SuperSpeed Endpoint Companion descriptors since those are usb 3.0 specific
|
||||
|
||||
if (ep->extra) {
|
||||
std::memcpy(dest + bLength, ep->extra, extralen);
|
||||
memcpy(dest + bLength, ep->extra, extralen);
|
||||
}
|
||||
|
||||
return bLength + extralen;
|
||||
|
|
@ -1212,7 +1213,7 @@ int USBPCIDevice::USB_ReadStringDesc(XboxDeviceState* dev, int index, uint8_t* d
|
|||
// From the standard: "The UNICODE string descriptor is not NULL-terminated. The string length is
|
||||
// computed by subtracting two from the value of the first byte of the descriptor"
|
||||
|
||||
bLength = std::strlen(str) * 2 + 2;
|
||||
bLength = strlen(str) * 2 + 2;
|
||||
dest[0] = bLength;
|
||||
dest[1] = USB_DT_STRING;
|
||||
i = 0; pos = 2;
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@
|
|||
// ******************************************************************
|
||||
|
||||
#include "xid_gamepad.h"
|
||||
#include "..\ohci\ohci.h"
|
||||
#include "../ohci/ohci.h"
|
||||
#include "../pci/usb_pci.h"
|
||||
|
||||
#include <string>
|
||||
|
|
@ -227,7 +227,6 @@ XboxDeviceState* XidGamepad::ClassInitFn() {
|
|||
|
||||
int XidGamepad::UsbXidClaimPort(XboxDeviceState* dev, int port) {
|
||||
int i;
|
||||
int port_offset;
|
||||
std::vector<USBPort*>::iterator it;
|
||||
|
||||
assert(dev->Port == nullptr);
|
||||
|
|
@ -282,10 +281,10 @@ int XidGamepad::UsbXid_Initfn(XboxDeviceState* dev) {
|
|||
m_XidState->out_state.length = sizeof(m_XidState->out_state);
|
||||
m_XidState->out_state.report_id = 0;
|
||||
|
||||
std::memset(&m_XidState->in_state_capabilities, 0xFF, sizeof(m_XidState->in_state_capabilities));
|
||||
memset(&m_XidState->in_state_capabilities, 0xFF, sizeof(m_XidState->in_state_capabilities));
|
||||
m_XidState->in_state_capabilities.bLength = sizeof(m_XidState->in_state_capabilities);
|
||||
m_XidState->in_state_capabilities.bReportId = 0;
|
||||
std::memset(&m_XidState->out_state_capabilities, 0xFF, sizeof(m_XidState->out_state_capabilities));
|
||||
memset(&m_XidState->out_state_capabilities, 0xFF, sizeof(m_XidState->out_state_capabilities));
|
||||
m_XidState->out_state_capabilities.length = sizeof(m_XidState->out_state_capabilities);
|
||||
m_XidState->out_state_capabilities.report_id = 0;
|
||||
|
||||
|
|
@ -351,7 +350,7 @@ void XidGamepad::UsbXid_HandleControl(XboxDeviceState* dev, USBPacket* p,
|
|||
// p->Status = USB_RET_STALL;
|
||||
// assert(0);
|
||||
//}
|
||||
std::memcpy(data, &m_XidState->in_state, m_XidState->in_state.bLength);
|
||||
memcpy(data, &m_XidState->in_state, m_XidState->in_state.bLength);
|
||||
p->ActualLength = length;
|
||||
}
|
||||
else {
|
||||
|
|
@ -380,7 +379,7 @@ void XidGamepad::UsbXid_HandleControl(XboxDeviceState* dev, USBPacket* p,
|
|||
if (value == 0x0200) {
|
||||
if (length == m_XidState->out_state.length) {
|
||||
// Read length, then the entire packet
|
||||
std::memcpy(&m_XidState->out_state, data, sizeof(m_XidState->out_state));
|
||||
memcpy(&m_XidState->out_state, data, sizeof(m_XidState->out_state));
|
||||
/* FIXME: This should also be a STALL */
|
||||
assert(m_XidState->out_state.length == sizeof(m_XidState->out_state));
|
||||
p->ActualLength = length;
|
||||
|
|
@ -403,7 +402,7 @@ void XidGamepad::UsbXid_HandleControl(XboxDeviceState* dev, USBPacket* p,
|
|||
log_debug("XID: Gamepad GET_DESCRIPTOR 0x%x", value);
|
||||
if (value == 0x4200) {
|
||||
assert(m_XidState->xid_desc->bLength <= length);
|
||||
std::memcpy(data, m_XidState->xid_desc, m_XidState->xid_desc->bLength);
|
||||
memcpy(data, m_XidState->xid_desc, m_XidState->xid_desc->bLength);
|
||||
p->ActualLength = m_XidState->xid_desc->bLength;
|
||||
}
|
||||
else {
|
||||
|
|
@ -420,14 +419,14 @@ void XidGamepad::UsbXid_HandleControl(XboxDeviceState* dev, USBPacket* p,
|
|||
if (length > m_XidState->in_state_capabilities.bLength) {
|
||||
length = m_XidState->in_state_capabilities.bLength;
|
||||
}
|
||||
std::memcpy(data, &m_XidState->in_state_capabilities, length);
|
||||
memcpy(data, &m_XidState->in_state_capabilities, length);
|
||||
p->ActualLength = length;
|
||||
}
|
||||
else if (value == 0x0200) {
|
||||
if (length > m_XidState->out_state_capabilities.length) {
|
||||
length = m_XidState->out_state_capabilities.length;
|
||||
}
|
||||
std::memcpy(data, &m_XidState->out_state_capabilities, length);
|
||||
memcpy(data, &m_XidState->out_state_capabilities, length);
|
||||
p->ActualLength = length;
|
||||
}
|
||||
else {
|
||||
|
|
@ -441,7 +440,7 @@ void XidGamepad::UsbXid_HandleControl(XboxDeviceState* dev, USBPacket* p,
|
|||
{
|
||||
/* FIXME: ! */
|
||||
log_debug("XID: Gamepad unknown xpad request 0x%X: value = 0x%X", request, value);
|
||||
std::memset(data, 0x00, length);
|
||||
memset(data, 0x00, length);
|
||||
//FIXME: Intended for the hub: usbd_get_hub_descriptor, UT_READ_CLASS?!
|
||||
p->Status = USB_RET_STALL;
|
||||
//assert(false);
|
||||
|
|
@ -452,7 +451,7 @@ void XidGamepad::UsbXid_HandleControl(XboxDeviceState* dev, USBPacket* p,
|
|||
{
|
||||
/* FIXME: ! */
|
||||
log_debug("XID: Gamepad unknown xpad request 0x%X: value = 0x%X", request, value);
|
||||
std::memset(data, 0x00, length);
|
||||
memset(data, 0x00, length);
|
||||
p->Status = USB_RET_STALL;
|
||||
break;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -211,7 +211,7 @@ EmulatorStatus Xbox::InitRAM() {
|
|||
#endif
|
||||
|
||||
#ifdef __linux__
|
||||
m_ram = (char *)mmap(nullptr, m_ramSize, PROT_READ | PROT_WRITE,
|
||||
m_ram = (uint8_t *)mmap(nullptr, m_ramSize, PROT_READ | PROT_WRITE,
|
||||
MAP_PRIVATE | MAP_ANONYMOUS | MAP_NORESERVE, -1, 0);
|
||||
#endif
|
||||
|
||||
|
|
@ -239,7 +239,7 @@ EmulatorStatus Xbox::InitROM() {
|
|||
#endif
|
||||
|
||||
#ifdef __linux__
|
||||
m_rom = (char *)mmap(nullptr, XBOX_ROM_AREA_SIZE, PROT_READ | PROT_WRITE,
|
||||
m_rom = (uint8_t *)mmap(nullptr, XBOX_ROM_AREA_SIZE, PROT_READ | PROT_WRITE,
|
||||
MAP_PRIVATE | MAP_ANONYMOUS | MAP_NORESERVE, -1, 0);
|
||||
#endif
|
||||
|
||||
|
|
@ -822,7 +822,7 @@ bool Xbox::LocateKernelData() {
|
|||
if (eip >= 0x80000000) {
|
||||
uint16_t mzMagic = 0;
|
||||
if (m_cpu->VMemRead(0x80010000, sizeof(uint16_t), &mzMagic)) return false;
|
||||
if (mzMagic != 'ZM') {
|
||||
if (mzMagic != 0x5a4d) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
|
@ -836,7 +836,7 @@ bool Xbox::LocateKernelData() {
|
|||
peHeaderAddress += 0x80010000;
|
||||
uint16_t peMagic = 0;
|
||||
if (m_cpu->VMemRead(peHeaderAddress, sizeof(uint16_t), &peMagic)) return false;
|
||||
if (peMagic != 'EP') {
|
||||
if (peMagic != 0x4550) {
|
||||
peHeaderAddress = 0x00000000;
|
||||
return false;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -132,6 +132,9 @@ CPUMemMapStatus KvmCpu::MemMapSubregion(MemoryRegion *subregion) {
|
|||
case KVMVMS_MEMSIZE_MISALIGNED: return CPUS_MMAP_MEMORY_SIZE_MISALIGNED;
|
||||
case KVMVMS_MEM_ERROR: return CPUS_MMAP_MAPPING_FAILED;
|
||||
return CPUS_MMAP_UNHANDLED_ERROR;
|
||||
case KVMVMS_CREATE_FAILED:
|
||||
// Shouldn't happen
|
||||
return CPUS_MMAP_UNHANDLED_ERROR;
|
||||
}
|
||||
}
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -59,8 +59,8 @@ private:
|
|||
void UpdateRegisters();
|
||||
CPUStatus HandleExecResult(KvmVCPUStatus status);
|
||||
|
||||
CPUOperationStatus HandleIO(uint8_t direction, uint16_t port, uint8_t size, uint32_t count, uint64_t dataOffset);
|
||||
CPUOperationStatus HandleMMIO(uint32_t physAddress, uint32_t *data, uint8_t size, uint8_t isWrite);
|
||||
CPUStatus HandleIO(uint8_t direction, uint16_t port, uint8_t size, uint32_t count, uint64_t dataOffset);
|
||||
CPUStatus HandleMMIO(uint32_t physAddress, uint32_t *data, uint8_t size, uint8_t isWrite);
|
||||
|
||||
CPUOperationStatus RefreshRegisters(bool refreshFPU);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
#include "openxbox/cpu_module.h"
|
||||
#include "openxbox/cpu_module_decl.h"
|
||||
#include "cpu_kvm_module.h"
|
||||
|
||||
namespace openxbox {
|
||||
|
|
|
|||
Loading…
Reference in a new issue