mirror of
https://github.com/SourMesen/Mesen2.git
synced 2025-04-02 10:21:44 -04:00
d72658de7a
+ Added option to save directly to the original rom file instead of creating .ips files (for FDS & cartridges with flashable prg/chr rom)
281 lines
No EOL
9.6 KiB
C++
281 lines
No EOL
9.6 KiB
C++
#pragma once
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#include "pch.h"
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#include "NES/INesMemoryHandler.h"
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#include "NES/NesTypes.h"
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#include "NES/RomData.h"
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#include "Debugger/DebugTypes.h"
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#include "Shared/Emulator.h"
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#include "Shared/MemoryOperationType.h"
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#include "Utilities/ISerializable.h"
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class NesConsole;
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class Epsm;
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enum class MemoryType;
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struct MapperStateEntry;
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class BaseMapper : public INesMemoryHandler, public ISerializable
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{
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private:
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unique_ptr<Epsm> _epsm;
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MirroringType _mirroringType = {};
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string _batteryFilename;
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uint16_t InternalGetPrgPageSize();
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uint16_t InternalGetSaveRamPageSize();
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uint16_t InternalGetWorkRamPageSize();
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uint16_t InternalGetChrRomPageSize();
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uint16_t InternalGetChrRamPageSize();
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bool ValidateAddressRange(uint16_t startAddr, uint16_t endAddr);
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uint8_t *_nametableRam = nullptr;
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uint8_t _nametableCount = 2;
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uint32_t _ntRamSize = 0;
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uint32_t _internalRamMask = 0x7FF;
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bool _hasBusConflicts = false;
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bool _hasDefaultWorkRam = false;
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bool _hasCustomReadVram = false;
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bool _hasCpuClockHook = false;
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bool _hasVramAddressHook = false;
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bool _allowRegisterRead = false;
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bool _isReadRegisterAddr[0x10000] = {};
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bool _isWriteRegisterAddr[0x10000] = {};
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MemoryAccessType _prgMemoryAccess[0x100] = {};
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uint8_t* _prgPages[0x100] = {};
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MemoryAccessType _chrMemoryAccess[0x100] = {};
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uint8_t* _chrPages[0x100] = {};
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int32_t _prgMemoryOffset[0x100] = {};
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PrgMemoryType _prgMemoryType[0x100] = {};
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int32_t _chrMemoryOffset[0x100] = {};
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ChrMemoryType _chrMemoryType[0x100] = {};
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vector<uint8_t> _originalPrgRom;
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vector<uint8_t> _originalChrRom;
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protected:
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NesRomInfo _romInfo = {};
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NesConsole* _console = nullptr;
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Emulator* _emu = nullptr;
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uint8_t* _prgRom = nullptr;
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uint8_t* _chrRom = nullptr;
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uint8_t* _chrRam = nullptr;
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uint32_t _prgSize = 0;
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uint32_t _chrRomSize = 0;
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uint32_t _chrRamSize = 0;
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uint8_t* _saveRam = nullptr;
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uint32_t _saveRamSize = 0;
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uint32_t _workRamSize = 0;
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uint8_t* _workRam = nullptr;
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bool _hasChrBattery = false;
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int16_t _vramOpenBusValue = -1;
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uint8_t* _mapperRam = nullptr;
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uint32_t _mapperRamSize = 0;
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virtual void InitMapper() = 0;
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virtual void InitMapper(RomData &romData);
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virtual uint16_t GetPrgPageSize() = 0;
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virtual uint16_t GetChrPageSize() = 0;
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bool IsNes20();
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virtual uint16_t GetChrRamPageSize() { return GetChrPageSize(); }
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//Save ram is battery backed and saved to disk
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virtual uint32_t GetSaveRamSize() { return 0x2000; }
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virtual uint32_t GetSaveRamPageSize() { return 0x2000; }
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virtual bool ForceChrBattery() { return false; }
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virtual bool ForceSaveRamSize() { return false; }
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virtual bool ForceWorkRamSize() { return false; }
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virtual uint32_t GetChrRamSize() { return 0x0000; }
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//Work ram is NOT saved - aka Expansion ram, etc.
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virtual uint32_t GetWorkRamSize() { return 0x2000; }
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virtual uint32_t GetWorkRamPageSize() { return 0x2000; }
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virtual uint32_t GetMapperRamSize() { return 0; }
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virtual uint16_t RegisterStartAddress() { return 0x8000; }
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virtual uint16_t RegisterEndAddress() { return 0xFFFF; }
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virtual bool AllowRegisterRead() { return false; }
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virtual bool EnableCpuClockHook() { return false; }
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virtual bool EnableCustomVramRead() { return false; }
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virtual bool EnableVramAddressHook() { return false; }
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virtual uint32_t GetDipSwitchCount() { return 0; }
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virtual uint32_t GetNametableCount() { return 0; }
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virtual bool HasBusConflicts() { return false; }
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uint8_t InternalReadRam(uint16_t addr);
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virtual void WriteRegister(uint16_t addr, uint8_t value);
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virtual uint8_t ReadRegister(uint16_t addr);
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void SelectPrgPage4x(uint16_t slot, uint16_t page, PrgMemoryType memoryType = PrgMemoryType::PrgRom);
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void SelectPrgPage2x(uint16_t slot, uint16_t page, PrgMemoryType memoryType = PrgMemoryType::PrgRom);
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virtual void SelectPrgPage(uint16_t slot, uint16_t page, PrgMemoryType memoryType = PrgMemoryType::PrgRom);
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void SetCpuMemoryMapping(uint16_t startAddr, uint16_t endAddr, int16_t pageNumber, PrgMemoryType type, int8_t accessType = -1);
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void SetCpuMemoryMapping(uint16_t startAddr, uint16_t endAddr, PrgMemoryType type, uint32_t sourceOffset, int8_t accessType);
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void SetCpuMemoryMapping(uint16_t startAddr, uint16_t endAddr, uint8_t *source, uint32_t sourceOffset, uint32_t sourceSize, int8_t accessType = -1);
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void RemoveCpuMemoryMapping(uint16_t startAddr, uint16_t endAddr);
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virtual void SelectChrPage8x(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default);
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virtual void SelectChrPage4x(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default);
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virtual void SelectChrPage2x(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default);
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virtual void SelectChrPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default);
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void SetPpuMemoryMapping(uint16_t startAddr, uint16_t endAddr, uint16_t pageNumber, ChrMemoryType type = ChrMemoryType::Default, int8_t accessType = -1);
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void SetPpuMemoryMapping(uint16_t startAddr, uint16_t endAddr, ChrMemoryType type, uint32_t sourceOffset, int8_t accessType);
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void SetPpuMemoryMapping(uint16_t startAddr, uint16_t endAddr, uint8_t* sourceMemory, uint32_t sourceOffset, uint32_t sourceSize, int8_t accessType = -1);
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void RemovePpuMemoryMapping(uint16_t startAddr, uint16_t endAddr);
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bool HasBattery();
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virtual void LoadBattery();
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string GetBatteryFilename();
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uint32_t GetPrgPageCount();
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uint32_t GetChrRomPageCount();
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uint8_t GetPowerOnByte(uint8_t defaultValue = 0);
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uint32_t GetDipSwitches();
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void SetupDefaultWorkRam();
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void InitializeChrRam(int32_t chrRamSize = -1);
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void AddRegisterRange(uint16_t startAddr, uint16_t endAddr, MemoryOperation operation = MemoryOperation::Any);
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void RemoveRegisterRange(uint16_t startAddr, uint16_t endAddr, MemoryOperation operation = MemoryOperation::Any);
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void Serialize(Serializer& s) override;
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void RestorePrgChrState();
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void BaseProcessCpuClock();
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uint8_t* GetNametable(uint8_t nametableIndex);
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void SetNametable(uint8_t index, uint8_t nametableIndex);
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void SetNametables(uint8_t nametable1Index, uint8_t nametable2Index, uint8_t nametable3Index, uint8_t nametable4Index);
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void SetMirroringType(MirroringType type);
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MirroringType GetMirroringType();
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void InternalWriteVram(uint16_t addr, uint8_t value);
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__forceinline uint8_t InternalReadVram(uint16_t addr)
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{
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if(_chrMemoryAccess[addr >> 8] & MemoryAccessType::Read) {
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return _chrPages[addr >> 8][(uint8_t)addr];
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}
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//Open bus - "When CHR is disabled, the pattern tables are open bus. Theoretically, this should return the LSB of the address read, but real-world behavior varies."
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return _vramOpenBusValue >= 0 ? _vramOpenBusValue : addr;
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}
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virtual vector<MapperStateEntry> GetMapperStateEntries() { return {}; }
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void LoadRomPatch(vector<uint8_t>& orgPrgRom, vector<uint8_t>* orgChrRom = nullptr);
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void SaveRom(vector<uint8_t>& orgPrgRom, vector<uint8_t>* orgChrRom = nullptr);
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void SerializeRomDiff(Serializer& s, vector<uint8_t>& orgPrgRom, vector<uint8_t>* orgChrRom = nullptr);
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public:
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static constexpr uint32_t NametableSize = 0x400;
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void Initialize(NesConsole* console, RomData &romData);
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void InitSpecificMapper(RomData& romData);
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BaseMapper();
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virtual ~BaseMapper();
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virtual void Reset(bool softReset);
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virtual void OnAfterResetPowerOn() {}
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GameSystem GetGameSystem();
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PpuModel GetPpuModel();
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Epsm* GetEpsm() { return _epsm.get(); }
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bool HasDefaultWorkRam();
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void SetRegion(ConsoleRegion region);
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__forceinline bool HasCpuClockHook() { return _hasCpuClockHook; }
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virtual void ProcessCpuClock();
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__forceinline bool HasVramAddressHook() { return _hasVramAddressHook; }
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virtual void NotifyVramAddressChange(uint16_t addr);
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virtual void GetMemoryRanges(MemoryRanges &ranges) override;
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virtual uint32_t GetInternalRamSize() { return 0x800; }
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virtual void SaveBattery();
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NesRomInfo GetRomInfo();
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uint32_t GetMapperDipSwitchCount();
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uint8_t ReadRam(uint16_t addr) override;
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uint8_t PeekRam(uint16_t addr) override;
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uint8_t DebugReadRam(uint16_t addr);
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void WriteRam(uint16_t addr, uint8_t value) override;
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void DebugWriteRam(uint16_t addr, uint8_t value);
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void WritePrgRam(uint16_t addr, uint8_t value);
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virtual uint8_t MapperReadVram(uint16_t addr, MemoryOperationType operationType);
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virtual void MapperWriteVram(uint16_t addr, uint8_t value);
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__forceinline uint8_t ReadVram(uint16_t addr, MemoryOperationType type = MemoryOperationType::PpuRenderingRead)
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{
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uint8_t value;
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if(!_hasCustomReadVram) {
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value = InternalReadVram(addr);
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} else {
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value = MapperReadVram(addr, type);
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}
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_emu->ProcessPpuRead<CpuType::Nes>(addr, value, MemoryType::NesPpuMemory, type);
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return value;
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}
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void DebugWriteVram(uint16_t addr, uint8_t value, bool disableSideEffects = true);
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void WriteVram(uint16_t addr, uint8_t value);
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uint8_t DebugReadVram(uint16_t addr, bool disableSideEffects = true);
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void CopyChrTile(uint32_t address, uint8_t *dest);
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//Debugger Helper Functions
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bool HasChrRam();
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bool HasChrRom();
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uint32_t GetChrRomSize() { return _chrRomSize; }
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CartridgeState GetState();
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AddressInfo GetAbsoluteAddress(uint16_t relativeAddr);
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void GetPpuAbsoluteAddress(uint16_t relativeAddr, AddressInfo& info);
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AddressInfo GetPpuAbsoluteAddress(uint32_t relativeAddr);
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AddressInfo GetRelativeAddress(AddressInfo& addr);
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int32_t GetPpuRelativeAddress(AddressInfo& addr);
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bool IsWriteRegister(uint16_t addr);
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bool IsReadRegister(uint16_t addr);
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void GetRomFileData(vector<uint8_t> &out, bool asIpsFile, uint8_t* header);
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vector<uint8_t> GetPrgChrCopy();
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void RestorePrgChrBackup(vector<uint8_t>& backupData);
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void RevertPrgChrChanges();
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bool HasPrgChrChanges();
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void CopyPrgChrRom(BaseMapper* mapper);
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void SwapMemoryAccess(BaseMapper* sub, bool mainHasAccess);
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}; |