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2.0.0-preview1

Mono Color

• 3cc2aee494 PPU: Fixed mode 4 lookup logic Sour 2019-03-04 19:13:12 -05:00
• 4139f6dca8 CPU/PPU: Improved timing and implemented catch-up in PPU when registers are written to in the middle of a scanline Sour 2019-03-04 17:49:14 -05:00
• 944f94b271 Fixed build error Sour 2019-03-03 22:03:03 -05:00
• 03d6be7ac7 PPU: Offset-per-tile mode fixes Sour 2019-03-03 18:05:58 -05:00
• 706ef2f6e4 Debugger: Added basic tilemap viewer Sour 2019-03-03 16:34:23 -05:00
• b9321f66f7 DMA: Reset DoTransfer flag when initializing HDMA channels Sour 2019-03-03 13:53:00 -05:00
• ce7c2f7ee8 PPU: Fixed Mode 4 BG2 BPP config Sour 2019-03-03 01:01:30 -05:00
• 12bd090daf PPU: Fixed sprite wrapping behavior at the bottom/top of the screen Sour 2019-03-03 00:31:28 -05:00
• c138e20a06 PPU: Fixed hi-res display for modes other than 5/6 Sour 2019-03-02 21:37:32 -05:00
• fb9ff3df79 Display (some) cart information on load Sour 2019-03-02 21:17:45 -05:00
• 25837e5c71 CPU: Fixed BRK/COP instructions (read + ignore the signature byte) Sour 2019-03-02 20:26:14 -05:00
• 3cfb3f7f25 PPU: Improved hires/interlace support (allow mid-screen changes) Sour 2019-03-02 18:00:27 -05:00
• 37c9996e7b PPU: Fixed sprite draw order/priority and implemented priority activation bit Sour 2019-03-02 13:51:42 -05:00
• b46ef705f8 PPU: Fixed sprites being displayed with a 1 scanline offset Sour 2019-03-02 11:15:51 -05:00
• e321b247ac CPU: Allow move instructions to be interrupted by an IRQ/NMI + Implemented WAI instruction Sour 2019-03-02 10:58:25 -05:00
• 28a151e00d PPU: Fixed sprite range/time flags and hblank flag Sour 2019-03-02 00:11:42 -05:00
• 672e4422f7 PPU: Fixed NMI scanline in 239-line mode Sour 2019-03-01 23:10:22 -05:00
• cbd08a3767 PPU: Implemented vram address translation + fixed issues with H/V flags/irqs Sour 2019-03-01 22:24:18 -05:00
• 8502581a1d Debugger: Breakpoint support Sour 2019-03-01 20:27:49 -05:00
• 72c17966b9 WRAM: Fixed out-of-bounds memory access on register reads Sour 2019-03-01 19:31:24 -05:00
• 27476a08ab Debugger: Fixed disassembly output for PEA/PEI/PER Sour 2019-02-28 23:06:26 -05:00
• c9eb9cef52 Debugger: Show effective address/memory value in disassembly + update trace logger to use the same code Sour 2019-02-28 16:53:04 -05:00
• 26e90e90a1 Debugger: Watch list Sour 2019-02-27 20:33:56 -05:00
• 802bd75df1 Debugger: Disassembly window, code data logger Sour 2019-02-27 19:49:26 -05:00
• 4ee2c42663 Memory manager refactoring Sour 2019-02-26 22:27:09 -05:00
• cc8ddabf88 PGO build configuration Sour 2019-02-24 23:53:14 -05:00
• 853821de2f Cart: Save/load .srm save ram files Sour 2019-02-24 20:04:59 -05:00
• 069c8dc42d Fixed compilation warnings/errors Sour 2019-02-24 19:57:34 -05:00
• 002cda8cf6 PPU: Sprite interlace flag support (untested) Sour 2019-02-24 19:21:19 -05:00
• 76d1aa82e5 PPU: Fixed obj/color window mask logic not being applied correctly Sour 2019-02-24 19:02:21 -05:00
• b9aedafd32 PPU: Offset per tile mode support (mode 2/4/6) Sour 2019-02-24 18:45:47 -05:00
• 5a45665d74 PPU: Fixed negative X sprite display logic Sour 2019-02-24 13:09:22 -05:00
• 66cc7847fb Fixed project issues (DLL was not included in .exe) + Prevent crash when SPC bios is not found Sour 2019-02-24 12:54:14 -05:00
• 75dee8b8e4 PPU: Fixed mode 5 when using 16x16 tiles Sour 2019-02-24 11:14:24 -05:00
• e80d6fcd7f PPU: Mode 6 support (incomplete) Sour 2019-02-24 10:30:19 -05:00
• 3aa008b831 PPU: Fixed out-of-bounds memory access in mode 7 with negative offsets Sour 2019-02-24 10:29:11 -05:00
• 0431e1931d PPU: Fixed sprite display when vertical mirroring is enabled Sour 2019-02-24 10:02:22 -05:00
• 21791170f4 PPU: Fixed VRAM read behavior Sour 2019-02-24 09:38:22 -05:00
• 073e7b2bf3 PPU: Code refactoring Sour 2019-02-24 01:30:55 -05:00
• 16cc0653e9 PPU: Direct color mode support Sour 2019-02-24 01:11:26 -05:00
• 85f1333c3d PPU: Support for mode 5, hires, interlace, and overscan mode Sour 2019-02-23 21:39:35 -05:00
• 19a6663ed9 PPU: Mode 7 Ext BG mode Sour 2019-02-23 16:04:04 -05:00
• 39ae565aa1 PPU: Mode 7 support Sour 2019-02-23 15:40:32 -05:00
• 86326215fd PPU: Precalculate some flags through templates for performance Sour 2019-02-23 08:54:46 -05:00
• fef78e5802 PPU: Support for 16x16 tiles Sour 2019-02-23 01:28:41 -05:00
• 4b2697612e PPU: Minor refactoring Sour 2019-02-22 22:35:53 -05:00
• f028518664 PPU: Implement brightness control Sour 2019-02-22 22:31:20 -05:00
• dbfed2bb46 PPU: Implemented color window Sour 2019-02-22 22:19:20 -05:00
• c809f096f5 HDMA: Fixed HDMA only working until any channel was disabled/done Sour 2019-02-22 22:15:45 -05:00
• a009e899a2 PPU: Window support (except color window) Sour 2019-02-22 20:15:55 -05:00
• 7f5d93d680 PPU: Minor refactoring Sour 2019-02-22 18:41:43 -05:00
• 462bffa513 UI: Added icon to .exe Sour 2019-02-22 18:41:11 -05:00
• b6b1620e00 DMA: Fixed (?) source bank for HDMA Sour 2019-02-22 18:40:39 -05:00
• 02425d7453 DMA: Added delay values for DMA/HDMA Sour 2019-02-21 23:35:51 -05:00
• 596d6b9ce8 PPU: Optimizations (runs ~20% faster) Sour 2019-02-21 22:40:08 -05:00
• 0b7ad7c0db CPU: Added all idle cycles + added DRAM refresh delay Sour 2019-02-21 22:10:41 -05:00
• 97c7d06156 Fixed throw syntax Sour 2019-02-21 18:18:25 -05:00
• 170a33af49 CPU: Implemented FastROM register Sour 2019-02-21 18:12:44 -05:00
• bcf41aca83 PPU: Implemented second PPU status flag ($213F) Sour 2019-02-21 18:11:31 -05:00
• 93b730b390 PPU: Fixed V/H read toggle Sour 2019-02-21 17:45:11 -05:00
• 66aa5034a0 Core: Added frame limiter Sour 2019-02-21 17:18:56 -05:00
• b2af226467 Code optimization Sour 2019-02-21 17:17:55 -05:00
• a71de2a7bf SPC: Run SPC 1 frame per frame, rather than 60 frames per frame. + Fixed warnings in SPC code in 64-bit mode Sour 2019-02-21 16:49:19 -05:00
• d73ca5bf82 PPU: Implemented multiply register Sour 2019-02-21 08:15:00 -05:00
• 5952fcd3f5 DMA: Implemented DMA register reads Sour 2019-02-21 07:55:53 -05:00
• 68e7617c95 PPU: Implemented VRAM/CGRAM reads + H/V offset data latches + Implemented work ram read register Sour 2019-02-21 07:27:47 -05:00
• 6e32ebfffd CPU: MVN/MVP set the value of DBR to the destination bank Sour 2019-02-21 00:40:32 -05:00
• e6809305f1 CPU: Enabling 8-bit indexes must truncate the value of X/Y (refix) Sour 2019-02-20 22:46:14 -05:00
• 1a90a36d3c CPU: TSC/TDC/TCD always transfer a full 16-bit Sour 2019-02-20 22:01:04 -05:00
• fb8a9f18ed CPU: Fixed ClearIrqSource setting the irq instead of clearing it A lot more games booting and getting in-game now Sour 2019-02-20 20:50:43 -05:00
• 0b757f6fad CPU: Fixed MVN/MVP when A is $FFFF Sour 2019-02-20 20:16:11 -05:00
• f75db1b297 CPU: Fixed MVN/MVP instructions using the wrong src/dest banks Sour 2019-02-20 20:00:59 -05:00
• 011caf951c CPU: Enabling 8-bit indexes must truncate the value of X/Y Sour 2019-02-20 19:53:45 -05:00
• 37b501122f PPU: Mosaic effect support Sour 2019-02-20 17:39:14 -05:00
• 30cb4f1dcc PPU: Fixed out-of-bounds memory writes Sour 2019-02-20 00:43:40 -05:00
• 77ac5a50dc PPU: Minor refactoring Sour 2019-02-19 23:37:27 -05:00
• de9e71eabf PPU: Improved color math support Sour 2019-02-19 23:35:43 -05:00
• 4264779b26 PPU: Fixed palette selection for BG2/3/4 in mode 0 Sour 2019-02-19 22:44:05 -05:00
• 221bc44700 DMA: Added support for HDMA (incorrect timings) Sour 2019-02-19 21:09:12 -05:00
• 384a5a2c99 PPU: Implement OAM reading and fixed OAM-related bugs (based on blargg's oam tests) Sour 2019-02-19 18:41:59 -05:00
• b5fe44a037 PPU: Implement basic sprite time/range over flags, forced vblank flag + Stub for IO port registers Sour 2019-02-19 18:01:27 -05:00
• 06a9babfd7 PPU: Basic scroll offset support (WIP) Sour 2019-02-19 17:23:21 -05:00
• d88a0b5086 PPU: Scanline renderer (wip) - better priority & subscreen/color math logic Sour 2019-02-19 01:26:48 -05:00
• ad251609d6 CPU: Fixed ADC/SBC instructions (passes blargg's adc/sbc tests) Sour 2019-02-18 23:04:08 -05:00
• 9f5bf4a37b PPU: Scanline renderer (wip) Sour 2019-02-18 22:27:22 -05:00
• eb158131a5 CPU: MSB of accumulator should not be modified by shift operations when 8-bit memory operations are enabled Sour 2019-02-18 20:24:17 -05:00
• 2275718c93 PPU: Basic tile mirroring support + color math half mode fix Sour 2019-02-18 00:24:46 -05:00
• 17bb339fec PPU: Very incomplete color math support Sour 2019-02-17 23:53:19 -05:00
• 7ccfc99a62 PPU: Fixed tile CHR address for layers 1/3 + implemented "layer/oam enabled" flag Sour 2019-02-17 23:26:49 -05:00
• 20059ae975 PPU: Basic support for rendering sprites Sour 2019-02-17 22:44:57 -05:00
• a19013da76 PPU: Implemented OAM writes Sour 2019-02-17 21:09:33 -05:00
• 2305900939 Fixed compilation error in debug build Sour 2019-02-17 21:08:43 -05:00
• b806b3d96e Core: Added SNES controller support Sour 2019-02-17 19:54:29 -05:00
• aaf147b53b Refactor internal CPU registers + implement division register Sour 2019-02-17 15:37:31 -05:00
• 1224909fb1 UI: Added frame/fps counters Sour 2019-02-17 15:02:33 -05:00
• d12a582dbc SPC: Switched to fast DSP core (better for development for now) Sour 2019-02-17 14:58:48 -05:00
• 93e8fd9d5e Core: Fixed for memory mappings, implemented multiplication register, added logging to help debugging missing functionalities Sour 2019-02-17 14:42:35 -05:00
• 0757ccefa6 PPU: Horizontal/vertical IRQ timer support Sour 2019-02-17 01:09:47 -05:00
• 0681419841 PPU: Added very basic support for other display modes Sour 2019-02-17 00:32:41 -05:00
• bdc57286e7 SPC: Integrate blargg's SPC emulation library Sound still doesn't work, however. Sour 2019-02-16 11:23:01 -05:00