mirror of
https://github.com/SourMesen/Mesen2.git
synced 2025-04-02 10:21:44 -04:00
NES: DMAs interrupted during a write shouldn't start after the write
This commit is contained in:
parent
de20208abe
commit
efdf18dadb
1 changed files with 11 additions and 3 deletions
|
@ -531,9 +531,17 @@ void NesCpu::StartDmcTransfer()
|
|||
|
||||
void NesCpu::StopDmcTransfer()
|
||||
{
|
||||
if(_needHalt && _dmcDmaRunning) {
|
||||
_abortDmcDma = true;
|
||||
_needDummyRead = false;
|
||||
if(_dmcDmaRunning) {
|
||||
if(_needHalt) {
|
||||
//If interrupted before the halt cycle starts, cancel DMA completely
|
||||
//This can happen when a write prevents the DMA from starting after being queued
|
||||
_dmcDmaRunning = false;
|
||||
_needDummyRead = false;
|
||||
_needHalt = false;
|
||||
} else {
|
||||
//Abort DMA if possible (this only appears to be possible if done within the first cycle of DMA)
|
||||
_abortDmcDma = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue