mirror of
https://github.com/SourMesen/Mesen.git
synced 2025-04-02 10:52:48 -04:00
Debugger: Allow disassembly of cartridge work ram & cpu ram + Added tracing for NMI, IRQ and DMAs
This commit is contained in:
Souryo
parent
9084d48a01
commit
f1d8bde090
11 changed files with 241 additions and 136 deletions
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@ -549,15 +549,25 @@ void BaseMapper::NotifyVRAMAddressChange(uint16_t addr)
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}
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//Debugger Helper Functions
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uint8_t* BaseMapper::GetPrgRom()
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{
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return _prgRom;
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}
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uint8_t* BaseMapper::GetWorkRam()
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{
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return _workRam;
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}
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void BaseMapper::GetPrgCopy(uint8_t **buffer)
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{
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*buffer = new uint8_t[_prgSize];
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memcpy(*buffer, _prgRom, _prgSize);
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}
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uint32_t BaseMapper::GetPrgSize()
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uint32_t BaseMapper::GetPrgSize(bool getWorkRamSize)
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{
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return _prgSize;
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return getWorkRamSize ? GetWorkRamSize() : _prgSize;
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}
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void BaseMapper::GetChrRomCopy(uint8_t **buffer)
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@ -586,6 +596,15 @@ int32_t BaseMapper::ToAbsoluteAddress(uint16_t addr)
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return -1;
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}
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int32_t BaseMapper::ToAbsoluteRamAddress(uint16_t addr)
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{
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uint8_t *prgRamAddr = _prgPages[addr >> 8] + (addr & 0xFF);
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if(prgRamAddr >= _workRam && prgRamAddr < _workRam + GetWorkRamSize()) {
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return (uint32_t)(prgRamAddr - _workRam);
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}
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return -1;
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}
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int32_t BaseMapper::ToAbsoluteChrAddress(uint16_t addr)
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{
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uint8_t *chrAddr = _chrPages[addr >> 8] + (addr & 0xFF);
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@ -608,18 +627,4 @@ int32_t BaseMapper::FromAbsoluteAddress(uint32_t addr)
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//Address is currently not mapped
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return -1;
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}
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vector<int32_t> BaseMapper::GetPRGRanges()
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{
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vector<int32_t> memoryRanges;
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for(uint32_t i = 0x8000; i <= 0xFFFF; i += 0x100) {
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int32_t pageStart = ToAbsoluteAddress((uint16_t)i);
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int32_t pageEnd = ToAbsoluteAddress((uint16_t)i + 0xFF);
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memoryRanges.push_back(pageStart);
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memoryRanges.push_back(pageEnd);
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}
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return memoryRanges;
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}
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@ -168,13 +168,15 @@ public:
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void WriteVRAM(uint16_t addr, uint8_t value);
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//Debugger Helper Functions
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uint8_t* GetPrgRom();
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uint8_t* GetWorkRam();
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void GetPrgCopy(uint8_t **buffer);
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uint32_t GetPrgSize();
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uint32_t GetPrgSize(bool getWorkRamSize = false);
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void GetChrRomCopy(uint8_t **buffer);
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uint32_t GetChrSize(bool getRamSize = false);
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void GetChrRamCopy(uint8_t **buffer);
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int32_t ToAbsoluteAddress(uint16_t addr);
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int32_t ToAbsoluteRamAddress(uint16_t addr);
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int32_t ToAbsoluteChrAddress(uint16_t addr);
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int32_t FromAbsoluteAddress(uint32_t addr);
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vector<int32_t> GetPRGRanges();
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};
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@ -3,6 +3,7 @@
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#include "PPU.h"
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#include "APU.h"
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#include "DeltaModulationChannel.h"
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#include "TraceLogger.h"
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CPU* CPU::Instance = nullptr;
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@ -106,6 +107,7 @@ void CPU::IncCycleCount()
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//Update the DMC buffer when the stall period is completed
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_dmcDmaRunning = false;
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DeltaModulationChannel::SetReadBuffer();
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TraceLogger::LogStatic("DMC DMA End");
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}
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}
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@ -126,6 +128,7 @@ void CPU::IncCycleCount()
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void CPU::RunDMATransfer(uint8_t* spriteRAM, uint8_t offsetValue)
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{
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TraceLogger::LogStatic("Sprite DMA Start");
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Instance->_spriteDmaTransfer = true;
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//"The CPU is suspended during the transfer, which will take 513 or 514 cycles after the $4014 write tick."
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@ -149,12 +152,15 @@ void CPU::RunDMATransfer(uint8_t* spriteRAM, uint8_t offsetValue)
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}
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Instance->_spriteDmaTransfer = false;
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TraceLogger::LogStatic("Sprite DMA End");
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}
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void CPU::StartDmcTransfer()
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{
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//"DMC DMA adds 4 cycles normally, 2 if it lands on the $4014 write or during OAM DMA"
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//3 cycles if it lands on the last write cycle of any instruction
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TraceLogger::LogStatic("DMC DMA Start");
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Instance->_dmcDmaRunning = true;
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if(Instance->_spriteDmaTransfer) {
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if(Instance->_spriteDmaCounter == 2) {
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@ -4,6 +4,7 @@
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#include "MemoryManager.h"
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#include "PPU.h"
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#include "Snapshotable.h"
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#include "TraceLogger.h"
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namespace PSFlags
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{
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@ -643,11 +644,15 @@ private:
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SetFlags(PSFlags::Interrupt);
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SetPC(MemoryReadWord(CPU::NMIVector));
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TraceLogger::LogStatic("NMI");
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} else {
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Push((uint8_t)flags);
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SetFlags(PSFlags::Interrupt);
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SetPC(MemoryReadWord(CPU::IRQVector));
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TraceLogger::LogStatic("IRQ");
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}
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//Since we just set the flag to prevent interrupts, do not run one right away after this (fixes nmi_and_brk & nmi_and_irq tests)
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@ -665,10 +670,14 @@ private:
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SetPC(MemoryReadWord(CPU::NMIVector));
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_state.NMIFlag = false;
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TraceLogger::LogStatic("NMI");
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} else {
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Push((uint8_t)PS());
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SetFlags(PSFlags::Interrupt);
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SetPC(MemoryReadWord(CPU::IRQVector));
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TraceLogger::LogStatic("IRQ");
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}
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}
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@ -22,9 +22,7 @@ Debugger::Debugger(shared_ptr<Console> console, shared_ptr<CPU> cpu, shared_ptr<
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_memoryManager = memoryManager;
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_mapper = mapper;
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uint8_t *prgBuffer;
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mapper->GetPrgCopy(&prgBuffer);
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_disassembler.reset(new Disassembler(memoryManager->GetInternalRAM(), prgBuffer, mapper->GetPrgSize()));
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_disassembler.reset(new Disassembler(memoryManager->GetInternalRAM(), mapper->GetPrgRom(), mapper->GetPrgSize(), mapper->GetWorkRam(), mapper->GetPrgSize(true)));
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_codeDataLogger.reset(new CodeDataLogger(mapper->GetPrgSize(), mapper->GetChrSize()));
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_stepOut = false;
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@ -67,7 +65,7 @@ bool Debugger::LoadCdlFile(string cdlFilepath)
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if(_codeDataLogger->LoadCdlFile(cdlFilepath)) {
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for(int i = 0, len = _mapper->GetPrgSize(); i < len; i++) {
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if(_codeDataLogger->IsCode(i)) {
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i = _disassembler->BuildCache(i, 0xFFFF) - 1;
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i = _disassembler->BuildCache(i, -1, 0xFFFF, false) - 1;
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}
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}
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return true;
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@ -241,27 +239,38 @@ void Debugger::PrivateProcessRamOperation(MemoryOperationType type, uint16_t &ad
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//Check if a breakpoint has been hit and freeze execution if one has
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bool breakDone = false;
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int32_t absoluteAddr = _mapper->ToAbsoluteAddress(addr);
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int32_t absoluteRamAddr = _mapper->ToAbsoluteRamAddress(addr);
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if(absoluteAddr >= 0) {
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if(type == MemoryOperationType::ExecOpCode) {
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_codeDataLogger->SetFlag(absoluteAddr, CdlPrgFlags::Code);
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_disassembler->BuildCache(absoluteAddr, addr);
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_lastInstruction = _memoryManager->DebugRead(addr);
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if(_traceLogger) {
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DebugState state;
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GetState(&state);
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_traceLogger->Log(state, _disassembler->GetDisassemblyInfo(absoluteAddr));
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}
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UpdateCallstack(addr);
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ProcessStepConditions(addr);
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breakDone = SleepUntilResume();
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} else if(type == MemoryOperationType::ExecOperand) {
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if(type == MemoryOperationType::ExecOperand) {
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_codeDataLogger->SetFlag(absoluteAddr, CdlPrgFlags::Code);
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} else {
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_codeDataLogger->SetFlag(absoluteAddr, CdlPrgFlags::Data);
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}
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} else if(addr < 0x2000 || absoluteRamAddr >= 0) {
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if(type == MemoryOperationType::Write) {
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_disassembler->InvalidateCache(addr, absoluteRamAddr);
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}
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}
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if(type == MemoryOperationType::ExecOpCode) {
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if(absoluteAddr >= 0) {
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_codeDataLogger->SetFlag(absoluteAddr, CdlPrgFlags::Code);
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}
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bool isSubEntryPoint = _lastInstruction == 0x20; //Previous instruction was a JSR
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_disassembler->BuildCache(absoluteAddr, absoluteRamAddr, addr, isSubEntryPoint);
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_lastInstruction = _memoryManager->DebugRead(addr);
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UpdateCallstack(addr);
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ProcessStepConditions(addr);
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if(_traceLogger) {
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DebugState state;
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GetState(&state);
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_traceLogger->Log(state, _disassembler->GetDisassemblyInfo(absoluteAddr, absoluteRamAddr, addr));
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}
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breakDone = SleepUntilResume();
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}
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if(!breakDone && _hasBreakpoint) {
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@ -393,26 +402,36 @@ bool Debugger::IsCodeChanged()
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string Debugger::GenerateOutput()
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{
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std::ostringstream output;
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vector<int32_t> memoryRanges = _mapper->GetPRGRanges();
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//RAM code viewer doesn't work well yet
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//output << _disassembler->GetRAMCode();
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//Get code in internal RAM
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output << _disassembler->GetCode(0x0000, 0x1FFF, 0x0000, PrgMemoryType::PrgRom);
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output << "2000:::--END OF INTERNAL RAM--\n";
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uint16_t memoryAddr = 0x8000;
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for(size_t i = 0, size = memoryRanges.size(); i < size; i += 2) {
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int32_t startRange = memoryRanges[i];
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for(uint32_t i = 0x4100; i < 0x10000; i += 0x100) {
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//Merge all sequential ranges into 1 chunk
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if(startRange != -1) {
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for(size_t j = i+1; j < size - 1; j+=2) {
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if(memoryRanges[j] + 1 == memoryRanges[j + 1]) {
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i+=2;
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} else {
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break;
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}
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int32_t romAddr = _mapper->ToAbsoluteAddress(i);
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int32_t ramAddr = _mapper->ToAbsoluteRamAddress(i);
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uint32_t startMemoryAddr = i;
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int32_t startAddr, endAddr;
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if(romAddr >= 0) {
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startAddr = romAddr;
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endAddr = startAddr + 0xFF;
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while(romAddr + 0x100 == _mapper->ToAbsoluteAddress(i + 0x100) && i < 0x10000) {
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endAddr += 0x100;
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romAddr += 0x100;
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i+=0x100;
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}
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output << _disassembler->GetCode(startRange, memoryRanges[i+1], memoryAddr);
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} else {
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memoryAddr += 0x100;
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output << _disassembler->GetCode(startAddr, endAddr, startMemoryAddr, PrgMemoryType::PrgRom);
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} else if(ramAddr >= 0) {
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startAddr = ramAddr;
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endAddr = startAddr + 0xFF;
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while(ramAddr + 0x100 == _mapper->ToAbsoluteRamAddress(i + 0x100) && i < 0x10000) {
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endAddr += 0x100;
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ramAddr += 0x100;
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i += 0x100;
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}
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output << _disassembler->GetCode(startAddr, endAddr, startMemoryAddr, PrgMemoryType::WorkRam);
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}
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}
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@ -1,38 +1,42 @@
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#include "stdafx.h"
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#include "Disassembler.h"
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#include "DisassemblyInfo.h"
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#include "BaseMapper.h"
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Disassembler::Disassembler(uint8_t* internalRAM, uint8_t* prgROM, uint32_t prgSize)
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Disassembler::Disassembler(uint8_t* internalRam, uint8_t* prgRom, uint32_t prgSize, uint8_t* prgRam, uint32_t prgRamSize)
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{
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_internalRAM = internalRAM;
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_prgROM = prgROM;
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_internalRam = internalRam;
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_prgRom = prgRom;
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_prgRam = prgRam;
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_prgSize = prgSize;
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for(uint32_t i = 0; i < prgSize; i++) {
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_disassembleCache.push_back(shared_ptr<DisassemblyInfo>(nullptr));
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}
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for(uint32_t i = 0; i < 0x2000; i++) {
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for(uint32_t i = 0; i < prgRamSize; i++) {
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_disassembleRamCache.push_back(shared_ptr<DisassemblyInfo>(nullptr));
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}
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for(uint32_t i = 0; i < 0x800; i++) {
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_disassembleMemoryCache.push_back(shared_ptr<DisassemblyInfo>(nullptr));
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}
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string opName[256] = {
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// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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"BRK", "ORA", "", "", "NOP", "ORA", "ASL", "", "PHP", "ORA", "ASL", "", "NOP", "ORA", "ASL", "", //0
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"BPL", "ORA", "", "", "NOP", "ORA", "ASL", "", "CLC", "ORA", "", "", "NOP", "ORA", "ASL", "", //1
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"JSR", "AND", "", "", "BIT", "AND", "ROL", "", "PLP", "AND", "ROL", "", "BIT", "AND", "ROL", "", //2
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"BMI", "AND", "", "", "NOP", "AND", "ROL", "", "SEC", "AND", "", "", "NOP", "AND", "ROL", "", //3
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"RTI", "EOR", "", "", "NOP", "EOR", "LSR", "", "PHA", "EOR", "LSR", "", "JMP", "EOR", "LSR", "", //4
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"BVC", "EOR", "", "", "NOP", "EOR", "LSR", "", "CLI", "EOR", "", "", "NOP", "EOR", "LSR", "", //5
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"RTS", "ADC", "", "", "NOP", "ADC", "ROR", "", "PLA", "ADC", "ROR", "", "JMP", "ADC", "ROR", "", //6
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"BVS", "ADC", "", "", "NOP", "ADC", "ROR", "", "SEI", "ADC", "", "", "NOP", "ADC", "ROR", "", //7
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"NOP", "STA", "NOP", "", "STY", "STA", "STX", "", "DEY", "NOP", "TXA", "", "STY", "STA", "STX", "", //8
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"BCC", "STA", "", "", "STY", "STA", "STX", "", "TYA", "STA", "TXS", "", "", "STA", "", "", //9
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"LDY", "LDA", "LDX", "", "LDY", "LDA", "LDX", "", "TAY", "LDA", "TAX", "", "LDY", "LDA", "LDX", "", //A
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"BCS", "LDA", "", "", "LDY", "LDA", "LDX", "", "CLV", "LDA", "TSX", "", "LDY", "LDA", "LDX", "", //B
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"CPY", "CPA", "NOP", "", "CPY", "CPA", "DEC", "", "INY", "CPA", "DEX", "", "CPY", "CPA", "DEC", "", //C
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"BNE", "CPA", "", "", "NOP", "CPA", "DEC", "", "CLD", "CPA", "", "", "NOP", "CPA", "DEC", "", //D
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"CPX", "SBC", "NOP", "", "CPX", "SBC", "INC", "", "INX", "SBC", "NOP", "", "CPX", "SBC", "INC", "", //E
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"BEQ", "SBC", "", "", "NOP", "SBC", "INC", "", "SED", "SBC", "", "", "NOP", "SBC", "INC", "" //F
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// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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"BRK", "ORA", "", "SLO*", "NOP", "ORA", "ASL", "SLO*", "PHP", "ORA", "ASL", "AAC*", "NOP", "ORA", "ASL", "SLO*", //0
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"BPL", "ORA", "", "SLO*", "NOP", "ORA", "ASL", "SLO*", "CLC", "ORA", "NOP*", "SLO*", "NOP", "ORA", "ASL", "SLO*", //1
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"JSR", "AND", "", "RLA*", "BIT", "AND", "ROL", "RLA*", "PLP", "AND", "ROL", "AAC*", "BIT", "AND", "ROL", "RLA*", //2
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"BMI", "AND", "", "RLA*", "NOP", "AND", "ROL", "RLA*", "SEC", "AND", "NOP*", "RLA*", "NOP", "AND", "ROL", "RLA*", //3
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"RTI", "EOR", "", "SRE*", "NOP", "EOR", "LSR", "SRE*", "PHA", "EOR", "LSR", "ASR*", "JMP", "EOR", "LSR", "SRE*", //4
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"BVC", "EOR", "", "SRE*", "NOP", "EOR", "LSR", "SRE*", "CLI", "EOR", "NOP*", "SRE*", "NOP", "EOR", "LSR", "SRE*", //5
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"RTS", "ADC", "", "RRA*", "NOP", "ADC", "ROR", "RRA*", "PLA", "ADC", "ROR", "ARR*", "JMP", "ADC", "ROR", "RRA*", //6
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"BVS", "ADC", "", "RRA*", "NOP", "ADC", "ROR", "RRA*", "SEI", "ADC", "NOP*", "RRA*", "NOP", "ADC", "ROR", "RRA*", //7
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"NOP", "STA", "NOP", "SAX*", "STY", "STA", "STX", "SAX*", "DEY", "NOP", "TXA", "", "STY", "STA", "STX", "SAX*", //8
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"BCC", "STA", "", "AXA*", "STY", "STA", "STX", "SAX*", "TYA", "STA", "TXS", "TAS*", "SYA*", "STA", "SXA", "AXA*", //9
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"LDY", "LDA", "LDX", "LAX*", "LDY", "LDA", "LDX", "LAX*", "TAY", "LDA", "TAX", "ATX*", "LDY", "LDA", "LDX", "LAX*", //A
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"BCS", "LDA", "", "LAX*", "LDY", "LDA", "LDX", "LAX*", "CLV", "LDA", "TSX", "LAS*", "LDY", "LDA", "LDX", "LAX*", //B
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"CPY", "CPA", "NOP", "DCP*", "CPY", "CPA", "DEC", "DCP*", "INY", "CPA", "DEX", "AXS*", "CPY", "CPA", "DEC", "DCP*", //C
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"BNE", "CPA", "", "DCP*", "NOP", "CPA", "DEC", "DCP*", "CLD", "CPA", "NOP*", "DCP*", "NOP", "CPA", "DEC", "DCP*", //D
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"CPX", "SBC", "NOP", "ISB*", "CPX", "SBC", "INC", "ISB*", "INX", "SBC", "NOP", "SBC*", "CPX", "SBC", "INC", "ISB*", //E
|
||||
"BEQ", "SBC", "", "ISB*", "NOP", "SBC", "INC", "ISB*", "SED", "SBC", "NOP*", "ISB*", "NOP", "SBC", "INC", "ISB*" //F
|
||||
};
|
||||
|
||||
AddrMode opMode[256] = {
|
||||
|
|
@ -87,28 +91,34 @@ Disassembler::Disassembler(uint8_t* internalRAM, uint8_t* prgROM, uint32_t prgSi
|
|||
|
||||
Disassembler::~Disassembler()
|
||||
{
|
||||
if(_prgROM) {
|
||||
delete[] _prgROM;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t Disassembler::BuildCache(uint32_t absoluteAddr, uint16_t memoryAddr)
|
||||
uint32_t Disassembler::BuildCache(int32_t absoluteAddr, int32_t absoluteRamAddr, uint16_t memoryAddr, bool isSubEntryPoint)
|
||||
{
|
||||
if(memoryAddr < 0x2000) {
|
||||
memoryAddr = memoryAddr & 0x7FF;
|
||||
if(!_disassembleMemoryCache[memoryAddr]) {
|
||||
shared_ptr<DisassemblyInfo> disInfo(new DisassemblyInfo(&_internalRAM[memoryAddr]));
|
||||
shared_ptr<DisassemblyInfo> disInfo(new DisassemblyInfo(&_internalRam[memoryAddr], isSubEntryPoint));
|
||||
_disassembleMemoryCache[memoryAddr] = disInfo;
|
||||
memoryAddr += disInfo->GetSize();
|
||||
} else if(isSubEntryPoint) {
|
||||
_disassembleMemoryCache[memoryAddr]->SetSubEntryPoint();
|
||||
}
|
||||
return memoryAddr;
|
||||
} else {
|
||||
if(!_disassembleCache[absoluteAddr]) {
|
||||
while(absoluteAddr < _prgSize && !_disassembleCache[absoluteAddr]) {
|
||||
shared_ptr<DisassemblyInfo> disInfo(new DisassemblyInfo(&_prgROM[absoluteAddr]));
|
||||
_disassembleCache[absoluteAddr] = disInfo;
|
||||
vector<shared_ptr<DisassemblyInfo>> &cache = absoluteRamAddr >= 0 ? _disassembleRamCache : _disassembleCache;
|
||||
uint8_t *source = absoluteRamAddr >= 0 ? _prgRam : _prgRom;
|
||||
if(absoluteRamAddr >= 0) {
|
||||
absoluteAddr = absoluteRamAddr;
|
||||
}
|
||||
|
||||
uint8_t opCode = _prgROM[absoluteAddr];
|
||||
if(!cache[absoluteAddr]) {
|
||||
while(absoluteAddr < (int32_t)_prgSize && !cache[absoluteAddr]) {
|
||||
shared_ptr<DisassemblyInfo> disInfo(new DisassemblyInfo(&source[absoluteAddr], isSubEntryPoint));
|
||||
isSubEntryPoint = false;
|
||||
cache[absoluteAddr] = disInfo;
|
||||
|
||||
uint8_t opCode = source[absoluteAddr];
|
||||
absoluteAddr += disInfo->GetSize();
|
||||
if(opCode == 0x10 || opCode == 0x20 || opCode == 0x30 || opCode == 0x40 || opCode == 0x50 || opCode == 0x60 || opCode == 0x70 || opCode == 0x90 || opCode == 0xB0 || opCode == 0xD0 || opCode == 0xF0 || opCode == 0x4C || opCode == 0x6C) {
|
||||
//Hit a jump/return instruction, can't assume that what follows is actual code, stop disassembling
|
||||
|
|
@ -116,56 +126,66 @@ uint32_t Disassembler::BuildCache(uint32_t absoluteAddr, uint16_t memoryAddr)
|
|||
}
|
||||
}
|
||||
} else {
|
||||
absoluteAddr += _disassembleCache[absoluteAddr]->GetSize();
|
||||
if(isSubEntryPoint) {
|
||||
cache[absoluteAddr]->SetSubEntryPoint();
|
||||
}
|
||||
absoluteAddr += cache[absoluteAddr]->GetSize();
|
||||
}
|
||||
return absoluteAddr;
|
||||
}
|
||||
}
|
||||
|
||||
string Disassembler::GetRAMCode()
|
||||
void Disassembler::InvalidateCache(uint16_t memoryAddr, int32_t absoluteRamAddr)
|
||||
{
|
||||
std::ostringstream output;
|
||||
|
||||
uint32_t addr = 0x0000;
|
||||
uint32_t byteCount = 0;
|
||||
while(addr < 0x2000) {
|
||||
shared_ptr<DisassemblyInfo> info;
|
||||
if(info = _disassembleMemoryCache[addr&0x7FF]) {
|
||||
if(byteCount > 0) {
|
||||
output << "\n";
|
||||
byteCount = 0;
|
||||
}
|
||||
output << std::hex << std::uppercase << addr << ":" << info->ToString(addr) << "\n";
|
||||
addr += info->GetSize();
|
||||
} else {
|
||||
if(byteCount >= 8) {
|
||||
output << "\n";
|
||||
byteCount = 0;
|
||||
}
|
||||
if(byteCount == 0) {
|
||||
output << std::hex << std::uppercase << addr << ":" << ".db";
|
||||
}
|
||||
output << std::hex << " $" << std::setfill('0') << std::setw(2) << (short)_internalRAM[addr];
|
||||
|
||||
byteCount++;
|
||||
addr++;
|
||||
}
|
||||
uint32_t addr;
|
||||
vector<shared_ptr<DisassemblyInfo>> *cache;
|
||||
if(memoryAddr < 0x2000) {
|
||||
addr = memoryAddr & 0x7FF;
|
||||
cache = &_disassembleMemoryCache;
|
||||
} else {
|
||||
addr = absoluteRamAddr;
|
||||
cache = &_disassembleRamCache;
|
||||
}
|
||||
|
||||
if(addr >= 0) {
|
||||
for(int i = 1; i <= 2; i++) {
|
||||
int offsetAddr = (int)addr - i;
|
||||
if(offsetAddr >= 0) {
|
||||
if((*cache)[offsetAddr] != nullptr) {
|
||||
if((*cache)[offsetAddr]->GetSize() >= (uint32_t)i + 1) {
|
||||
//Invalidate any instruction that overlapped this address
|
||||
(*cache)[offsetAddr] = nullptr;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
(*cache)[addr] = nullptr;
|
||||
}
|
||||
|
||||
output << "\n1FFF:--END OF INTERNAL RAM--\n";
|
||||
|
||||
return output.str();
|
||||
}
|
||||
|
||||
string Disassembler::GetCode(uint32_t startAddr, uint32_t endAddr, uint16_t &memoryAddr)
|
||||
string Disassembler::GetCode(uint32_t startAddr, uint32_t endAddr, uint16_t memoryAddr, PrgMemoryType memoryType)
|
||||
{
|
||||
std::ostringstream output;
|
||||
vector<shared_ptr<DisassemblyInfo>> *cache;
|
||||
uint8_t *source;
|
||||
uint32_t mask = 0xFFFFFFFF;
|
||||
if(memoryAddr < 0x2000) {
|
||||
cache = &_disassembleMemoryCache;
|
||||
source = _internalRam;
|
||||
mask = 0x7FF;
|
||||
} else if(memoryType == PrgMemoryType::WorkRam) {
|
||||
cache = &_disassembleRamCache;
|
||||
source = _prgRam;
|
||||
} else {
|
||||
cache = &_disassembleCache;
|
||||
source = _prgRom;
|
||||
}
|
||||
|
||||
uint32_t addr = startAddr;
|
||||
uint32_t byteCount = 0;
|
||||
while(addr <= endAddr) {
|
||||
shared_ptr<DisassemblyInfo> info;
|
||||
if(info = _disassembleCache[addr]) {
|
||||
if(info = (*cache)[addr&mask]) {
|
||||
if(byteCount > 0) {
|
||||
output << "\n";
|
||||
byteCount = 0;
|
||||
|
|
@ -181,7 +201,7 @@ string Disassembler::GetCode(uint32_t startAddr, uint32_t endAddr, uint16_t &mem
|
|||
if(byteCount == 0) {
|
||||
output << std::hex << std::uppercase << memoryAddr << ":" << addr << "::" << ".db";
|
||||
}
|
||||
output << std::hex << " $" << std::setfill('0') << std::setw(2) << (short)_prgROM[addr];
|
||||
output << std::hex << " $" << std::setfill('0') << std::setw(2) << (short)source[addr];
|
||||
|
||||
byteCount++;
|
||||
addr++;
|
||||
|
|
@ -193,7 +213,15 @@ string Disassembler::GetCode(uint32_t startAddr, uint32_t endAddr, uint16_t &mem
|
|||
return output.str();
|
||||
}
|
||||
|
||||
shared_ptr<DisassemblyInfo> Disassembler::GetDisassemblyInfo(uint32_t address)
|
||||
shared_ptr<DisassemblyInfo> Disassembler::GetDisassemblyInfo(int32_t absoluteAddress, int32_t absoluteRamAddress, uint16_t memoryAddress)
|
||||
{
|
||||
return _disassembleCache[address];
|
||||
if(memoryAddress < 0x2000) {
|
||||
return _disassembleMemoryCache[memoryAddress & 0x7FF];
|
||||
} else if(absoluteAddress >= 0) {
|
||||
return _disassembleCache[absoluteAddress];
|
||||
} else if(absoluteRamAddress >= 0) {
|
||||
return _disassembleRamCache[absoluteRamAddress];
|
||||
}
|
||||
|
||||
return nullptr;
|
||||
}
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
#pragma once
|
||||
#include "stdafx.h"
|
||||
#include "CPU.h"
|
||||
#include "BaseMapper.h"
|
||||
|
||||
class DisassemblyInfo;
|
||||
|
||||
|
|
@ -8,18 +8,21 @@ class Disassembler
|
|||
{
|
||||
private:
|
||||
vector<shared_ptr<DisassemblyInfo>> _disassembleCache;
|
||||
vector<shared_ptr<DisassemblyInfo>> _disassembleRamCache;
|
||||
vector<shared_ptr<DisassemblyInfo>> _disassembleMemoryCache;
|
||||
uint8_t* _internalRAM;
|
||||
uint8_t* _prgROM;
|
||||
uint8_t* _internalRam;
|
||||
uint8_t* _prgRom;
|
||||
uint8_t* _prgRam;
|
||||
uint32_t _prgSize;
|
||||
|
||||
public:
|
||||
Disassembler(uint8_t* internalRAM, uint8_t* prgROM, uint32_t prgSize);
|
||||
Disassembler(uint8_t* internalRam, uint8_t* prgRom, uint32_t prgSize, uint8_t* prgRam, uint32_t prgRamSize);
|
||||
~Disassembler();
|
||||
|
||||
uint32_t BuildCache(uint32_t absoluteAddr, uint16_t memoryAddr);
|
||||
string GetRAMCode();
|
||||
string GetCode(uint32_t startAddr, uint32_t endAddr, uint16_t &memoryAddr);
|
||||
uint32_t BuildCache(int32_t absoluteAddr, int32_t absoluteRamAddr, uint16_t memoryAddr, bool isSubEntryPoint);
|
||||
void InvalidateCache(uint16_t memoryAddr, int32_t absoluteRamAddr);
|
||||
|
||||
shared_ptr<DisassemblyInfo> GetDisassemblyInfo(uint32_t address);
|
||||
string GetCode(uint32_t startAddr, uint32_t endAddr, uint16_t memoryAddr, PrgMemoryType memoryType);
|
||||
|
||||
shared_ptr<DisassemblyInfo> GetDisassemblyInfo(int32_t absoluteAddress, int32_t absoluteRamAddress, uint16_t memoryAddress);
|
||||
};
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ void DisassemblyInfo::Initialize(uint32_t memoryAddr)
|
|||
output << DisassemblyInfo::OPName[opCode];
|
||||
if(opCode == 0x40 || opCode == 0x60) {
|
||||
//Make end of function/interrupt routines more obvious
|
||||
output << " ---------------------------";
|
||||
output << " ---->";
|
||||
}
|
||||
|
||||
if(DisassemblyInfo::OPName[opCode].empty()) {
|
||||
|
|
@ -103,15 +103,28 @@ void DisassemblyInfo::Initialize(uint32_t memoryAddr)
|
|||
break;
|
||||
}
|
||||
|
||||
if(_isSubEntryPoint) {
|
||||
output << " <----";
|
||||
}
|
||||
|
||||
_disassembly = output.str();
|
||||
}
|
||||
|
||||
DisassemblyInfo::DisassemblyInfo(uint8_t* opPointer)
|
||||
DisassemblyInfo::DisassemblyInfo(uint8_t* opPointer, bool isSubEntryPoint)
|
||||
{
|
||||
_opPointer = opPointer;
|
||||
_isSubEntryPoint = isSubEntryPoint;
|
||||
|
||||
Initialize();
|
||||
}
|
||||
|
||||
void DisassemblyInfo::SetSubEntryPoint()
|
||||
{
|
||||
if(!_isSubEntryPoint) {
|
||||
_isSubEntryPoint = true;
|
||||
Initialize();
|
||||
}
|
||||
}
|
||||
|
||||
string DisassemblyInfo::ToString(uint32_t memoryAddr)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ public:
|
|||
private:
|
||||
string _disassembly;
|
||||
uint8_t *_opPointer = nullptr;
|
||||
bool _isSubEntryPoint = false;
|
||||
uint32_t _opSize = 0;
|
||||
AddrMode _opMode;
|
||||
uint32_t _lastAddr = 0;
|
||||
|
|
@ -20,8 +21,9 @@ private:
|
|||
void Initialize(uint32_t memoryAddr = 0);
|
||||
|
||||
public:
|
||||
DisassemblyInfo(uint8_t* opPointer);
|
||||
DisassemblyInfo(uint8_t* opPointer, bool isSubEntryPoint);
|
||||
|
||||
void SetSubEntryPoint();
|
||||
string ToString(uint32_t memoryAddr);
|
||||
uint32_t GetSize();
|
||||
};
|
||||
|
|
|
|||
|
|
@ -3,10 +3,13 @@
|
|||
#include "DisassemblyInfo.h"
|
||||
#include "DebugState.h"
|
||||
|
||||
TraceLogger *TraceLogger::_instance = nullptr;
|
||||
|
||||
TraceLogger::TraceLogger(string outputFilepath, TraceLoggerOptions options)
|
||||
{
|
||||
_outputFile.open(outputFilepath, ios::out | ios::binary);
|
||||
_options = options;
|
||||
_instance = this;
|
||||
}
|
||||
|
||||
TraceLogger::~TraceLogger()
|
||||
|
|
@ -14,6 +17,17 @@ TraceLogger::~TraceLogger()
|
|||
if(_outputFile) {
|
||||
_outputFile.close();
|
||||
}
|
||||
|
||||
if(_instance == this) {
|
||||
_instance = nullptr;
|
||||
}
|
||||
}
|
||||
|
||||
void TraceLogger::LogStatic(string log)
|
||||
{
|
||||
if(_instance) {
|
||||
_instance->_outputFile << "--- " << log << " ---" << std::endl;
|
||||
}
|
||||
}
|
||||
|
||||
void TraceLogger::Log(DebugState &state, shared_ptr<DisassemblyInfo> disassemblyInfo)
|
||||
|
|
|
|||
|
|
@ -1,7 +1,8 @@
|
|||
#pragma once
|
||||
#include "stdafx.h"
|
||||
#include "DebugState.h"
|
||||
#include "DisassemblyInfo.h"
|
||||
|
||||
class DisassemblyInfo;
|
||||
struct DebugState;
|
||||
|
||||
struct TraceLoggerOptions
|
||||
{
|
||||
|
|
@ -11,6 +12,7 @@ struct TraceLoggerOptions
|
|||
class TraceLogger
|
||||
{
|
||||
private:
|
||||
static TraceLogger *_instance;
|
||||
TraceLoggerOptions _options;
|
||||
string _outputFilepath;
|
||||
ofstream _outputFile;
|
||||
|
|
@ -20,4 +22,6 @@ public:
|
|||
~TraceLogger();
|
||||
|
||||
void Log(DebugState &state, shared_ptr<DisassemblyInfo> disassemblyInfo);
|
||||
|
||||
static void LogStatic(string log);
|
||||
};
|
||||
Loading…
Add table
Reference in a new issue