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1d6253d2e5
Reads done by the code should return the values at the read address, rather than returning the vector register value (fixes Gradius/Contra 3 SA-1 romhacks that are known to work on hardware)
120 lines
2.7 KiB
C++
120 lines
2.7 KiB
C++
#include "stdafx.h"
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#include "../Utilities/Serializer.h"
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#include "CpuTypes.h"
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#include "Cpu.h"
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#include "Console.h"
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#include "MemoryManager.h"
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#include "DmaController.h"
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#include "EventType.h"
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#include "Cpu.Instructions.h"
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#include "Cpu.Shared.h"
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#ifndef DUMMYCPU
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Cpu::Cpu(Console *console)
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{
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_console = console;
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_memoryManager = console->GetMemoryManager().get();
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_dmaController = console->GetDmaController().get();
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}
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#endif
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Cpu::~Cpu()
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{
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}
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void Cpu::Exec()
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{
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_immediateMode = false;
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switch(_state.StopState) {
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case CpuStopState::Running: RunOp(); break;
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case CpuStopState::Stopped:
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//STP was executed, CPU no longer executes any code
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#ifndef DUMMYCPU
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_memoryManager->IncMasterClock4();
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#endif
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return;
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case CpuStopState::WaitingForIrq:
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//WAI
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Idle();
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if(_state.IrqSource || _state.NeedNmi) {
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Idle();
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Idle();
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_state.StopState = CpuStopState::Running;
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}
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break;
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}
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#ifndef DUMMYCPU
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//Use the state of the IRQ/NMI flags on the previous cycle to determine if an IRQ is processed or not
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if(_state.PrevNeedNmi) {
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_state.NeedNmi = false;
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uint32_t originalPc = GetProgramAddress(_state.PC);
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ProcessInterrupt(_state.EmulationMode ? Cpu::LegacyNmiVector : Cpu::NmiVector, true);
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_console->ProcessInterrupt<CpuType::Cpu>(originalPc, GetProgramAddress(_state.PC), true);
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} else if(_state.PrevIrqSource) {
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uint32_t originalPc = GetProgramAddress(_state.PC);
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ProcessInterrupt(_state.EmulationMode ? Cpu::LegacyIrqVector : Cpu::IrqVector, true);
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_console->ProcessInterrupt<CpuType::Cpu>(originalPc, GetProgramAddress(_state.PC), false);
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}
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#endif
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}
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void Cpu::Idle()
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{
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#ifndef DUMMYCPU
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_memoryManager->SetCpuSpeed(6);
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ProcessCpuCycle();
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_memoryManager->IncMasterClock6();
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UpdateIrqNmiFlags();
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#endif
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}
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void Cpu::IdleEndJump()
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{
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//Used by SA1
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}
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void Cpu::IdleTakeBranch()
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{
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//Used by SA1
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}
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void Cpu::ProcessCpuCycle()
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{
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_state.CycleCount++;
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DetectNmiSignalEdge();
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_state.IrqLock = _dmaController->ProcessPendingTransfers();
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}
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uint16_t Cpu::ReadVector(uint16_t vector)
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{
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//Overridden in SA-1 to return the correct value directly, rather than loading from ROM
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return ReadDataWord(vector);
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}
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uint16_t Cpu::GetResetVector()
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{
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return _memoryManager->PeekWord(Cpu::ResetVector);
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}
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#ifndef DUMMYCPU
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uint8_t Cpu::Read(uint32_t addr, MemoryOperationType type)
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{
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_memoryManager->SetCpuSpeed(_memoryManager->GetCpuSpeed(addr));
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ProcessCpuCycle();
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uint8_t value = _memoryManager->Read(addr, type);
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UpdateIrqNmiFlags();
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return value;
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}
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void Cpu::Write(uint32_t addr, uint8_t value, MemoryOperationType type)
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{
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_memoryManager->SetCpuSpeed(_memoryManager->GetCpuSpeed(addr));
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ProcessCpuCycle();
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_memoryManager->Write(addr, value, type);
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UpdateIrqNmiFlags();
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}
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#endif
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