From 705f27c026178c3cc9af1142fcbea2f686e034a5 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Tue, 18 Jan 2022 15:09:12 +0000 Subject: [PATCH 065/120] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to 100MHz Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but real-world tests on an assortment of GXL and GXM boards show noteable increases in throughput when max-frequency is 100MHz, so let's use it. Before results from a p231 device: Connecting to host 192.168.0.1, port 5201 Reverse mode, remote host 192.168.0.1 is sending [ 5] local 192.168.0.41 port 42550 connected to 192.168.0.1 port 5201 [ ID] Interval Transfer Bitrate [ 5] 0.00-1.00 sec 8.84 MBytes 74.2 Mbits/sec [ 5] 1.00-2.00 sec 9.60 MBytes 80.5 Mbits/sec [ 5] 2.00-3.00 sec 9.07 MBytes 76.1 Mbits/sec [ 5] 3.00-4.00 sec 9.14 MBytes 76.6 Mbits/sec [ 5] 4.00-5.00 sec 9.26 MBytes 77.7 Mbits/sec [ 5] 5.00-6.00 sec 9.08 MBytes 76.2 Mbits/sec [ 5] 6.00-7.00 sec 9.11 MBytes 76.4 Mbits/sec [ 5] 7.00-8.00 sec 8.65 MBytes 72.5 Mbits/sec [ 5] 8.00-9.00 sec 9.24 MBytes 77.5 Mbits/sec [ 5] 9.00-10.00 sec 8.57 MBytes 71.9 Mbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate Retr [ 5] 0.00-10.27 sec 94.1 MBytes 76.8 Mbits/sec 0 sender [ 5] 0.00-10.00 sec 90.6 MBytes 76.0 Mbits/sec receiver clock: 50000000 Hz actual clock: 50000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 2 (4 bits) timing spec: 2 (sd high-speed) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) After results from a p231 device: Connecting to host 192.168.0.1, port 5201 Reverse mode, remote host 192.168.0.1 is sending [ 5] local 192.168.0.41 port 58534 connected to 192.168.0.1 port 5201 [ ID] Interval Transfer Bitrate [ 5] 0.00-1.00 sec 12.6 MBytes 106 Mbits/sec [ 5] 1.00-2.00 sec 13.0 MBytes 109 Mbits/sec [ 5] 2.00-3.00 sec 12.8 MBytes 107 Mbits/sec [ 5] 3.00-4.00 sec 13.2 MBytes 111 Mbits/sec [ 5] 4.00-5.00 sec 12.4 MBytes 104 Mbits/sec [ 5] 5.00-6.00 sec 11.2 MBytes 93.9 Mbits/sec [ 5] 6.00-7.00 sec 12.3 MBytes 103 Mbits/sec [ 5] 7.00-8.00 sec 12.3 MBytes 103 Mbits/sec [ 5] 8.00-9.00 sec 12.5 MBytes 105 Mbits/sec [ 5] 9.00-10.00 sec 12.3 MBytes 103 Mbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate Retr [ 5] 0.00-10.22 sec 127 MBytes 104 Mbits/sec 0 sender [ 5] 0.00-10.00 sec 125 MBytes 105 Mbits/sec receiver clock: 100000000 Hz actual clock: 100000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 2 (4 bits) timing spec: 6 (sd uhs SDR104) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) Signed-off-by: Christian Hewitt --- arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 2 +- arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi index dafc841f7c16..8d315508360d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi @@ -259,7 +259,7 @@ &sd_emmc_a { bus-width = <4>; cap-sd-highspeed; - max-frequency = <50000000>; + max-frequency = <100000000>; non-removable; disable-wp; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi index a150cc0e18ff..b3d7b8613d6d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi @@ -121,7 +121,7 @@ &sd_emmc_a { bus-width = <4>; cap-sd-highspeed; - max-frequency = <50000000>; + max-frequency = <100000000>; non-removable; disable-wp; -- 2.34.1