/* Capstone Disassembly Engine, https://www.capstone-engine.org */
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
/*    Rot127 <unisono@quyllur.org> 2022-2024 */
/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */

/* LLVM-commit: <commit> */
/* LLVM-tag: <tag> */

/* Do not edit. */

/* Capstone's LLVM TableGen Backends: */
/* https://github.com/capstone-engine/llvm-capstone */

  Mips_OP_GROUP_Operand = 0,
  Mips_OP_GROUP_BranchOperand = 1,
  Mips_OP_GROUP_UImm_1_0 = 2,
  Mips_OP_GROUP_UImm_2_0 = 3,
  Mips_OP_GROUP_JumpOperand = 4,
  Mips_OP_GROUP_MemOperand = 5,
  Mips_OP_GROUP_RegisterList = 6,
  Mips_OP_GROUP_UImm_3_0 = 7,
  Mips_OP_GROUP_PCRel = 8,
  Mips_OP_GROUP_UImm_32_0 = 9,
  Mips_OP_GROUP_UImm_16_0 = 10,
  Mips_OP_GROUP_UImm_8_0 = 11,
  Mips_OP_GROUP_UImm_5_0 = 12,
  Mips_OP_GROUP_Hi20PCRel = 13,
  Mips_OP_GROUP_MemOperandEA = 14,
  Mips_OP_GROUP_UImm_6_0 = 15,
  Mips_OP_GROUP_UImm_4_0 = 16,
  Mips_OP_GROUP_UImm_7_0 = 17,
  Mips_OP_GROUP_UImm_10_0 = 18,
  Mips_OP_GROUP_UImm_6_1 = 19,
  Mips_OP_GROUP_UImm_5_1 = 20,
  Mips_OP_GROUP_UImm_5_33 = 21,
  Mips_OP_GROUP_UImm_5_32 = 22,
  Mips_OP_GROUP_UImm_6_2 = 23,
  Mips_OP_GROUP_UImm_2_1 = 24,
  Mips_OP_GROUP_FCCOperand = 25,
  Mips_OP_GROUP_UImm_0_0 = 26,
  Mips_OP_GROUP_UImm_26_0 = 27,
  Mips_OP_GROUP_Hi20 = 28,
  Mips_OP_GROUP_NanoMipsRegisterList = 29,
  Mips_OP_GROUP_UImm_12_0 = 30,
  Mips_OP_GROUP_UImm_20_0 = 31,