3 commits

Author	SHA1	Message	Date
steve	9ad4aad566	o memory ... - refinements - added white-box testing o cpu - moved cpu definitions into its own package - no longer requires csv file at run time - csv parser moved into a code generator, embedding the data into the code - needs refinement	2020-01-05 18:58:25 +00:00
steve	8a031dec2f	o cpu now yields after every cycle not every instruction ... - StepCycle to be be used if cycle level of granularity is required - StepInstruction provided if coarser control is preferred - definitions.csv corrected - behaviour of status register ToUint8() corrected o memory - MockMem now inherits from main memory implementation and adds functionality where required	2020-01-05 18:58:25 +00:00
steve	4c530bf7a7	o initial commit ... - 6502 implementation is basically correct but does not handle - interrupts - pre-fetch cycle - anything less fine grained than instruction stepping - memory sub-system sketched in o retroactive adding of GPL copyright notice	2020-01-05 18:58:12 +00:00