mirror of
https://github.com/google0101-ryan/Emotional.git
synced 2024-06-23 14:43:20 -04:00
Added all-asm JIT dispatcher, runs at ~140fps now
This commit is contained in:
Your Name
parent
eece745982
commit
a20304b733
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@ -11,6 +11,7 @@ set(SOURCES src/main.cpp
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src/emu/cpu/ee/EmotionEngine.cpp
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src/emu/cpu/ee/dmac.cpp
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src/emu/cpu/ee/vu.cpp
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src/emu/cpu/ee/vif.cpp
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src/emu/cpu/ee/x64/reg_alloc.cpp
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src/emu/cpu/ee/x64/emit.cpp
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src/emu/sched/scheduler.cpp
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@ -27,7 +28,7 @@ set(TARGET_NAME ps2)
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if(MSVC)
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target_compile_options(${TARGET_NAME} PRIVATE /W4 /WX)
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else()
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target_compile_options(${TARGET_NAME} PRIVATE -pg)
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target_compile_options(${TARGET_NAME} PRIVATE -pg -O0 -mincoming-stack-boundary=3)
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target_link_options(${TARGET_NAME} PRIVATE -pg)
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endif()
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@ -5,13 +5,39 @@
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#include <emu/memory/Bus.h>
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#include <emu/cpu/ee/EmotionEngine.h>
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#include <emu/sched/scheduler.h>
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#include <emu/cpu/ee/vu.h>
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Scheduler::Event vsync_event;
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#include <chrono>
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#include <iostream>
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std::chrono::steady_clock::time_point first_tp;
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unsigned long frame_count = 0;
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std::chrono::duration<double> uptime()
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{
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if (first_tp == std::chrono::steady_clock::time_point{})
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return std::chrono::duration<double>{0};
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return std::chrono::steady_clock::now() - first_tp;
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}
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double fps()
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{
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const double uptime_sec = uptime().count();
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if (uptime_sec == 0)
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return 0;
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return frame_count / uptime_sec;
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}
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void HandleVsync()
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{
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printf("Vsync\n");
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// printf("FPS: %f\n", fps());
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Scheduler::ScheduleEvent(vsync_event);
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frame_count++;
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}
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void System::LoadBios(std::string biosName)
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@ -47,19 +73,18 @@ void System::Reset()
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vsync_event.name = "VSYNC handler";
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vsync_event.cycles_from_now = 4920115;
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Scheduler::ScheduleEvent(vsync_event);
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first_tp = std::chrono::steady_clock::now();
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}
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void System::Run()
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{
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while (1)
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{
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int cycles = EmotionEngine::Clock();
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Scheduler::CheckScheduler(cycles);
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}
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EmotionEngine::Clock();
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}
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void System::Dump()
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{
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EmotionEngine::Dump();
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Bus::Dump();
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VectorUnit::Dump();
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}
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@ -282,7 +282,7 @@ void JIT::EmitCOP0(uint32_t instr, EE_JIT::IRInstruction &i)
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// printf("tlbwi\n");
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break;
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default:
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printf("[emu/CPU]: Cannot emit unknown cop0 instruction 0x%02x\n", op);
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// printf("[emu/CPU]: Cannot emit unknown cop0 instruction 0x%02x\n", op);
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exit(1);
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}
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}
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@ -353,6 +353,48 @@ void JIT::EmitDADDIU(uint32_t instr, EE_JIT::IRInstruction &i)
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cur_block->ir.push_back(i);
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}
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void JIT::EmitLDL(uint32_t instr, EE_JIT::IRInstruction &i)
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{
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int _rt = (instr >> 16) & 0x1F;
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int _base = (instr >> 21) & 0x1F;
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int32_t _offset = (int16_t)(instr & 0xffff);
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// printf("ldl %s, %d(%s)\n", EmotionEngine::Reg(_rt), _offset, EmotionEngine::Reg(_base));
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IRValue base = IRValue(IRValue::Reg);
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IRValue rt = IRValue(IRValue::Reg);
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IRValue offset = IRValue(IRValue::Imm);
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base.SetReg(_base);
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rt.SetReg(_rt);
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offset.SetImm(_offset);
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i = IRInstruction::Build({rt, offset, base}, IRInstrs::LDL);
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cur_block->ir.push_back(i);
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}
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void JIT::EmitLDR(uint32_t instr, EE_JIT::IRInstruction &i)
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{
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int _rt = (instr >> 16) & 0x1F;
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int _base = (instr >> 21) & 0x1F;
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int32_t _offset = (int16_t)(instr & 0xffff);
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// printf("ldr %s, %d(%s)\n", EmotionEngine::Reg(_rt), _offset, EmotionEngine::Reg(_base));
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IRValue base = IRValue(IRValue::Reg);
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IRValue rt = IRValue(IRValue::Reg);
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IRValue offset = IRValue(IRValue::Imm);
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base.SetReg(_base);
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rt.SetReg(_rt);
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offset.SetImm(_offset);
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i = IRInstruction::Build({rt, offset, base}, IRInstrs::LDR);
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cur_block->ir.push_back(i);
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}
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void JIT::EmitLQ(uint32_t instr, EE_JIT::IRInstruction &i)
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{
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int _rt = (instr >> 16) & 0x1F;
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@ -513,6 +555,29 @@ void JIT::EmitLHU(uint32_t instr, EE_JIT::IRInstruction &i)
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cur_block->ir.push_back(i);
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}
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void JIT::EmitLWU(uint32_t instr, EE_JIT::IRInstruction &i)
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{
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int _rt = (instr >> 16) & 0x1F;
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int _base = (instr >> 21) & 0x1F;
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int32_t _offset = (int16_t)(instr & 0xffff);
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// printf("lwu %s, %d(%s)\n", EmotionEngine::Reg(_rt), _offset, EmotionEngine::Reg(_base));
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IRValue base = IRValue(IRValue::Reg);
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IRValue rt = IRValue(IRValue::Reg);
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IRValue offset = IRValue(IRValue::Imm);
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base.SetReg(_base);
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rt.SetReg(_rt);
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offset.SetImm(_offset);
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i = IRInstruction::Build({rt, offset, base}, IRInstrs::MemoryLoad);
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i.access_size = IRInstruction::U32;
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i.is_unsigned = true;
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cur_block->ir.push_back(i);
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}
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void JIT::EmitSB(uint32_t instr, EE_JIT::IRInstruction &i)
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{
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int _rt = (instr >> 16) & 0x1F;
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@ -575,10 +640,53 @@ void JIT::EmitSW(uint32_t instr, EE_JIT::IRInstruction &i)
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i = IRInstruction::Build({rt, offset, base}, IRInstrs::MemoryStore);
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i.access_size = IRInstruction::U32;
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i.is_unsigned = false;
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cur_block->ir.push_back(i);
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}
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void JIT::EmitSDL(uint32_t instr, EE_JIT::IRInstruction &i)
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{
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int _rt = (instr >> 16) & 0x1F;
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int _base = (instr >> 21) & 0x1F;
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int32_t _offset = (int16_t)(instr & 0xffff);
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// printf("sdl %s, %d(%s)\n", EmotionEngine::Reg(_rt), _offset, EmotionEngine::Reg(_base));
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IRValue base = IRValue(IRValue::Reg);
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IRValue rt = IRValue(IRValue::Reg);
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IRValue offset = IRValue(IRValue::Imm);
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base.SetReg(_base);
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rt.SetReg(_rt);
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offset.SetImm(_offset);
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i = IRInstruction::Build({rt, offset, base}, IRInstrs::SDL);
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cur_block->ir.push_back(i);
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}
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void JIT::EmitSDR(uint32_t instr, EE_JIT::IRInstruction &i)
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{
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int _rt = (instr >> 16) & 0x1F;
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int _base = (instr >> 21) & 0x1F;
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int32_t _offset = (int16_t)(instr & 0xffff);
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// printf("sdr %s, %d(%s)\n", EmotionEngine::Reg(_rt), _offset, EmotionEngine::Reg(_base));
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IRValue base = IRValue(IRValue::Reg);
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IRValue rt = IRValue(IRValue::Reg);
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IRValue offset = IRValue(IRValue::Imm);
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base.SetReg(_base);
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rt.SetReg(_rt);
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offset.SetImm(_offset);
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i = IRInstruction::Build({rt, offset, base}, IRInstrs::SDR);
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cur_block->ir.push_back(i);
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}
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void JIT::EmitLD(uint32_t instr, EE_JIT::IRInstruction &i)
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{
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int _rt = (instr >> 16) & 0x1F;
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@ -1487,7 +1595,7 @@ void JIT::EmitIR(uint32_t instr)
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EmitDSRA32(instr, current_instruction);
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break;
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default:
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printf("[emu/CPU]: Cannot emit unknown special instruction 0x%02x\n", opcode);
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// printf("[emu/CPU]: Cannot emit unknown special instruction 0x%02x\n", opcode);
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cur_block->ir.clear();
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delete cur_block;
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exit(1);
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@ -1506,7 +1614,7 @@ void JIT::EmitIR(uint32_t instr)
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EmitBGEZ(instr, current_instruction);
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break;
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default:
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printf("Unknown regimm opcode 0x%02x\n", opcode);
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// printf("Unknown regimm opcode 0x%02x\n", opcode);
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exit(1);
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}
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break;
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@ -1553,6 +1661,17 @@ void JIT::EmitIR(uint32_t instr)
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case 0x10:
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EmitCOP0(instr, current_instruction);
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break;
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case 0x11:
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{
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opcode = (instr >> 21) & 0x1F;
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switch (opcode)
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{
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default:
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printf("[emu/EE]: Ignoring COP1 command 0x%08x\n", instr);
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break;
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}
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break;
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}
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case 0x12:
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{
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opcode = (instr >> 21) & 0x1F;
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@ -1600,6 +1719,12 @@ void JIT::EmitIR(uint32_t instr)
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case 0x19:
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EmitDADDIU(instr, current_instruction);
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break;
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case 0x1A:
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EmitLDL(instr, current_instruction);
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break;
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case 0x1B:
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EmitLDR(instr, current_instruction);
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break;
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case 0x1C:
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{
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opcode = instr & 0x3F;
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@ -1658,6 +1783,9 @@ void JIT::EmitIR(uint32_t instr)
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case 0x25:
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EmitLHU(instr, current_instruction);
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break;
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case 0x27:
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EmitLWU(instr, current_instruction);
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break;
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case 0x28:
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EmitSB(instr, current_instruction);
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break;
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@ -1667,6 +1795,12 @@ void JIT::EmitIR(uint32_t instr)
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case 0x2b:
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EmitSW(instr, current_instruction);
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break;
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case 0x2c:
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EmitSDL(instr, current_instruction);
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break;
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case 0x2d:
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EmitSDR(instr, current_instruction);
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break;
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case 0x2f:
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// printf("cache\n");
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break;
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@ -1692,22 +1826,18 @@ void JIT::EmitPrequel(uint32_t guest_start)
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cur_block = new Block;
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cur_block->guest_addr = guest_start;
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cur_block->entry = (uint8_t*)emit->GetFreeBase();
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auto i = IRInstruction::Build({}, IRInstrs::SaveHostRegs);
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cur_block->ir.push_back(i);
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}
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JIT::EntryFunc JIT::EmitDone(size_t cycles_taken)
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{
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// printf("Done.\n");
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IRValue cycles = IRValue(IRValue::Imm);
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cycles.SetImm32Unsigned(cycles_taken);
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auto i = IRInstruction::Build({cycles}, IRInstrs::UpdateCopCount);
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cur_block->ir.push_back(i);
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i = IRInstruction::Build({}, IRInstrs::RestoreHostRegs);
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cur_block->ir.push_back(i);
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blockCache[cur_block->guest_addr] = cur_block;
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EE_JIT::emit->TranslateBlock(cur_block);
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@ -1718,6 +1848,12 @@ JIT::EntryFunc JIT::EmitDone(size_t cycles_taken)
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Block* JIT::GetExistingBlock(uint32_t start)
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{
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if (!blockCache[start])
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{
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// printf("ERROR: Block doesn't exist at 0x%08x\n", start);
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exit(1);
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}
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return blockCache[start];
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}
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@ -1741,7 +1877,7 @@ void JIT::MarkDirty(uint32_t address, uint32_t size)
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{
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for (auto i = address; i < address+size; i++)
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{
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if (blockCache[i])
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if (blockCache.find(size) != blockCache.end())
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{
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delete blockCache[i];
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blockCache[i] = nullptr;
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@ -1799,73 +1935,92 @@ bool IsBranch(uint32_t instr)
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default:
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return false;
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}
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return false;
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}
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EE_JIT::JIT::EntryFunc EmitDone(int cycles_taken)
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{
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return jit.EmitDone(cycles_taken);
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}
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EE_JIT::JIT::EntryFunc GetExistingBlockFunc(uint32_t addr)
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{
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return (EE_JIT::JIT::EntryFunc)jit.GetExistingBlock(addr)->entry;
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}
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uint64_t GetExistingBlockCycles(uint32_t addr)
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{
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return jit.GetExistingBlock(addr)->cycles;
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}
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#define BLOCKCACHE_ENABLE
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int Clock()
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{
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jit.CheckCacheFull();
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// jit.CheckCacheFull();
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#ifdef BLOCKCACHE_ENABLE
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if (!jit.DoesBlockExist(state.pc))
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{
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#endif
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jit.EmitPrequel(state.pc);
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// #ifdef BLOCKCACHE_ENABLE
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// if (!jit.DoesBlockExist(state.pc))
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// {
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// #endif
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// jit.EmitPrequel(state.pc);
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bool isBranch = false;
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bool isBranchDelayed = false;
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// bool isBranch = false;
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// bool isBranchDelayed = false;
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uint32_t pc = state.pc;
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uint32_t next_pc = state.next_pc;
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// uint32_t pc = state.pc;
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// uint32_t next_pc = state.next_pc;
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int cycles = 0;
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int instrs_emitted = 0;
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// int cycles = 0;
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// int instrs_emitted = 0;
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do
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{
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instrs_emitted++;
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uint32_t instr = Bus::Read32(pc);
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pc = next_pc;
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next_pc += 4;
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// do
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// {
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// instrs_emitted++;
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// uint32_t instr = Bus::Read32(pc);
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// pc = next_pc;
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// next_pc += 4;
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state.pc_at = pc - 4;
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// state.pc_at = pc - 4;
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// printf("0x%08x (0x%08x): ", pc - 4, instr);
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// // printf("0x%08x (0x%08x): ", pc - 4, instr);
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jit.EmitIR(instr);
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// jit.EmitIR(instr);
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isBranch = isBranchDelayed;
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isBranchDelayed = IsBranch(instr);
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// isBranch = isBranchDelayed;
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// isBranchDelayed = IsBranch(instr);
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if (instrs_emitted == 20 && !isBranchDelayed)
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break;
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// if (instrs_emitted == 20 && !isBranchDelayed)
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// break;
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cycles += 2;
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} while (!isBranch);
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// cycles += 1;
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// } while (!isBranch);
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auto func = jit.EmitDone(cycles);
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func();
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// auto func = jit.EmitDone(cycles);
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// func();
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return cycles;
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#ifdef BLOCKCACHE_ENABLE
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}
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else
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{
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auto b = jit.GetExistingBlock(state.pc);
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// return cycles;
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// #ifdef BLOCKCACHE_ENABLE
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// }
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// else
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// {
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// auto b = jit.GetExistingBlock(state.pc);
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if (!b)
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{
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printf("Something has gone seriously wrong!\n");
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exit(1);
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}
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// if (!b)
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// {
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// // printf("Something has gone seriously wrong!\n");
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// exit(1);
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// }
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auto func = (EE_JIT::JIT::EntryFunc)b->entry;
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func();
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// auto func = (EE_JIT::JIT::EntryFunc)b->entry;
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// func();
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return b->cycles;
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}
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#endif
|
||||
// return b->cycles;
|
||||
// }
|
||||
// #endif
|
||||
|
||||
EE_JIT::emit->EnterDispatcher();
|
||||
}
|
||||
|
||||
void Dump()
|
||||
|
|
@ -1890,4 +2045,21 @@ void MarkDirty(uint32_t address, uint32_t size)
|
|||
jit.MarkDirty(address, size);
|
||||
}
|
||||
|
||||
void EmitPrequel()
|
||||
{
|
||||
jit.EmitPrequel(state.pc);
|
||||
}
|
||||
|
||||
void CheckCacheFull()
|
||||
{
|
||||
jit.CheckCacheFull();
|
||||
}
|
||||
bool DoesBlockExit(uint32_t addr)
|
||||
{
|
||||
return jit.DoesBlockExist(addr);
|
||||
}
|
||||
void EmitIR(uint32_t instr)
|
||||
{
|
||||
jit.EmitIR(instr);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -42,6 +42,10 @@ enum IRInstrs
|
|||
UpdateCopCount = 26,
|
||||
POR = 27,
|
||||
NOR = 28,
|
||||
LDL = 29,
|
||||
LDR = 30,
|
||||
SDL = 31,
|
||||
SDR = 32,
|
||||
};
|
||||
|
||||
struct IRValue
|
||||
|
|
@ -179,6 +183,8 @@ private:
|
|||
void EmitBEQL(uint32_t instr, EE_JIT::IRInstruction& i); // 0x14
|
||||
void EmitBNEL(uint32_t instr, EE_JIT::IRInstruction& i); // 0x15
|
||||
void EmitDADDIU(uint32_t instr, EE_JIT::IRInstruction& i); // 0x19
|
||||
void EmitLDL(uint32_t instr, EE_JIT::IRInstruction& i); // 0x1a
|
||||
void EmitLDR(uint32_t instr, EE_JIT::IRInstruction& i); // 0x1b
|
||||
void EmitLQ(uint32_t instr, EE_JIT::IRInstruction& i); // 0x1f
|
||||
void EmitSQ(uint32_t instr, EE_JIT::IRInstruction& i); // 0x1f
|
||||
void EmitLB(uint32_t instr, EE_JIT::IRInstruction& i); // 0x20
|
||||
|
|
@ -186,9 +192,12 @@ private:
|
|||
void EmitLW(uint32_t instr, EE_JIT::IRInstruction& i); // 0x23
|
||||
void EmitLBU(uint32_t instr, EE_JIT::IRInstruction& i); // 0x24
|
||||
void EmitLHU(uint32_t instr, EE_JIT::IRInstruction& i); // 0x25
|
||||
void EmitLWU(uint32_t instr, EE_JIT::IRInstruction& i); // 0x27
|
||||
void EmitSB(uint32_t instr, EE_JIT::IRInstruction& i); // 0x28
|
||||
void EmitSH(uint32_t instr, EE_JIT::IRInstruction& i); // 0x29
|
||||
void EmitSW(uint32_t instr, EE_JIT::IRInstruction& i); // 0x2B
|
||||
void EmitSDL(uint32_t instr, EE_JIT::IRInstruction& i); // 0x2C
|
||||
void EmitSDR(uint32_t instr, EE_JIT::IRInstruction& i); // 0x2D
|
||||
void EmitLD(uint32_t instr, EE_JIT::IRInstruction& i); // 0x37
|
||||
void EmitSWC1(uint32_t instr, EE_JIT::IRInstruction& i); // 0x39
|
||||
void EmitSD(uint32_t instr, EE_JIT::IRInstruction& i); // 0x3f
|
||||
|
|
@ -280,6 +289,15 @@ int Clock();
|
|||
void Dump();
|
||||
ProcessorState* GetState();
|
||||
void MarkDirty(uint32_t address, uint32_t size);
|
||||
void EmitPrequel();
|
||||
|
||||
void CheckCacheFull();
|
||||
bool DoesBlockExit(uint32_t addr);
|
||||
void EmitIR(uint32_t instr);
|
||||
bool IsBranch(uint32_t instr);
|
||||
EE_JIT::JIT::EntryFunc EmitDone(int cycles_taken);
|
||||
EE_JIT::JIT::EntryFunc GetExistingBlockFunc(uint32_t addr);
|
||||
uint64_t GetExistingBlockCycles(uint32_t addr);
|
||||
|
||||
inline const char* Reg(int index)
|
||||
{
|
||||
|
|
|
|||
153
src/emu/cpu/ee/vif.cpp
Normal file
153
src/emu/cpu/ee/vif.cpp
Normal file
|
|
@ -0,0 +1,153 @@
|
|||
#include "vif.h"
|
||||
|
||||
#include <cstdio>
|
||||
#include <cstdlib>
|
||||
#include <queue>
|
||||
#include <emu/sched/scheduler.h>
|
||||
|
||||
bool vif1_event_scheduled = false;
|
||||
bool vif0_event_scheduled = false;
|
||||
|
||||
void VIF::WriteFBRST(int vif_num, uint32_t data)
|
||||
{
|
||||
if (data & 1)
|
||||
{
|
||||
printf("[emu/VIF%d]: Reset\n", vif_num);
|
||||
}
|
||||
}
|
||||
|
||||
void VIF::WriteMASK(int vif_num, uint32_t data)
|
||||
{
|
||||
}
|
||||
|
||||
std::queue<uint32_t> vif1_fifo, vif0_fifo;
|
||||
|
||||
struct VIF_DATA
|
||||
{
|
||||
uint16_t cycle;
|
||||
uint16_t mask;
|
||||
uint16_t mode;
|
||||
uint16_t itop;
|
||||
} vif1, vif0;
|
||||
|
||||
void HandleVIF1Data()
|
||||
{
|
||||
uint32_t data = vif1_fifo.front();
|
||||
vif1_fifo.pop();
|
||||
|
||||
uint8_t cmd = (data >> 24) & 0xff;
|
||||
uint16_t imm = data & 0xffff;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case 0x01:
|
||||
printf("[emu/VIF1]: STCYCL 0x%04x\n", imm);
|
||||
vif1.cycle = imm;
|
||||
break;
|
||||
default:
|
||||
printf("[emu/VIF1]: Unknown CMD 0x%02x\n", cmd);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
if (!vif1_fifo.empty())
|
||||
{
|
||||
Scheduler::Event event;
|
||||
event.cycles_from_now = 2;
|
||||
event.func = HandleVIF1Data;
|
||||
event.name = "VIF1 Data Handler";
|
||||
}
|
||||
else
|
||||
vif1_event_scheduled = false;
|
||||
}
|
||||
|
||||
void VIF::WriteVIF1FIFO(uint128_t data)
|
||||
{
|
||||
for (int i = 0; i < 4; i++)
|
||||
{
|
||||
vif1_fifo.push(data.u32[i]);
|
||||
}
|
||||
|
||||
if (!vif1_event_scheduled)
|
||||
{
|
||||
Scheduler::Event event;
|
||||
// Most of these events should be handled ASAP
|
||||
event.cycles_from_now = 0;
|
||||
event.func = HandleVIF1Data;
|
||||
event.name = "VIF1 Data Handler";
|
||||
|
||||
Scheduler::ScheduleEvent(event);
|
||||
vif1_event_scheduled = true;
|
||||
}
|
||||
}
|
||||
|
||||
void HandleVIF0Data()
|
||||
{
|
||||
uint32_t data = vif0_fifo.front();
|
||||
vif0_fifo.pop();
|
||||
|
||||
uint8_t cmd = (data >> 24) & 0xff;
|
||||
uint16_t imm = data & 0xffff;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case 0x00:
|
||||
printf("[emu/VIF0]: NOP\n");
|
||||
break;
|
||||
case 0x01:
|
||||
printf("[emu/VIF0]: STCYCL 0x%04x\n", imm);
|
||||
vif0.cycle = imm;
|
||||
break;
|
||||
case 0x04:
|
||||
printf("[emu/VIF0]: ITOP 0x%04x\n", imm);
|
||||
vif0.itop = imm;
|
||||
break;
|
||||
case 0x05:
|
||||
printf("[emu/VIF0]: STMOD 0x%04x\n", imm);
|
||||
vif0.mode = imm;
|
||||
break;
|
||||
case 0x20:
|
||||
printf("[emu/VIF0]: STMASK 0x%04x\n", imm);
|
||||
vif0.mask = imm;
|
||||
break;
|
||||
default:
|
||||
printf("[emu/VIF0]: Unknown CMD 0x%02x\n", cmd);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
if (!vif0_fifo.empty())
|
||||
{
|
||||
Scheduler::Event event;
|
||||
event.cycles_from_now = 2;
|
||||
event.func = HandleVIF0Data;
|
||||
event.name = "VIF0 Data Handler";
|
||||
|
||||
Scheduler::ScheduleEvent(event);
|
||||
vif0_event_scheduled = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
vif0_event_scheduled = false;
|
||||
}
|
||||
}
|
||||
|
||||
void VIF::WriteVIF0FIFO(uint128_t data)
|
||||
{
|
||||
|
||||
for (int i = 0; i < 4; i++)
|
||||
{
|
||||
printf("[emu/VIF0]: Adding 0x%08x to VIF0 FIFO\n", data.u32[i]);
|
||||
vif0_fifo.push(data.u32[i]);
|
||||
}
|
||||
|
||||
if (!vif0_event_scheduled)
|
||||
{
|
||||
Scheduler::Event event;
|
||||
// Most of these events should be handled ASAP
|
||||
event.cycles_from_now = 0;
|
||||
event.func = HandleVIF0Data;
|
||||
event.name = "VIF0 Data Handler";
|
||||
|
||||
Scheduler::ScheduleEvent(event);
|
||||
vif0_event_scheduled = true;
|
||||
}
|
||||
}
|
||||
15
src/emu/cpu/ee/vif.h
Normal file
15
src/emu/cpu/ee/vif.h
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
#pragma once
|
||||
|
||||
#include <cstdint>
|
||||
#include <util/uint128.h>
|
||||
|
||||
namespace VIF
|
||||
{
|
||||
|
||||
void WriteFBRST(int vif_num, uint32_t data);
|
||||
void WriteMASK(int vif_num, uint32_t data);
|
||||
|
||||
void WriteVIF1FIFO(uint128_t data);
|
||||
void WriteVIF0FIFO(uint128_t data);
|
||||
|
||||
}
|
||||
|
|
@ -1,4 +1,5 @@
|
|||
#include "vu.h"
|
||||
#include <fstream>
|
||||
|
||||
namespace VectorUnit
|
||||
{
|
||||
|
|
@ -9,7 +10,7 @@ uint32_t code_address_mask[2] = {0xfff, 0x3fff};
|
|||
uint8_t data[2][0x4000];
|
||||
uint8_t code[2][0x4000];
|
||||
|
||||
void WriteDataMem128(int vector, uint32_t addr, uint128_t data)
|
||||
void WriteDataMem128(int vector, uint32_t addr, uint128_t _data)
|
||||
{
|
||||
if (vector == 1)
|
||||
addr = (addr - 0x1100C000);
|
||||
|
|
@ -18,7 +19,47 @@ void WriteDataMem128(int vector, uint32_t addr, uint128_t data)
|
|||
|
||||
addr &= data_address_mask[vector];
|
||||
|
||||
*(uint128_t*)&data[vector][addr] = _data;
|
||||
}
|
||||
|
||||
void WriteCodeMem128(int vector, uint32_t addr, uint128_t data)
|
||||
{
|
||||
if (vector == 1)
|
||||
addr = (addr - 0x11008000);
|
||||
else
|
||||
addr = (addr - 0x11000000);
|
||||
|
||||
addr &= code_address_mask[vector];
|
||||
|
||||
*(uint128_t*)&code[vector][addr] = data;
|
||||
}
|
||||
|
||||
void WriteCodeMem64(int vector, uint32_t addr, uint64_t data)
|
||||
{
|
||||
if (vector == 1)
|
||||
addr = (addr - 0x11008000);
|
||||
else
|
||||
addr = (addr - 0x11000000);
|
||||
|
||||
addr &= code_address_mask[vector];
|
||||
|
||||
*(uint64_t*)&code[vector][addr] = data;
|
||||
}
|
||||
|
||||
void Dump()
|
||||
{
|
||||
std::ofstream out_file("vu0_code.bin");
|
||||
|
||||
for (int i = 0; i < 0x4000; i++)
|
||||
{
|
||||
out_file << code[0][i];
|
||||
}
|
||||
|
||||
out_file.close();
|
||||
out_file.open("vu1_code.bin");
|
||||
for (int i = 0; i < 0x4000; i++)
|
||||
{
|
||||
out_file << code[1][i];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -8,4 +8,16 @@ namespace VectorUnit
|
|||
|
||||
void WriteDataMem128(int vector, uint32_t addr, uint128_t data);
|
||||
|
||||
void WriteCodeMem128(int vector, uint32_t addr, uint128_t data);
|
||||
void WriteCodeMem64(int vector, uint32_t addr, uint64_t data);
|
||||
|
||||
void Dump();
|
||||
|
||||
namespace VU0
|
||||
{
|
||||
|
||||
// VU0 specific stuff, like COP2 opcodes
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -5,6 +5,7 @@
|
|||
#include <sys/mman.h>
|
||||
#include <emu/cpu/ee/EmotionEngine.h>
|
||||
#include <emu/memory/Bus.h>
|
||||
#include <emu/sched/scheduler.h>
|
||||
#include <fstream>
|
||||
#include <cassert>
|
||||
|
||||
|
|
@ -202,7 +203,7 @@ void EE_JIT::Emitter::EmitBC(IRInstruction i)
|
|||
// cg->add(cg->dword[next_pc], 4);
|
||||
reg_alloc->Reset();
|
||||
EmitIncPC(i);
|
||||
EmitRestoreHostRegs();
|
||||
cg->ret();
|
||||
}
|
||||
|
||||
cg->L(end);
|
||||
|
|
@ -1183,6 +1184,136 @@ EE_JIT::Emitter::Emitter()
|
|||
cg = new Xbyak::CodeGenerator(0xffffff, (void*)base);
|
||||
reg_alloc = new RegisterAllocator();
|
||||
reg_alloc->Reset();
|
||||
|
||||
reg_alloc->MarkRegUsed(RegisterAllocator::RDI);
|
||||
reg_alloc->MarkRegUsed(RegisterAllocator::RAX);
|
||||
|
||||
Xbyak::Reg64 func_ptr = Xbyak::Reg64(reg_alloc->AllocHostRegister());
|
||||
Xbyak::Reg32 next_pc = Xbyak::Reg32(reg_alloc->AllocHostRegister());
|
||||
Xbyak::Reg32 pc = Xbyak::Reg32(reg_alloc->AllocHostRegister());
|
||||
Xbyak::Reg32 isBranchDelayed = Xbyak::Reg32(reg_alloc->AllocHostRegister());
|
||||
|
||||
cg->endbr64();
|
||||
EmitSaveHostRegs();
|
||||
|
||||
// RSP + 0: pc
|
||||
// RSP + 4: next_pc
|
||||
// RSP + 8: isBranch
|
||||
// RSP + 16: isBranchDelayed
|
||||
// RSP + 20: instrs_emitted
|
||||
// RSP + 24 .. RSP + 32: Wasted space for alignment reasons
|
||||
cg->sub(cg->rsp, 32);
|
||||
|
||||
cg->mov(cg->dword[cg->rsp + 0], 0);
|
||||
cg->mov(cg->dword[cg->rsp + 4], 0);
|
||||
cg->mov(cg->dword[cg->rsp + 8], 0);
|
||||
cg->mov(cg->dword[cg->rsp + 16], 0);
|
||||
cg->mov(cg->dword[cg->rsp + 20], 0);
|
||||
cg->mov(cg->dword[cg->rsp + 24], 0);
|
||||
|
||||
Xbyak::Label begin;
|
||||
cg->L(begin);
|
||||
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(EmotionEngine::CheckCacheFull));
|
||||
cg->call(func_ptr);
|
||||
|
||||
auto next_pc_off = (offsetof(EmotionEngine::ProcessorState, next_pc));
|
||||
auto pc_off = (offsetof(EmotionEngine::ProcessorState, pc));
|
||||
|
||||
cg->mov(next_pc, cg->dword[cg->rbp + next_pc_off]);
|
||||
cg->mov(pc, cg->dword[cg->rbp + pc_off]);
|
||||
|
||||
cg->mov(cg->dword[cg->rsp], pc);
|
||||
cg->mov(cg->dword[cg->rsp + 4], next_pc);
|
||||
|
||||
cg->mov(cg->edi, cg->dword[cg->rsp]);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(EmotionEngine::DoesBlockExit));
|
||||
cg->call(func_ptr);
|
||||
|
||||
cg->test(cg->al, cg->al);
|
||||
|
||||
Xbyak::Label block;
|
||||
cg->jne(block, Xbyak::CodeGenerator::T_NEAR);
|
||||
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(EmotionEngine::EmitPrequel));
|
||||
cg->call(func_ptr);
|
||||
|
||||
Xbyak::Label compile_instr;
|
||||
cg->L(compile_instr);
|
||||
|
||||
cg->add(cg->dword[cg->rsp + 20], 1);
|
||||
cg->mov(cg->edi, cg->dword[cg->rsp]);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(Bus::Read32));
|
||||
cg->call(func_ptr);
|
||||
|
||||
cg->mov(next_pc, cg->dword[cg->rsp + 4]);
|
||||
cg->mov(cg->dword[cg->rsp], next_pc);
|
||||
cg->add(cg->dword[cg->rsp + 4], 4);
|
||||
|
||||
cg->mov(cg->rdi, cg->rax);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(EmotionEngine::EmitIR));
|
||||
cg->call(func_ptr);
|
||||
|
||||
cg->mov(isBranchDelayed, cg->dword[cg->rsp + 16]);
|
||||
cg->mov(cg->dword[cg->rsp + 8], isBranchDelayed);
|
||||
|
||||
|
||||
cg->mov(cg->edi, cg->dword[cg->rsp]);
|
||||
cg->sub(cg->edi, 4);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(Bus::Read32));
|
||||
cg->call(func_ptr);
|
||||
cg->mov(cg->edi, cg->eax);
|
||||
cg->mov(cg->eax, 0);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(EmotionEngine::IsBranch));
|
||||
cg->call(func_ptr);
|
||||
cg->mov(cg->dword[cg->rsp + 16], cg->eax);
|
||||
|
||||
Xbyak::Label block_compiled;
|
||||
|
||||
cg->cmp(cg->dword[cg->rsp + 20], 20);
|
||||
cg->je(block_compiled);
|
||||
cg->mov(isBranchDelayed, cg->dword[cg->rsp + 8]);
|
||||
cg->cmp(isBranchDelayed, 1);
|
||||
cg->jge(block_compiled);
|
||||
|
||||
cg->jmp(compile_instr);
|
||||
|
||||
cg->L(block_compiled);
|
||||
|
||||
cg->mov(cg->edi, cg->dword[cg->rsp + 20]);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(EmotionEngine::EmitDone));
|
||||
cg->call(func_ptr);
|
||||
|
||||
cg->call(cg->rax);
|
||||
cg->mov(cg->rdi, cg->dword[cg->rsp + 20]);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(Scheduler::CheckScheduler));
|
||||
cg->call(func_ptr);
|
||||
|
||||
cg->jmp(begin);
|
||||
|
||||
cg->L(block);
|
||||
|
||||
cg->mov(cg->rdi, cg->dword[cg->rsp]);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(EmotionEngine::GetExistingBlockFunc));
|
||||
cg->call(func_ptr);
|
||||
cg->call(cg->rax);
|
||||
|
||||
cg->mov(cg->rdi, cg->dword[cg->rsp]);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(EmotionEngine::GetExistingBlockCycles));
|
||||
cg->call(func_ptr);
|
||||
cg->mov(cg->rdi, cg->rax);
|
||||
cg->mov(func_ptr, reinterpret_cast<uint64_t>(Scheduler::CheckScheduler));
|
||||
cg->call(func_ptr);
|
||||
|
||||
cg->jmp(begin);
|
||||
|
||||
cg->add(cg->rsp, 32);
|
||||
EmitRestoreHostRegs();
|
||||
|
||||
dispatcher_entry = (EE_JIT::JIT::EntryFunc)base;
|
||||
base += cg->getSize();
|
||||
|
||||
Dump();
|
||||
}
|
||||
|
||||
void EE_JIT::Emitter::Dump()
|
||||
|
|
@ -1206,6 +1337,13 @@ void EE_JIT::Emitter::TranslateBlock(Block *block)
|
|||
{
|
||||
EmitIR(i);
|
||||
}
|
||||
|
||||
cg->ret();
|
||||
}
|
||||
|
||||
void EE_JIT::Emitter::EnterDispatcher()
|
||||
{
|
||||
dispatcher_entry();
|
||||
}
|
||||
|
||||
const uint8_t *EE_JIT::Emitter::GetFreeBase()
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
#include <cstdint>
|
||||
#include <emu/cpu/ee/x64/reg_alloc.h>
|
||||
#include <3rdparty/xbyak/xbyak.h>
|
||||
#include <emu/cpu/ee/EmotionEngine.h>
|
||||
#include <vector>
|
||||
|
||||
namespace EE_JIT
|
||||
|
|
@ -51,11 +52,15 @@ private:
|
|||
void EmitBranchRegImm(IRInstruction i);
|
||||
void EmitUpdateCopCount(IRInstruction i);
|
||||
void EmitPOR(IRInstruction i);
|
||||
|
||||
EE_JIT::JIT::EntryFunc dispatcher_entry;
|
||||
public:
|
||||
Emitter();
|
||||
void Dump();
|
||||
void TranslateBlock(Block* block);
|
||||
|
||||
void EnterDispatcher();
|
||||
|
||||
void ResetFreeBase()
|
||||
{
|
||||
free_base = base;
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@
|
|||
#include <emu/gpu/gs.h>
|
||||
#include <emu/cpu/ee/dmac.hpp>
|
||||
#include <emu/cpu/ee/vu.h>
|
||||
#include <emu/cpu/ee/vif.h>
|
||||
|
||||
uint8_t BiosRom[0x400000];
|
||||
uint8_t spr[0x4000];
|
||||
|
|
@ -157,6 +158,8 @@ uint32_t Bus::Read32(uint32_t addr)
|
|||
return DMAC::ReadDSTAT();
|
||||
case 0x1000E020:
|
||||
return DMAC::ReadDPCR();
|
||||
case 0x10002010:
|
||||
return 0;
|
||||
}
|
||||
|
||||
printf("Read32 from unknown address 0x%08x\n", addr);
|
||||
|
|
@ -171,6 +174,14 @@ uint16_t Bus::Read16(uint32_t addr)
|
|||
return *(uint16_t*)&BiosRom[addr - 0x1fc00000];
|
||||
if (addr >= 0x70000000 && addr < 0x70004000)
|
||||
return *(uint16_t*)&spr[addr - 0x70000000];
|
||||
if (addr < 0x2000000)
|
||||
return *(uint16_t*)&ram[addr];
|
||||
|
||||
switch (addr)
|
||||
{
|
||||
case 0x1f803800:
|
||||
return 0;
|
||||
}
|
||||
|
||||
printf("Read16 from unknown address 0x%08x\n", addr);
|
||||
exit(1);
|
||||
|
|
@ -209,7 +220,22 @@ void Bus::Write128(uint32_t addr, uint128_t data)
|
|||
*(__uint128_t*)&ram[addr] = data.u128;
|
||||
return;
|
||||
}
|
||||
if (addr >= 0x70000000 && addr < 0x70004000)
|
||||
{
|
||||
*(__uint128_t*)&spr[addr - 0x70000000] = data.u128;
|
||||
return;
|
||||
}
|
||||
|
||||
if (addr >= 0x11000000 && addr < 0x11004000)
|
||||
{
|
||||
VectorUnit::WriteDataMem128(0, addr, data);
|
||||
return;
|
||||
}
|
||||
if (addr >= 0x11004000 && addr < 0x11008000)
|
||||
{
|
||||
VectorUnit::WriteDataMem128(0, addr, data);
|
||||
return;
|
||||
}
|
||||
if (addr >= 0x1100C000 && addr < 0x11010000)
|
||||
{
|
||||
VectorUnit::WriteDataMem128(1, addr, data);
|
||||
|
|
@ -218,9 +244,17 @@ void Bus::Write128(uint32_t addr, uint128_t data)
|
|||
|
||||
switch (addr)
|
||||
{
|
||||
case 0x10004000:
|
||||
VIF::WriteVIF0FIFO(data);
|
||||
return;
|
||||
case 0x10005000:
|
||||
VIF::WriteVIF1FIFO(data);
|
||||
return;
|
||||
case 0x10006000:
|
||||
GIF::WriteFIFO(data);
|
||||
return;
|
||||
case 0x10007010:
|
||||
return;
|
||||
}
|
||||
|
||||
printf("Write128 0x%lx%016lx to unknown address 0x%08x\n", data.u64[1], data.u64[0], addr);
|
||||
|
|
@ -243,6 +277,11 @@ void Bus::Write64(uint32_t addr, uint64_t data)
|
|||
*(uint64_t*)&ram[addr] = data;
|
||||
return;
|
||||
}
|
||||
if (addr >= 0x11008000 && addr < 0x1100C000)
|
||||
{
|
||||
VectorUnit::WriteCodeMem64(1, addr, data);
|
||||
return;
|
||||
}
|
||||
|
||||
switch (addr)
|
||||
{
|
||||
|
|
@ -348,6 +387,7 @@ void Bus::Write32(uint32_t addr, uint32_t data)
|
|||
case 0x10001810:
|
||||
case 0x10001820:
|
||||
case 0x10001830:
|
||||
case 0x1000f510:
|
||||
return;
|
||||
case 0x10008000:
|
||||
case 0x10008010:
|
||||
|
|
@ -427,6 +467,21 @@ void Bus::Write32(uint32_t addr, uint32_t data)
|
|||
case 0x1000E040:
|
||||
case 0x1000E050:
|
||||
return;
|
||||
case 0x10003810:
|
||||
VIF::WriteFBRST(0, data);
|
||||
return;
|
||||
case 0x10003820:
|
||||
case 0x10003830:
|
||||
VIF::WriteMASK(0, data);
|
||||
return;
|
||||
case 0x10003c00:
|
||||
return;
|
||||
case 0x10003c10:
|
||||
VIF::WriteFBRST(1, data);
|
||||
return;
|
||||
case 0x10002000:
|
||||
case 0x10002010:
|
||||
return;
|
||||
}
|
||||
|
||||
printf("Write32 0x%08x to unknown address 0x%08x\n", data, addr);
|
||||
|
|
@ -444,6 +499,11 @@ void Bus::Write16(uint32_t addr, uint16_t data)
|
|||
*(uint16_t*)&spr[addr - 0x70000000] = data;
|
||||
return;
|
||||
}
|
||||
if (addr < 0x2000000)
|
||||
{
|
||||
*(uint16_t*)&ram[addr] = data;
|
||||
return;
|
||||
}
|
||||
|
||||
if (((addr & 0xFF000000) == 0x1A000000) || ((addr & 0xFFF00000) == 0x1F800000))
|
||||
return;
|
||||
|
|
|
|||
Loading…
Reference in a new issue