refractionpcsx2
b38723880b
VU_JIT: Fix some issues with branch/ebit delay slots ( #178 )
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Refactor some code to use less variables
Remove interlocking from vu0_wait as it's not required
2019-04-01 18:42:14 -04:00
PSI-Rockin
0065204cce
Fix ref's booboo
2019-03-31 19:09:03 -04:00
PSI-Rockin
14b22cde3f
Merge branch 'master' of https://github.com/PSI-Rockin/DobieStation
2019-03-31 18:43:26 -04:00
PSI-Rockin
57427540b7
Add VMSUBAq
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Also do not apply MODE addition when the input format for UNPACK is V4-5
2019-03-31 18:43:11 -04:00
refractionpcsx2
fe72830a53
Implemented T-Bit handling for VU_JIT and Int ( #175 )
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* Added VU writes from EE
Implemented T-Bit handling for VU_JIT and Int
Added CMSAR1 support
Fixed a new bug in VI load delays
* Improvements to VU M-Bit handling
Implemented various reads/writes that Totally Spies Totally Party uses
* Missed a bit
* Slight fix for TPC reads
* Fix VI Load delays on JIT, again
Stop VU_JIT cycle_count reversing
Stop VU Int running when cycle count is negative
* Fix for integer branch delays when there's a stall
* Clean up VI integer stalls a little
* Mask TOPS when swapping over for the VU. Fixes Jak & Daxter
* Tidy up masking to work for VIF0 also
* Disable VIF logging
2019-03-31 18:39:16 -04:00
Souzooka
f5e4552707
Change usage of tab indentation to use four spaces ( #174 )
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Change usage of tab indentation to use four spaces (squash)
2019-03-31 12:09:31 -04:00
refractionpcsx2
dbfffa3aee
VU_JIT: Fixed bug in VI load delays ( #173 )
2019-03-30 19:28:31 -04:00
refractionpcsx2
c8880360e4
VU_JIT: Fixed bug in ISW(R) when writing to multiple vectors at once ( #172 )
2019-03-30 18:19:04 -04:00
Souzooka
a773b0ac1d
Remove checks for delete ( #171 )
2019-03-30 15:24:35 -04:00
Souzooka
e4669d4584
Apply const to pointers used as arguments but not modified ( #170 )
2019-03-30 15:16:41 -04:00
PSI-Rockin
554af5d75e
Make SPU sampling 4x slower, as it should be
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Also fix IOP timers/DMA going twice as fast
2019-03-30 14:00:46 -04:00
PSISP
f07bccd3de
Merge pull request #169 from refractionpcsx2/master
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VU_JIT: Fix for E-bit's in branch delay slots
2019-03-30 11:13:00 -04:00
PSISP
74b69a3921
Merge pull request #168 from tokumeiwokiboushimasu/master
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build fix
2019-03-30 11:11:45 -04:00
refractionpcsx2
2051f5996a
VU_JIT: Fix clamping of BC scalar registers
2019-03-30 13:24:14 +00:00
refractionpcsx2
76e78016a5
VU_JIT: Fix for E-bit's in branch delay slots
2019-03-30 13:04:13 +00:00
tokumeiwokiboushimasu
c4385e33b5
build fix
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In file included from ../../src/core/ee/emotion.cpp:10:
../../src/core/ee/../emulator.hpp:74:14: error: 'function' in namespace 'std' does not name a template type
std::function<void(VectorUnit&, int)> vu1_run_func;
^~~~~~~~
../../src/core/ee/../emulator.hpp:74:9: note: 'std::function' is defined in header '<functional>'; did you forget to '#include <functional>'?
../../src/core/ee/../emulator.hpp:27:1:
+#include <functional>
2019-03-30 20:10:00 +09:00
PSISP
92ae28b72a
Merge pull request #167 from PSI-Rockin/better_savestates
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Save more state for pad, SPU2, scheduler, and IOP DMA
2019-03-29 23:22:53 -04:00
PSI-Rockin
8c6df1cc33
Save more state for pad, SPU2, scheduler, and IOP DMA
2019-03-29 23:09:16 -04:00
PSI-Rockin
41cc612703
Fix qmake
2019-03-29 20:17:54 -04:00
PSISP
9630710be0
Merge pull request #166 from PSI-Rockin/scheduler
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Implement basic scheduler
2019-03-29 17:16:32 -04:00
PSISP
29f135d86f
Merge branch 'master' into scheduler
2019-03-29 17:04:14 -04:00
PSISP
d7b6ecf7cc
VU_JIT: Fixed bug with P pipeline flushing when it shouldn't ( #165 )
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Refactored stalling code in to its own function to tidy things up
Added missing "is_flag_instruction" for FCEQ
2019-03-29 15:42:04 -04:00
refractionpcsx2
b8c0a9c038
Refactor handle_vu_stalls function call slightly
2019-03-29 19:38:40 +00:00
refractionpcsx2
b470867aa5
VU_JIT: Fixed bug with P pipeline flushing when it shouldn't
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Refactored stalling code in to its own function to tidy things up
Added missing "is_flag_instruction" for FCEQ
2019-03-29 19:29:11 +00:00
PSISP
5f5ea1c7f8
Merge pull request #126 from tadanokojin/ui-refresh
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Add game list, ability to change between VU1 JIT/interpreter between games, and BIOS path
2019-03-29 14:45:44 -04:00
Kojin
b13d0fa682
make PSI happy with a warning about changing vu mode
2019-03-29 14:04:23 -04:00
Kojin
9ee7f06c29
cleanup
2019-03-29 05:28:51 -04:00
PSI-Rockin
fbda2b6eef
Make INTC wait for 8 cycles before sending event
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VBLANK looping games with interrupt handlers like Atelier Iris would hang on 4
Also fix some bugs in mipmapping and CLUT reloading, because why not
2019-03-28 18:05:57 -04:00
PSI-Rockin
7d37511fb0
Allow INT0 to force an interrupt immediately
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Because INT0 is now tied to the scheduler, this is important to ensure proper interrupt timing
Also added VSQD
2019-03-28 15:11:11 -04:00
PSI-Rockin
d8dce6d610
Allocate more memory for JitCache blocks
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Fixes Kuon crashing (it has very large blocks)
Also fixed dumb INTC speedhack bug
2019-03-27 22:10:15 -04:00
PSI-Rockin
cfa41945bb
Merge remote-tracking branch 'origin/master' into scheduler
2019-03-27 20:50:40 -04:00
PSI-Rockin
9c7b950163
Update vu_jit64.cpp
2019-03-27 20:50:21 -04:00
refractionpcsx2
ab14eb33b8
VU JIT: Fixed Q and P pipeline stalls ( #164 )
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Fixed bug in integer load delay stalls
Fixed XGKick delay slot detection
Fixed bug in branch delay handling
Some general code cleanup
2019-03-27 20:46:32 -04:00
PSI-Rockin
7a3c1f5b87
Implemented IOP icache
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Also simulated dual-issue on the EE by advancing PC + 8 if two instructions are NOPs
2019-03-27 20:45:54 -04:00
refractionpcsx2
c7383e27be
VU JIT: Clamp newly loaded VF registers ( #163 )
2019-03-27 15:49:17 -04:00
PSI-Rockin
eb7c7fc5e5
Reset icache properly
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Also increase max cycles per emulator synchronization to 32
2019-03-27 14:46:21 -04:00
PSI-Rockin
5b3aafec8c
Fixed DMA bug
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Only find a new active channel after a dreq clear if the current active channel is the one being cleared (fixes FFX not booting)
Also shorten INTC interrupt event to 4 cycles (seems to be what PCSX2 does)
2019-03-27 13:58:41 -04:00
PSI-Rockin
85b6b49a70
Maybe I should return a value on a non-void function
2019-03-27 00:39:28 -04:00
PSI-Rockin
bb7a019519
Implement SPU DMA reads
2019-03-26 22:42:25 -04:00
PSI-Rockin
68cb4a62cc
Delay setting INT0 signal by 8 cycles
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Fixes games that call sceGsSyncV with a VBLANK interrupt handler (Atelier Iris, GTA 3, possibly more)
2019-03-26 22:15:54 -04:00
PSI-Rockin
47bdd0c036
Merge remote-tracking branch 'origin/master' into scheduler
2019-03-26 21:21:47 -04:00
PSI-Rockin
9edbac0965
Clear DMA request for ADMA if 0x400 or more samples are fed
2019-03-26 21:18:41 -04:00
refractionpcsx2
73227a030d
Fixed bug with COP2 sync during branch delays ( #162 )
2019-03-26 20:21:43 -04:00
refractionpcsx2
3ff83e40a8
Stall COP2 Macroinstructions if VU0 is running ( #161 )
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Only update VU0 on CFC/CTC COP2 commands
2019-03-26 19:36:37 -04:00
PSI-Rockin
4d24d57442
Added better handling of SPU DMA requests
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Allows Raw Danger to boot (clears ADMA transfer and control register while loading, expecting transfer to stop)
Allowed multiple IOP DMA channels to be queued
Fixed bug that would happen if BREAK was called while a CDVD command is running
Added proper MUL/DIV stalls in IOP core
Commented out excess logging
2019-03-26 19:34:51 -04:00
Kojin
3b2d6c012f
Fix libdeflate compile warnings ( #160 )
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Hopefully it will solve the permission issues while building
2019-03-26 09:57:19 -04:00
Kojin
c224c71343
minor bug fixes
2019-03-25 22:16:17 -04:00
Kojin
57fac4b347
working gamelist
2019-03-25 22:16:17 -04:00
Kojin
54703ab12e
Updates to title ad menu and refactoring
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- Title displays current VU1 mode
- Move scaling to "Window" menu
- clean up some of my mess
- refactor some of the EmuWindow code
2019-03-25 22:16:17 -04:00
Kojin
40e823932f
allow switching between jit/interpreter on vu0
2019-03-25 22:16:17 -04:00
