PSI-Rockin
ce1e90d3de
Scheduler: Further generalize EE timers
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Save states are broken... need to investigate before merging. Good news is that after that's fixed, making new timers will be a lot easier.
2020-03-05 03:34:17 -05:00
PSISP
763f90e35f
Merge pull request #314 from refractionpcsx2/vu_fixes
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General VU fixes
2020-03-03 15:56:54 -05:00
refractionpcsx2
d17cd9c69b
Scale PC by 8, not 4...
2020-03-03 20:31:21 +00:00
refractionpcsx2
e93342e9ba
Fix scale of VU1 PC when read from VU0
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Remove a duplicate line of code
Fix BC2 on the EE JIT to check VU1 not VU0
2020-03-03 20:28:54 +00:00
PSISP
c454c8ba6c
Merge pull request #310 from refractionpcsx2/vu_new_min_max
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VU JIT integer min/max improvements
Allow allocating temporary register on VU JIT
2020-03-02 15:37:02 -05:00
PSI-Rockin
fecbd93979
Merge branch 'master' into memcards
2020-03-02 03:37:56 -05:00
PSI-Rockin
be7db6944f
IPU: Changes to IDEC
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Remove hardcoded delay at the beginning of IDEC
Add an extra start code validation step
2020-03-01 20:36:23 -05:00
PSI-Rockin
87d4599e71
PARTIAL COMMIT
2020-03-01 20:20:20 -05:00
PSISP
4da704a8db
Merge pull request #313 from refractionpcsx2/8bit_timers
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Add 8bit EE Timer reads. Fixes Robin Hood
2020-03-01 17:55:19 -05:00
refractionpcsx2
8ed94a1636
Add 8bit EE Timer reads. Fixes Robin Hood
2020-03-01 22:33:30 +00:00
refractionpcsx2
926870b5e6
Simplify MIN/MAX ops by using a temp reg
2020-03-01 20:18:54 +00:00
PSISP
cf7344dc68
Merge pull request #312 from refractionpcsx2/spu_addressing
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Original addresses are 16bit
2020-03-01 14:51:20 -05:00
refractionpcsx2
0f99edcd45
Original addresses are 16bit
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Mask upper 2 bits of voice addresses, these should be fixed to 0
Fix situation where DMA could read/write past the end of memory
2020-03-01 18:59:22 +00:00
Margen67
fd268fb1bb
Add GitHub Actions CI
2020-02-29 05:53:40 -08:00
PSI-Rockin
8a181b648e
GS: Swap order of SIGNAL being writen to and checking for SIGNAL interrupt
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Fixes Soul Caliber 2
2020-02-28 22:33:17 -05:00
PSI-Rockin
8f87bca8d3
EE Timing: Move interrupt logic to scheduler
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Also clean up timing code
2020-02-28 22:00:29 -05:00
PSI-Rockin
fdbaacca10
Scheduler: Add new methods in preparation for handling timer logic in events
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Also some scheduler cleanup
2020-02-28 17:47:58 -05:00
PSISP
1e65f7166b
Merge pull request #311 from refractionpcsx2/path3_fix
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Better handling of when NOP GIF tags are sent to the GS
2020-02-28 15:11:14 -05:00
refractionpcsx2
102a602afc
Removed duplicate code
2020-02-28 10:16:33 +00:00
refractionpcsx2
156dba9ed5
Better handling of when NOP GIF tags are sent to the GS
2020-02-28 02:28:31 +00:00
PSI-Rockin
a268a2c0db
Scheduler: Remove dependency on Emulator
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This allows for scheduler functions to be defined anywhere, rather than being restricted to the Emulator class.
This commit also adds a "register_function" method to Scheduler. This makes serialization of events easier as we no longer need to hardcode event IDs.
Finally, events now have an optional 64-bit parameter.
2020-02-27 16:02:09 -05:00
refractionpcsx2
be8891d131
Removed some MOVMSKPS ops that shouldn't have been there
2020-02-27 00:05:40 +00:00
refractionpcsx2
d0c5f7ff1b
Missed reg backups on min_vector_by_scalar
2020-02-26 22:13:40 +00:00
refractionpcsx2
f3eb5a529b
Fix case where temp reg might use one of the regs required by the op
2020-02-26 21:24:59 +00:00
refractionpcsx2
c642b8439d
Add missing emitter changes
2020-02-26 19:54:11 +00:00
refractionpcsx2
ddb013bb03
Fix up MIN instructions on VU JIT
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Removed unneeded MOVMSKPS, BLENDVPS uses sign bits
Tidied things up a little
2020-02-26 19:49:47 +00:00
refractionpcsx2
b9f353530a
Add BLENDVPS to the emitter. Update MAX VU JIT ops to use MIN when both vectors are negative
2020-02-26 00:48:56 +00:00
PSISP
a36bc2dbfb
Merge pull request #309 from refractionpcsx2/vu_min_max
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Use integer min/max on VU JIT
2020-02-25 18:15:11 -05:00
refractionpcsx2
9774cf9ddb
Use integer min/max on VU JIT
2020-02-25 22:58:59 +00:00
PSISP
2fb47b1528
Merge pull request #307 from Souzooka/master
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SQRT.S improvements, handle SQRT.S +/- 0
2020-02-25 15:59:15 -05:00
PSISP
2c41407362
Merge pull request #297 from refractionpcsx2/spu_addr_mask
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SPU: Make sure 16bit and 8bit addresses are used where necessary
2020-02-25 15:56:57 -05:00
PSISP
6813f35778
Merge pull request #306 from refractionpcsx2/dma_signal_fix
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Fix SIGNAL not pending IRQ when IMR masked
2020-02-25 15:53:09 -05:00
refractionpcsx2
748e050c67
revert dma loop, better to handle this a different way later
2020-02-25 20:46:35 +00:00
PSI-Rockin
e6914c0237
CDVD: Add proper CD/DVD detection
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Fixes ATV Offroad Fury and other games incorrectly identified as CD
2020-02-23 23:31:40 -05:00
PSI-Rockin
6fe569101b
COP2: Implement VSUBAI
2020-02-23 03:41:38 -05:00
PSI-Rockin
8ac8df0ae7
IOP: Stub out icache timings
2020-02-23 01:30:24 -05:00
PSI-Rockin
2af64886e0
GS: Mirror register writes to 0x11 with 0x01 (RGBAQ)
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Fixes Ridge Racer V car shadows
2020-02-22 21:59:58 -05:00
refractionpcsx2
4bf53f831e
Convert the SPU IRQ function to use a 16bit address
2020-02-22 22:44:30 +00:00
PSISP
8565a389a7
Merge pull request #302 from refractionpcsx2/path3_mask_fix
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Improve PATH3 masking timing slightly
Treat zeroed GIFtag as a NOP
2020-02-22 15:51:58 -05:00
dakotachasesmith
4b2db3dcda
SQRT.S improvements, handle SQRT.S +/- 0
2020-02-21 16:36:41 -10:00
refractionpcsx2
d1c78a1501
Fix SIGNAL not pending IRQ when IMR masked
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Fix tag setting on DMA resume if the mode is changed, also handle tag IRQ's
Loop around DMA's 8 cycles per time when more than 8 cycles have been provided
Fix IPU SETIQ from accidentally fastforwarding the FIFO more than once if not enough data is available
2020-02-21 23:55:03 +00:00
refractionpcsx2
8e5efd6f4a
Added Denormals are Zero handling for both EE and VU JITs ( #305 )
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Added Denormals are Zero handling for both EE and VU JITs
Fixed bug in RSQRT handling on EE JIT, fixes Futurama spinning
Added LDMXCSR and STMXCSR ops
2020-02-20 16:15:39 -05:00
refractionpcsx2
69c4369143
VU JIT: Fixed up some clamping issues ( #293 )
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VU JIT: Fixed up some clamping issues
VU JIT: Optimized register loading and certain conditions for ops
VU JIT: Changed LQI and LDQ to still affect VI[is] even if the dest is VF00
Fixes TOCA 3, because stupid game is stupid
2020-02-20 04:53:20 -05:00
PSISP
7ab8268b3d
Merge pull request #304 from Ziemas/cpp14
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Set C++ standard to C++14 for cmake.
2020-02-19 19:28:12 -05:00
Ziemas
9041bc0745
Set C++ standard to C++14 for cmake.
2020-02-19 13:47:46 +01:00
PSISP
0cb43505cd
Merge pull request #301 from tadanokojin/qt-fps-bug
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qt: workaround for window title update
2020-02-18 15:12:43 -05:00
PSISP
38b54b2fcb
Merge pull request #300 from tadanokojin/vs-add-thirdparty-folder
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vs-build: add ThirdParty solution folder
2020-02-18 15:12:25 -05:00
PSISP
176f07d0e3
Merge pull request #299 from tadanokojin/vs-cpp-standard
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vs-build: force cpp14
2020-02-18 15:12:12 -05:00
refractionpcsx2
c57c5c7c0b
Improve PATH 3 masking timing slightly.
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Treat completely zero'd GIF TAG as a nop
2020-02-18 19:32:56 +00:00
Kojin
d764b5a848
qt: workaround for window title update
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emuthread might update the title after it gets reset to default state
workaround this for now
2020-02-18 10:47:09 -05:00
